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/linux-6.12.1/drivers/staging/media/ipu3/
Dipu3-tables.c1 // SPDX-License-Identifier: GPL-2.0
4 #include "ipu3-tables.h"
6 #define X 0 /* Don't care value */
10 /* Scale factor 32 / (32 + 0) = 1 */
12 .even = { { 0, 0, 64, 6, 0, 0, 0 } },
13 .odd = { { 0, 0, 64, 6, 0, 0, 0 } } },
15 .even = { { 0, 0, 64, 6, 0, 0, 0 } },
16 .odd = { { 0, 0, 64, 6, 0, 0, 0 } } },
17 .ptrn_arr = { { 0x3 } },
19 .hor_ds_en = 0,
[all …]
/linux-6.12.1/drivers/isdn/mISDN/
Ddsp_audio.c20 /* ulaw[unsigned char] -> signed 16-bit */
22 /* alaw[unsigned char] -> signed 16-bit */
28 /* signed 16-bit -> law */
32 /* alaw -> ulaw */
34 /* ulaw -> alaw */
43 #define AMI_MASK 0x55
51 0xFF, 0x1FF, 0x3FF, 0x7FF, 0xFFF, 0x1FFF, 0x3FFF, 0x7FFF in linear2alaw()
55 if (pcm_val >= 0) { in linear2alaw()
56 /* Sign (7th) bit = 1 */ in linear2alaw()
57 mask = AMI_MASK | 0x80; in linear2alaw()
[all …]
/linux-6.12.1/arch/arm/mach-rpc/
Dirq.c1 // SPDX-License-Identifier: GPL-2.0
12 #define STAT 0x00
13 #define REQ 0x04
14 #define CLR 0x04
15 #define MASK 0x08
18 0, 8, 9, 8,10,10,10,10,11,11,11,11,10,10,10,10,
37 0,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
56 0, 0, 1, 0, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3,
57 4, 0, 1, 0, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3,
64 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
[all …]
/linux-6.12.1/sound/soc/codecs/
Dwm2200.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * wm2200.h - WM2200 audio codec interface
14 #define WM2200_CLKSRC_MCLK1 0
19 #define WM2200_FLL_SRC_MCLK1 0
26 #define WM2200_SOFTWARE_RESET 0x00
27 #define WM2200_DEVICE_REVISION 0x01
28 #define WM2200_TONE_GENERATOR_1 0x0B
29 #define WM2200_CLOCKING_3 0x102
30 #define WM2200_CLOCKING_4 0x103
31 #define WM2200_FLL_CONTROL_1 0x111
[all …]
/linux-6.12.1/drivers/video/fbdev/via/
Dhw.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
4 * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
22 #define VIA_LDVP0 0x00000001
23 #define VIA_LDVP1 0x00000002
24 #define VIA_DVP0 0x00000004
25 #define VIA_CRT 0x00000010
26 #define VIA_DVP1 0x00000020
27 #define VIA_LVDS1 0x00000040
28 #define VIA_LVDS2 0x00000080
[all …]
/linux-6.12.1/Documentation/userspace-api/media/v4l/
Dpixfmt-srggb10-ipu3.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-pix-fmt-ipu3-sbggr10:
4 .. _v4l2-pix-fmt-ipu3-sgbrg10:
5 .. _v4l2-pix-fmt-ipu3-sgrbg10:
6 .. _v4l2-pix-fmt-ipu3-srggb10:
13 10-bit Bayer formats
24 In other respects this format is similar to :ref:`V4L2-PIX-FMT-SRGGB10`.
36 .. flat-table::
38 * - start + 0:
39 - B\ :sub:`0000low`
[all …]
Dpixfmt-rgb.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _pixfmt-rgb:
22 (including capture queues of mem-to-mem devices) fill the alpha component in
25 but can set the alpha bit to a user-configurable value, the
26 :ref:`V4L2_CID_ALPHA_COMPONENT <v4l2-alpha-component>` control is used to
31 :ref:`Output <output>` devices (including output queues of mem-to-mem devices
44 - In all the tables that follow, bit 7 is the most significant bit in a byte.
45 - 'r', 'g' and 'b' denote bits of the red, green and blue components
54 based on the order of the RGB components as seen in a 8-, 16- or 32-bit word,
57 for each component. For instance, the RGB565 format stores a pixel in a 16-bit
[all …]
Dpixfmt-packed-yuv.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _packed-yuv:
15 - In all the tables that follow, bit 7 is the most significant bit in a byte.
16 - 'Y', 'Cb' and 'Cr' denote bits of the luma, blue chroma (also known as
30 seen in a 16-bit word, which is then stored in memory in little endian byte
32 format stores a pixel in a 16-bit word [15:0] laid out at as [Y'\ :sub:`4-0`
33 Cb\ :sub:`5-0` Cr\ :sub:`4-0`], and stored in memory in two bytes,
34 [Cb\ :sub:`2-0` Cr\ :sub:`4-0`] followed by [Y'\ :sub:`4-0` Cb\ :sub:`5-3`].
44 .. flat-table:: Packed YUV 4:4:4 Image Formats (less than 8bpc)
45 :header-rows: 2
[all …]
/linux-6.12.1/arch/mips/boot/dts/loongson/
Dls7a-pch.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "simple-bus";
6 #address-cells = <2>;
7 #size-cells = <2>;
8 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */
9 0 0x20000000 0 0x20000000 0 0x10000000
10 0 0x40000000 0 0x40000000 0 0x40000000 /* PCI MEM */
11 0xe00 0x00000000 0xe00 0x00000000 0x100 0x0000000>;
13 pic: interrupt-controller@10000000 {
14 compatible = "loongson,pch-pic-1.0";
[all …]
/linux-6.12.1/drivers/pinctrl/sophgo/
Dpinctrl-sg2000.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/pinctrl/pinctrl-sg2000.h>
19 #include "pinctrl-cv18xx.h"
22 VDD18A_EPHY = 0,
29 VDDIO_VIVO = 7
45 u32 pstate = psmap[pin->power_domain]; in sg2000_get_pull_up()
57 return -EINVAL; in sg2000_get_pull_up()
60 return -ENOTSUPP; in sg2000_get_pull_up()
65 u32 pstate = psmap[pin->power_domain]; in sg2000_get_pull_down()
77 return -EINVAL; in sg2000_get_pull_down()
[all …]
Dpinctrl-cv1812h.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/pinctrl/pinctrl-cv1812h.h>
19 #include "pinctrl-cv18xx.h"
22 VDD18A_EPHY = 0,
29 VDDIO_VIVO = 7
45 u32 pstate = psmap[pin->power_domain]; in cv1812h_get_pull_up()
57 return -EINVAL; in cv1812h_get_pull_up()
60 return -ENOTSUPP; in cv1812h_get_pull_up()
65 u32 pstate = psmap[pin->power_domain]; in cv1812h_get_pull_down()
77 return -EINVAL; in cv1812h_get_pull_down()
[all …]
Dpinctrl-sg2002.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/pinctrl/pinctrl-sg2002.h>
19 #include "pinctrl-cv18xx.h"
22 VDD18A_MIPI = 0,
39 u32 pstate = psmap[pin->power_domain]; in sg2002_get_pull_up()
51 return -EINVAL; in sg2002_get_pull_up()
54 return -ENOTSUPP; in sg2002_get_pull_up()
59 u32 pstate = psmap[pin->power_domain]; in sg2002_get_pull_down()
71 return -EINVAL; in sg2002_get_pull_down()
74 return -ENOTSUPP; in sg2002_get_pull_down()
[all …]
Dpinctrl-cv1800b.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/pinctrl/pinctrl-cv1800b.h>
19 #include "pinctrl-cv18xx.h"
22 VDD18A_AUD = 0,
39 u32 pstate = psmap[pin->power_domain]; in cv1800b_get_pull_up()
51 return -EINVAL; in cv1800b_get_pull_up()
54 return -ENOTSUPP; in cv1800b_get_pull_up()
59 u32 pstate = psmap[pin->power_domain]; in cv1800b_get_pull_down()
71 return -EINVAL; in cv1800b_get_pull_down()
74 return -ENOTSUPP; in cv1800b_get_pull_down()
[all …]
/linux-6.12.1/arch/sh/include/mach-common/mach/
Dsh2007.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #define CS5BCR 0xff802050
6 #define CS5WCR 0xff802058
7 #define CS5PCR 0xff802070
14 #define PCMCIA_ATA 0
20 #define PCMCIA_ATTR16 7
22 #define TYPE_SRAM 0
25 /* write-read/write-write delay (0-7:0,1,2,3,4,5,6,7) */
26 #define IWW5 0
28 /* different area, read-write delay (0-7:0,1,2,3,4,5,6,7) */
[all …]
/linux-6.12.1/drivers/pinctrl/sunplus/
Dsppctl_sp7021.c1 // SPDX-License-Identifier: GPL-2.0
18 D_PIS(0, 0), D_PIS(0, 1), D_PIS(0, 2), D_PIS(0, 3),
19 D_PIS(0, 4), D_PIS(0, 5), D_PIS(0, 6), D_PIS(0, 7),
20 D_PIS(1, 0), D_PIS(1, 1), D_PIS(1, 2), D_PIS(1, 3),
21 D_PIS(1, 4), D_PIS(1, 5), D_PIS(1, 6), D_PIS(1, 7),
22 D_PIS(2, 0), D_PIS(2, 1), D_PIS(2, 2), D_PIS(2, 3),
23 D_PIS(2, 4), D_PIS(2, 5), D_PIS(2, 6), D_PIS(2, 7),
24 D_PIS(3, 0), D_PIS(3, 1), D_PIS(3, 2), D_PIS(3, 3),
25 D_PIS(3, 4), D_PIS(3, 5), D_PIS(3, 6), D_PIS(3, 7),
26 D_PIS(4, 0), D_PIS(4, 1), D_PIS(4, 2), D_PIS(4, 3),
[all …]
/linux-6.12.1/arch/riscv/boot/dts/sophgo/
Dsg2042.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/clock/sophgo,sg2042-clkgen.h>
8 #include <dt-bindings/clock/sophgo,sg2042-pll.h>
9 #include <dt-bindings/clock/sophgo,sg2042-rpgate.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/reset/sophgo,sg2042-reset.h>
13 #include "sg2042-cpus.dtsi"
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
/linux-6.12.1/arch/alpha/lib/
Dfls.c1 // SPDX-License-Identifier: GPL-2.0
9 /* This is fls(x)-1, except zero is held to zero. This allows most
10 efficient input into extbl, plus it allows easy handling of fls(0)=0. */
14 0,
15 0,
29 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
30 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
31 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
32 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
33 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
[all …]
/linux-6.12.1/lib/zlib_inflate/
Dinffixed.h1 /* inffixed.h -- table for decoding fixed codes
11 {96,7,0},{0,8,80},{0,8,16},{20,8,115},{18,7,31},{0,8,112},{0,8,48},
12 {0,9,192},{16,7,10},{0,8,96},{0,8,32},{0,9,160},{0,8,0},{0,8,128},
13 {0,8,64},{0,9,224},{16,7,6},{0,8,88},{0,8,24},{0,9,144},{19,7,59},
14 {0,8,120},{0,8,56},{0,9,208},{17,7,17},{0,8,104},{0,8,40},{0,9,176},
15 {0,8,8},{0,8,136},{0,8,72},{0,9,240},{16,7,4},{0,8,84},{0,8,20},
16 {21,8,227},{19,7,43},{0,8,116},{0,8,52},{0,9,200},{17,7,13},{0,8,100},
17 {0,8,36},{0,9,168},{0,8,4},{0,8,132},{0,8,68},{0,9,232},{16,7,8},
18 {0,8,92},{0,8,28},{0,9,152},{20,7,83},{0,8,124},{0,8,60},{0,9,216},
19 {18,7,23},{0,8,108},{0,8,44},{0,9,184},{0,8,12},{0,8,140},{0,8,76},
[all …]
/linux-6.12.1/drivers/gpu/drm/i915/display/
Dintel_qp_tables.c1 // SPDX-License-Identifier: MIT
39 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
40 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
41 { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
42 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
43 { 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
44 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
45 { 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
46 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
48 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
[all …]
/linux-6.12.1/arch/arm64/boot/dts/ti/
Dk3-am65-iot2050-arduino-connector.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) Siemens AG, 2018-2023
13 pinctrl-names =
15 "d0-uart0-rxd", "d0-gpio", "d0-gpio-pullup", "d0-gpio-pulldown",
16 "d1-uart0-txd", "d1-gpio", "d1-gpio-pullup", "d1-gpio-pulldown",
17 "d2-uart0-ctsn", "d2-gpio", "d2-gpio-pullup", "d2-gpio-pulldown",
18 "d3-uart0-rtsn", "d3-gpio", "d3-gpio-pullup", "d3-gpio-pulldown",
19 "d10-spi0-cs0", "d10-gpio", "d10-gpio-pullup", "d10-gpio-pulldown",
20 "d11-spi0-d0", "d11-gpio", "d11-gpio-pullup", "d11-gpio-pulldown",
21 "d12-spi0-d1", "d12-gpio", "d12-gpio-pullup", "d12-gpio-pulldown",
[all …]
/linux-6.12.1/tools/arch/x86/kcpuid/
Dcpuid.csv1 # SPDX-License-Identifier: CC0-1.0
2 # Generator: x86-cpuid-db v1.0
5 # Auto-generated file.
6 # Please submit all updates and bugfixes to https://x86-cpuid.org
12 # Leaf 0H
15 … 0, 0, eax, 31:0, max_std_leaf , Highest cpuid standard leaf supported
16 0, 0, ebx, 31:0, cpu_vendorid_0 , CPU vendor ID string bytes 0 - 3
17 0, 0, ecx, 31:0, cpu_vendorid_2 , CPU vendor ID string bytes 8 - 11
18 0, 0, edx, 31:0, cpu_vendorid_1 , CPU vendor ID string bytes 4 - 7
23 1, 0, eax, 3:0, stepping , Stepping ID
[all …]
/linux-6.12.1/drivers/gpu/drm/omapdrm/dss/
Dhdmi5_core.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
28 void __iomem *base = core->base; in hdmi5_core_ddc_init()
43 REG_FLD_MOD(base, HDMI_CORE_I2CM_SOFTRSTZ, 0, 0, 0); in hdmi5_core_ddc_init()
45 0, 0, 1) != 1) in hdmi5_core_ddc_init()
48 /* Standard (0) or Fast (1) Mode */ in hdmi5_core_ddc_init()
49 REG_FLD_MOD(base, HDMI_CORE_I2CM_DIV, 0, 3, 3); in hdmi5_core_ddc_init()
54 (v >> 8) & 0xff, 7, 0); in hdmi5_core_ddc_init()
56 v & 0xff, 7, 0); in hdmi5_core_ddc_init()
61 (v >> 8) & 0xff, 7, 0); in hdmi5_core_ddc_init()
[all …]
/linux-6.12.1/drivers/net/wireless/broadcom/b43/
Dtables_lpphy.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 IEEE 802.11a/g LP-PHY and radio device data tables
26 #define B206X_FLAG_A 0x01 /* Flag: Init in A mode */
27 #define B206X_FLAG_G 0x02 /* Flag: Init in G mode */
30 /* { .offset = B2062_N_COMM1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
31 /* { .offset = 0x0001, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
32 /* { .offset = B2062_N_COMM2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
33 /* { .offset = B2062_N_COMM3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
34 …{ .offset = B2062_N_COMM4, .value_a = 0x0001, .value_g = 0x0000, .flags = B206X_FLAG_A | B206X_FLA…
35 /* { .offset = B2062_N_COMM5, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
[all …]
/linux-6.12.1/include/drm/display/
Ddrm_dsc.h1 /* SPDX-License-Identifier: MIT
19 #define DSC_RANGE_BPG_OFFSET_MASK 0x3f
31 #define DSC_PPS_LSB_MASK (0xFF << 0)
32 #define DSC_PPS_BPP_HIGH_MASK (0x3 << 8)
37 #define DSC_PPS_INIT_XMIT_DELAY_HIGH_MASK (0x3 << 8)
38 #define DSC_PPS_SCALE_DEC_INT_HIGH_MASK (0xF << 8)
45 * struct drm_dsc_rc_range_parameters - DSC Rate Control range parameters
67 * struct drm_dsc_config - Parameters required to configure DSC
84 * Flag to indicate if RGB - YCoCg conversion is needed
173 u16 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1];
[all …]
/linux-6.12.1/drivers/video/fbdev/omap2/omapfb/dss/
Dhdmi5_core.c1 // SPDX-License-Identifier: GPL-2.0-only
30 [0] = { 7036, 0, 0, 32, 0, 7036, 0, 32, 0, 0, 7036, 32, },
32 [1] = { 7015, 0, 0, 128, 0, 7015, 0, 128, 0, 0, 7015, 128, },
34 [2] = { 7010, 0, 0, 512, 0, 7010, 0, 512, 0, 0, 7010, 512, },
36 [3] = { 8192, 0, 0, 0, 0, 8192, 0, 0, 0, 0, 8192, 0, },
41 void __iomem *base = core->base; in hdmi_core_ddc_init()
56 REG_FLD_MOD(base, HDMI_CORE_I2CM_SOFTRSTZ, 0, 0, 0); in hdmi_core_ddc_init()
58 0, 0, 1) != 1) in hdmi_core_ddc_init()
61 /* Standard (0) or Fast (1) Mode */ in hdmi_core_ddc_init()
62 REG_FLD_MOD(base, HDMI_CORE_I2CM_DIV, 0, 3, 3); in hdmi_core_ddc_init()
[all …]

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