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/linux-6.12.1/drivers/cpufreq/
Dqcom-cpufreq-nvmem.c1 // SPDX-License-Identifier: GPL-2.0
10 * defines the voltage and frequency value based on the msm-id in SMEM
12 * The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
15 * operating-points-v2 table when it is parsed by the OPP framework.
23 #include <linux/nvmem-consumer.h>
33 #include <dt-bindings/arm/qcom,ids.h>
84 drv->versions = 1 << *speedbin; in qcom_cpufreq_simple_get_version()
90 int *speed, int *pvs, in get_krait_bin_format_a() argument
108 *pvs = (pte_efuse >> 10) & 0x7; in get_krait_bin_format_a()
109 if (*pvs == 0x7) in get_krait_bin_format_a()
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/linux-6.12.1/Documentation/devicetree/bindings/regulator/
Dpv88080.txt4 - compatible: Must be one of the following, depending on the
6 - "pvs,pv88080" (DEPRECATED)
8 - "pvs,pv88080-aa" for PV88080 AA or AB silicon
9 - "pvs,pv88080-ba" for PV88080 BA or BB silicon
11 - reg: I2C slave address, usually 0x49
12 - interrupts: the interrupt outputs of the controller
13 - regulators: A node that houses a sub-node for each regulator within the
14 device. Each sub-node is identified using the node's name, with valid
15 values listed below. The content of each sub-node is defined by the
20 - Any optional property defined in regulator.txt
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Dpv88090.txt4 - compatible: "pvs,pv88090".
5 - reg: I2C slave address, usually 0x48.
6 - interrupts: the interrupt outputs of the controller
7 - regulators: A node that houses a sub-node for each regulator within the
8 device. Each sub-node is identified using the node's name, with valid
9 values listed below. The content of each sub-node is defined by the
14 - Any optional property defined in regulator.txt
19 compatible = "pvs,pv88090";
21 interrupt-parent = <&gpio>;
26 regulator-name = "buck1";
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Dpv88060.txt4 - compatible: "pvs,pv88060".
5 - reg: I2C slave address, usually 0x49.
6 - interrupts: the interrupt outputs of the controller
7 - regulators: A node that houses a sub-node for each regulator within the
8 device. Each sub-node is identified using the node's name, with valid
9 values listed below. The content of each sub-node is defined by the
15 - Any optional property defined in regulator.txt
20 compatible = "pvs,pv88060";
22 interrupt-parent = <&gpio>;
27 regulator-name = "buck1";
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/linux-6.12.1/drivers/regulator/
Dpv88080-regulator.c1 // SPDX-License-Identifier: GPL-2.0+
3 // pv88080-regulator.c - Regulator device driver for PV88080
19 #include "pv88080-regulator.h"
69 struct pv88080_buck_regmap buck_regmap[PV88080_MAX_REGULATORS-1];
201 ret = regmap_read(rdev->regmap, info->mode_reg, &data); in pv88080_buck_get_mode()
216 return -EINVAL; in pv88080_buck_get_mode()
239 return -EINVAL; in pv88080_buck_set_mode()
242 return regmap_update_bits(rdev->regmap, info->mode_reg, in pv88080_buck_set_mode()
280 .n_voltages = ((max) - (min))/(step) + 1, \
298 .n_voltages = ((max) - (min))/(step) + 1, \
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Dpv88090-regulator.c1 // SPDX-License-Identifier: GPL-2.0+
3 // pv88090-regulator.c - Regulator device driver for PV88090
17 #include "pv88090-regulator.h"
96 ret = regmap_read(rdev->regmap, info->conf, &data); in pv88090_buck_get_mode()
132 return -EINVAL; in pv88090_buck_set_mode()
135 return regmap_update_bits(rdev->regmap, info->conf, in pv88090_buck_set_mode()
173 .n_voltages = ((max) - (min))/(step) + 1, \
199 .n_voltages = ((max) - (min))/(step) + 1, \
223 err = regmap_read(chip->regmap, PV88090_REG_EVENT_A, &reg_val); in pv88090_irq_handler()
229 if (chip->rdev[i] != NULL) in pv88090_irq_handler()
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Dpv88060-regulator.c1 // SPDX-License-Identifier: GPL-2.0+
3 // pv88060-regulator.c - Regulator device driver for PV88060
17 #include "pv88060-regulator.h"
74 ret = regmap_read(rdev->regmap, info->conf, &data); in pv88060_buck_get_mode()
110 return -EINVAL; in pv88060_buck_set_mode()
113 return regmap_update_bits(rdev->regmap, info->conf, in pv88060_buck_set_mode()
157 .n_voltages = ((max) - (min))/(step) + 1,\
182 .n_voltages = (step) ? ((max - min) / step + 1) : 1, \
230 err = regmap_read(chip->regmap, PV88060_REG_EVENT_A, &reg_val); in pv88060_irq_handler()
236 if (chip->rdev[i] != NULL) in pv88060_irq_handler()
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/linux-6.12.1/Documentation/devicetree/bindings/nvmem/
Dnvmem.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
23 "#address-cells":
26 "#size-cells":
29 read-only:
34 wp-gpios:
36 GPIO to which the write-protect pin of the chip is connected.
37 The write-protect GPIO is asserted, when it's driven high
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/linux-6.12.1/Documentation/devicetree/bindings/opp/
Dopp-v2-kryo-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ilia Lin <ilia.lin@kernel.org>
13 - $ref: opp-v2-base.yaml#
22 The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide
25 operating-points-v2 table when it is parsed by the OPP framework.
30 - operating-points-v2-krait-cpu
31 - operating-points-v2-kryo-cpu
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/linux-6.12.1/drivers/pmdomain/qcom/
Dcpr.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
27 #include <linux/nvmem-consumer.h>
29 /* Register Offsets for RB-CPR and Bit Definitions */
125 #define FUSE_REVISION_UNKNOWN (-1)
254 return !drv->loop_disabled; in cpr_is_allowed()
259 writel_relaxed(value, drv->base + offset); in cpr_write()
264 return readl_relaxed(drv->base + offset); in cpr_read()
272 val = readl_relaxed(drv->base + offset); in cpr_masked_write()
275 writel_relaxed(val, drv->base + offset); in cpr_masked_write()
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/linux-6.12.1/drivers/gpu/drm/vc4/
Dvc4_hvs.c1 // SPDX-License-Identifier: GPL-2.0-only
17 * be consumed by the PVs. This file just manages the resources for
31 #include <soc/bcm2835/raspberrypi-firmware.h>
72 struct drm_device *drm = &hvs->vc4->base; in vc4_hvs_dump_state()
73 struct drm_printer p = drm_info_printer(&hvs->pdev->dev); in vc4_hvs_dump_state()
79 drm_print_regset32(&p, &hvs->regset); in vc4_hvs_dump_state()
85 readl((u32 __iomem *)hvs->dlist + i + 0), in vc4_hvs_dump_state()
86 readl((u32 __iomem *)hvs->dlist + i + 1), in vc4_hvs_dump_state()
87 readl((u32 __iomem *)hvs->dlist + i + 2), in vc4_hvs_dump_state()
88 readl((u32 __iomem *)hvs->dlist + i + 3)); in vc4_hvs_dump_state()
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