/linux-6.12.1/kernel/irq/ |
D | cpuhotplug.c | 1 // SPDX-License-Identifier: GPL-2.0 19 /* For !GENERIC_IRQ_EFFECTIVE_AFF_MASK this looks at general affinity mask */ 28 * which do not implement effective affinity, but the architecture has in irq_needs_fixup() 29 * enabled the config switch. Use the general affinity mask instead. in irq_needs_fixup() 45 pr_warn("Eff. affinity %*pbl of IRQ %u contains only offline CPUs after offlining CPU %u\n", in irq_needs_fixup() 46 cpumask_pr_args(m), d->irq, cpu); in irq_needs_fixup() 58 const struct cpumask *affinity; in migrate_one_irq() local 64 * still in the radix tree. Also if the chip has no affinity setter, in migrate_one_irq() 67 if (!chip || !chip->irq_set_affinity) { in migrate_one_irq() 68 pr_debug("IRQ %u: Unable to migrate away\n", d->irq); in migrate_one_irq() [all …]
|
D | irqdesc.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar 4 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King 7 * information is available in Documentation/core-api/genericirq.rst 22 * lockdep: we want to handle all irq_desc locks as a single lock-class: 56 if (!zalloc_cpumask_var_node(&desc->irq_common_data.affinity, in alloc_masks() 58 return -ENOMEM; in alloc_masks() 61 if (!zalloc_cpumask_var_node(&desc->irq_common_data.effective_affinity, in alloc_masks() 63 free_cpumask_var(desc->irq_common_data.affinity); in alloc_masks() 64 return -ENOMEM; in alloc_masks() [all …]
|
D | affinity.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Copyright (C) 2016-2017 Christoph Hellwig. 14 affd->nr_sets = 1; in default_calc_sets() 15 affd->set_size[0] = affvecs; in default_calc_sets() 19 * irq_create_affinity_masks - Create affinity masks for multiqueue spreading 21 * @affd: Description of the affinity requirements 37 if (nvecs > affd->pre_vectors + affd->post_vectors) in irq_create_affinity_masks() 38 affvecs = nvecs - affd->pre_vectors - affd->post_vectors; in irq_create_affinity_masks() 46 if (!affd->calc_sets) in irq_create_affinity_masks() 47 affd->calc_sets = default_calc_sets; in irq_create_affinity_masks() [all …]
|
/linux-6.12.1/Documentation/arch/arm64/ |
D | asymmetric-32bit.rst | 2 Asymmetric 32-bit SoCs 7 This document describes the impact of asymmetric 32-bit SoCs on the 8 execution of 32-bit (``AArch32``) applications. 10 Date: 2021-05-17 16 of the CPUs are capable of executing 32-bit user applications. On such 19 ``execve(2)`` of 32-bit ELF binaries, with the latter returning 20 ``-ENOEXEC``. If the mismatch is detected during late onlining of a 21 64-bit-only CPU, then the onlining operation fails and the new CPU is 25 running legacy 32-bit binaries. Unsurprisingly, that doesn't work very 28 It seems inevitable that future SoCs will drop 32-bit support [all …]
|
/linux-6.12.1/lib/ |
D | cpu_rmap.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * cpu_rmap.c: CPU affinity reverse-map support 13 * objects with CPU affinities. This can be seen as a reverse-map of 14 * CPU affinity. However, we do not assume that the object affinities 21 * alloc_cpu_rmap - allocate CPU affinity reverse-map 39 rmap = kzalloc(obj_offset + size * sizeof(rmap->obj[0]), flags); in alloc_cpu_rmap() 43 kref_init(&rmap->refcount); in alloc_cpu_rmap() 44 rmap->obj = (void **)((char *)rmap + obj_offset); in alloc_cpu_rmap() 50 * any newly-hotplugged CPUs to have some object assigned. in alloc_cpu_rmap() 53 rmap->near[cpu].index = cpu % size; in alloc_cpu_rmap() [all …]
|
/linux-6.12.1/tools/perf/util/ |
D | affinity.c | 1 // SPDX-License-Identifier: GPL-2.0 2 /* Manage affinity to optimize IPIs inside the kernel perf API. */ 10 #include "affinity.h" 14 int sz = cpu__max_cpu().cpu + 8 - 1; in get_cpu_set_size() 24 int affinity__setup(struct affinity *a) in affinity__setup() 28 a->orig_cpus = bitmap_zalloc(cpu_set_size * 8); in affinity__setup() 29 if (!a->orig_cpus) in affinity__setup() 30 return -1; in affinity__setup() 31 sched_getaffinity(0, cpu_set_size, (cpu_set_t *)a->orig_cpus); in affinity__setup() 32 a->sched_cpus = bitmap_zalloc(cpu_set_size * 8); in affinity__setup() [all …]
|
D | affinity.h | 1 // SPDX-License-Identifier: GPL-2.0 7 struct affinity { struct 13 void affinity__cleanup(struct affinity *a); argument 14 void affinity__set(struct affinity *a, int cpu); 15 int affinity__setup(struct affinity *a);
|
D | evlist.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 30 * NOTREADY --(0)--> RUNNING --(1)--> DATA_PENDING --(2)--> EMPTY 200 int affinity, int flush, int comp_level); 238 return list_empty(&evlist->core.entries); in evlist__empty() 243 struct perf_evsel *evsel = perf_evlist__first(&evlist->core); in evlist__first() 250 struct perf_evsel *evsel = perf_evlist__last(&evlist->core); in evlist__last() 257 return perf_evlist__nr_groups(&evlist->core); in evlist__nr_groups() 267 * __evlist__for_each_entry - iterate thru all the evsels 275 * evlist__for_each_entry - iterate thru all the evsels 280 __evlist__for_each_entry(&(evlist)->core.entries, evsel) [all …]
|
/linux-6.12.1/tools/virtio/ringtest/ |
D | run-on-all.sh | 2 # SPDX-License-Identifier: GPL-2.0 4 CPUS_ONLINE=$(lscpu --online -p=cpu|grep -v -e '#') 8 HOST_AFFINITY=$(echo "${CPUS_ONLINE}"|tail -n 1) 16 (echo "$@" | grep -e "--sleep" > /dev/null) || \ 19 echo "GUEST AFFINITY $cpu" 20 "$@" --host-affinity $HOST_AFFINITY --guest-affinity $cpu 23 echo "NO GUEST AFFINITY" 24 "$@" --host-affinity $HOST_AFFINITY 25 echo "NO AFFINITY"
|
/linux-6.12.1/drivers/infiniband/hw/hfi1/ |
D | affinity.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 3 * Copyright(c) 2015 - 2020 Intel Corporation. 35 /* Initialize non-HT cpu cores mask */ 37 /* Initialize driver affinity data */ 40 * Set IRQ affinity to a CPU. The function will determine the 41 * CPU and set the affinity to it. 46 * Remove the IRQ's CPU affinity. This function also updates 52 * Determine a CPU affinity for a user process, if the process does not 53 * have an affinity set yet. 77 struct mutex lock; /* protects affinity nodes */
|
D | affinity.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 3 * Copyright(c) 2015 - 2020 Intel Corporation. 12 #include "affinity.h" 35 cpumask_clear(&set->mask); in init_cpu_mask_set() 36 cpumask_clear(&set->used); in init_cpu_mask_set() 37 set->gen = 0; in init_cpu_mask_set() 43 if (cpumask_equal(&set->mask, &set->used)) { in _cpu_mask_set_gen_inc() 48 set->gen++; in _cpu_mask_set_gen_inc() 49 cpumask_clear(&set->used); in _cpu_mask_set_gen_inc() 55 if (cpumask_empty(&set->used) && set->gen) { in _cpu_mask_set_gen_dec() [all …]
|
/linux-6.12.1/tools/testing/selftests/rseq/ |
D | basic_test.c | 1 // SPDX-License-Identifier: LGPL-2.1 18 cpu_set_t affinity, test_affinity; in test_cpu_pointer() local 21 sched_getaffinity(0, sizeof(affinity), &affinity); in test_cpu_pointer() 24 if (CPU_ISSET(i, &affinity)) { in test_cpu_pointer() 39 sched_setaffinity(0, sizeof(affinity), &affinity); in test_cpu_pointer() 59 return -1; in main()
|
/linux-6.12.1/tools/power/cpupower/bench/ |
D | system.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* cpufreq-bench CPUFreq microbenchmark 43 * @retval -1 when failed 54 return -1; in set_cpufreq_governor() 60 return -1; in set_cpufreq_governor() 67 * sets cpu affinity for the process 69 * @param cpu cpu# to which the affinity should be set 72 * @retval -1 when setting the affinity failed 82 dprintf("set affinity to cpu #%u\n", cpu); in set_cpu_affinity() 86 fprintf(stderr, "warning: unable to set cpu affinity\n"); in set_cpu_affinity() [all …]
|
/linux-6.12.1/include/linux/ |
D | cpu_rmap.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 6 * cpu_rmap.c: CPU affinity reverse-map support 16 * struct cpu_rmap - CPU affinity reverse-map 18 * @size: Number of objects to be reverse-mapped 21 * based on affinity masks 39 const struct cpumask *affinity); 43 return rmap->near[cpu].index; in cpu_rmap_lookup_index() 48 return rmap->obj[rmap->near[cpu].index]; in cpu_rmap_lookup_obj() 52 * alloc_irq_cpu_rmap - allocate CPU affinity reverse-map for IRQs
|
D | irq.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 10 * Thanks. --rmk 36 * Bits 0-7 are the same as the IRQF_* bits in linux/interrupt.h 38 * IRQ_TYPE_NONE - default, unspecified type 39 * IRQ_TYPE_EDGE_RISING - rising edge triggered 40 * IRQ_TYPE_EDGE_FALLING - falling edge triggered 41 * IRQ_TYPE_EDGE_BOTH - rising and falling edge triggered 42 * IRQ_TYPE_LEVEL_HIGH - high level triggered 43 * IRQ_TYPE_LEVEL_LOW - low level triggered 44 * IRQ_TYPE_LEVEL_MASK - Mask to filter out the level bits [all …]
|
D | interrupt.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 44 * IRQF_SHARED - allow sharing the irq among several devices 45 * IRQF_PROBE_SHARED - set by callers when they expect sharing mismatches to occur 46 * IRQF_TIMER - Flag to mark this interrupt as timer interrupt 47 * IRQF_PERCPU - Interrupt is per cpu 48 * IRQF_NOBALANCING - Flag to exclude this interrupt from irq balancing 49 * IRQF_IRQPOLL - Interrupt is used for polling (only the interrupt that is 52 * IRQF_ONESHOT - Interrupt is not reenabled after the hardirq handler finished. 55 * IRQF_NO_SUSPEND - Do not disable this IRQ during suspend. Does not guarantee 57 * state. See Documentation/power/suspend-and-interrupts.rst [all …]
|
/linux-6.12.1/Documentation/core-api/ |
D | workqueue.rst | 33 thread system-wide. A single MT wq needed to keep around the same 60 * Use per-CPU unified worker pools shared by all wq to provide 85 worker-pools. 87 The cmwq design differentiates between the user-facing workqueues that 89 which manages worker-pools and processes the queued work items. 91 There are two worker-pools, one for normal work items and the other 93 worker-pools to serve work items queued on unbound workqueues - the 98 Each per-CPU BH worker pool contains only one pseudo worker which represents 110 When a work item is queued to a workqueue, the target worker-pool is 112 and appended on the shared worklist of the worker-pool. For example, [all …]
|
/linux-6.12.1/drivers/pci/msi/ |
D | api.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * PCI MSI/MSI-X — Exported APIs for device drivers 5 * Copyright (C) 2003-2004 Intel 17 * pci_enable_msi() - Enable MSI interrupt mode on device 22 * Linux IRQ will be saved at @dev->irq. The driver must invoke 40 * pci_disable_msi() - Disable MSI interrupt mode on device 45 * The PCI device Linux IRQ (@dev->irq) is restored to its default 46 * pin-assertion IRQ. This is the cleanup pair of pci_enable_msi(). 53 if (!pci_msi_enabled() || !dev || !dev->msi_enabled) in pci_disable_msi() 56 msi_lock_descs(&dev->dev); in pci_disable_msi() [all …]
|
/linux-6.12.1/drivers/md/ |
D | dm-ps-io-affinity.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include "dm-path-selector.h" 9 #include <linux/device-mapper.h> 12 #define DM_MSG_PREFIX "multipath io-affinity" 29 struct path_info *pi = s->path_map[cpu]; in ioa_free_path() 34 if (refcount_dec_and_test(&pi->refcount)) { in ioa_free_path() 35 cpumask_clear_cpu(cpu, s->path_mask); in ioa_free_path() 36 free_cpumask_var(pi->cpumask); in ioa_free_path() 39 s->path_map[cpu] = NULL; in ioa_free_path() 46 struct selector *s = ps->context; in ioa_add_path() [all …]
|
/linux-6.12.1/arch/mips/kernel/ |
D | mips-mt-fpaff.c | 1 // SPDX-License-Identifier: GPL-2.0 21 * CPU mask used to set process affinity for MT VPEs/TCs with FPUs 25 static int fpaff_threshold = -1; 31 * FPU affinity with the user's requested processor affinity. 38 * find_process_by_pid - find a process with a matching PID value. 57 match = (uid_eq(cred->euid, pcred->euid) || in check_same_owner() 58 uid_eq(cred->euid, pcred->uid)); in check_same_owner() 64 * mipsmt_sys_sched_setaffinity - set the cpu affinity of a process 75 return -EINVAL; in mipsmt_sys_sched_setaffinity() 78 return -EFAULT; in mipsmt_sys_sched_setaffinity() [all …]
|
/linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/ |
D | apple,aic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/apple,aic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Hector Martin <marcan@marcan.st> 19 - Level-triggered hardware IRQs wired to SoC blocks 20 - Single mask bit per IRQ 21 - Per-IRQ affinity setting 22 - Automatic masking on event delivery (auto-ack) 23 - Software triggering (ORed with hw line) [all …]
|
/linux-6.12.1/arch/arm64/kernel/ |
D | setup.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 1995-2001 Russell King 105 * smp_build_mpidr_hash - Pre-compute shifts required at each affinity 112 u32 i, affinity, fs[4], bits[4], ls; in smp_build_mpidr_hash() local 115 * Pre-scan the list of MPIDRS and filter out bits that do in smp_build_mpidr_hash() 116 * not contribute to affinity levels, ie they never toggle. in smp_build_mpidr_hash() 122 * Find and stash the last and first bit set at all affinity levels to in smp_build_mpidr_hash() 126 affinity = MPIDR_AFFINITY_LEVEL(mask, i); in smp_build_mpidr_hash() 130 * to express the affinity level. in smp_build_mpidr_hash() 132 ls = fls(affinity); in smp_build_mpidr_hash() [all …]
|
/linux-6.12.1/drivers/perf/ |
D | arm_pmu_platform.c | 1 // SPDX-License-Identifier: GPL-2.0 30 int ret = -ENODEV; in probe_current_pmu() 34 for (; info->init != NULL; info++) { in probe_current_pmu() 35 if ((cpuid & info->mask) != info->cpuid) in probe_current_pmu() 37 ret = info->init(pmu); in probe_current_pmu() 48 struct pmu_hw_events __percpu *hw_events = pmu->hw_events; in pmu_parse_percpu_irq() 50 ret = irq_get_percpu_devid_partition(irq, &pmu->supported_cpus); in pmu_parse_percpu_irq() 54 for_each_cpu(cpu, &pmu->supported_cpus) in pmu_parse_percpu_irq() 55 per_cpu(hw_events->irq, cpu) = irq; in pmu_parse_percpu_irq() 62 return of_property_present(node, "interrupt-affinity"); in pmu_has_irq_affinity() [all …]
|
/linux-6.12.1/drivers/gpu/drm/amd/amdkfd/ |
D | kfd_crat.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */ 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 87 * ComputeUnit Affinity structure and definitions 122 * HSA Memory Affinity structure and definitions 143 uint8_t reserved2[CRAT_MEMORY_RESERVED_LENGTH - 1]; 147 * HSA Cache Affinity structure and definitions 176 * HSA TLB Affinity structure and definitions 211 * HSA CCompute/APU Affinity structure and definitions 230 * HSA IO Link Affinity structure and definitions 279 uint8_t reserved2[CRAT_IOLINK_RESERVED_LENGTH - 1]; [all …]
|
/linux-6.12.1/Documentation/core-api/irq/ |
D | irq-affinity.rst | 2 SMP IRQ affinity 6 - Started by Ingo Molnar <mingo@redhat.com> 7 - Update by Max Krasnyansky <maxk@qualcomm.com> 14 IRQ affinity then the value will not change from the default of all cpus. 16 /proc/irq/default_smp_affinity specifies default affinity mask that applies 17 to all non-active IRQs. Once IRQ is allocated/activated its affinity bitmask 21 Here is an example of restricting IRQ44 (eth1) to CPU0-3 then restricting 22 it to CPU4-7 (this is an 8-CPU SMP box):: 31 [root@moon 44]# ping -f h 34 --- hell ping statistics --- [all …]
|