/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
D | umc_v8_7.c | 44 uint32_t umc_inst, in get_umc_v8_7_reg_offset() 51 uint32_t umc_inst, uint32_t ch_inst, in umc_v8_7_ecc_info_query_correctable_error_count() 70 uint32_t umc_inst, uint32_t ch_inst, in umc_v8_7_ecc_info_querry_uncorrectable_error_count() 95 uint32_t umc_inst = 0; in umc_v8_7_ecc_info_query_ras_error_count() local 113 uint32_t ch_inst, uint32_t umc_inst) in umc_v8_7_convert_error_address() 133 uint32_t umc_inst) in umc_v8_7_ecc_info_query_error_address() 165 uint32_t umc_inst = 0; in umc_v8_7_ecc_info_query_ras_error_address() local 220 uint32_t umc_inst = 0; in umc_v8_7_clear_error_count() local 306 uint32_t umc_inst = 0; in umc_v8_7_query_ras_error_count() local 330 uint32_t umc_inst) in umc_v8_7_query_error_address() [all …]
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D | umc_v6_7.c | 47 uint32_t umc_inst, in get_umc_v6_7_reg_offset() 95 uint32_t umc_inst, uint32_t ch_inst, in umc_v6_7_ecc_info_query_correctable_error_count() 137 uint32_t umc_inst, uint32_t ch_inst, in umc_v6_7_ecc_info_querry_uncorrectable_error_count() 164 uint32_t node_inst, uint32_t umc_inst, in umc_v6_7_ecc_info_querry_ecc_error_count() 189 uint32_t ch_inst, uint32_t umc_inst) in umc_v6_7_convert_error_address() 223 uint32_t node_inst, uint32_t umc_inst, in umc_v6_7_ecc_info_query_error_address() 265 uint32_t umc_inst) in umc_v6_7_query_correctable_error_count() 362 uint32_t node_inst, uint32_t umc_inst, in umc_v6_7_reset_error_count_per_channel() 413 uint32_t node_inst, uint32_t umc_inst, in umc_v6_7_query_ecc_error_count() 442 uint32_t node_inst, uint32_t umc_inst, in umc_v6_7_query_error_address()
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D | umc_v8_10.c | 72 uint32_t umc_inst, in get_umc_v8_10_reg_offset() 80 uint32_t node_inst, uint32_t umc_inst, in umc_v8_10_clear_error_count_per_channel() 144 uint32_t node_inst, uint32_t umc_inst, in umc_v8_10_query_ecc_error_count() 207 uint32_t ch_inst, uint32_t umc_inst, in umc_v8_10_convert_error_address() 245 uint32_t node_inst, uint32_t umc_inst, in umc_v8_10_query_error_address() 295 uint32_t node_inst, uint32_t umc_inst, in umc_v8_10_err_cnt_init_per_channel() 336 uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, in umc_v8_10_ecc_info_query_correctable_error_count() 355 uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, in umc_v8_10_ecc_info_query_uncorrectable_error_count() 380 uint32_t node_inst, uint32_t umc_inst, in umc_v8_10_ecc_info_query_ecc_error_count() 402 uint32_t node_inst, uint32_t umc_inst, in umc_v8_10_ecc_info_query_error_address()
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D | umc_v6_1.c | 88 uint32_t umc_inst, in get_umc_6_reg_offset() 147 uint32_t umc_inst = 0; in umc_v6_1_clear_error_count() local 259 uint32_t umc_inst = 0; in umc_v6_1_query_ras_error_count() local 299 uint32_t umc_inst) in umc_v6_1_query_error_address() 358 uint32_t umc_inst = 0; in umc_v6_1_query_ras_error_address() local 431 uint32_t umc_inst = 0; in umc_v6_1_err_cnt_init() local
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D | amdgpu_umc.c | 33 uint32_t ch_inst, uint32_t umc_inst) in amdgpu_umc_convert_error_address() 50 uint64_t err_addr, uint32_t ch_inst, uint32_t umc_inst) in amdgpu_umc_page_retirement_mca() 361 uint32_t umc_inst) in amdgpu_umc_fill_error_record() 390 uint32_t umc_inst = 0; in amdgpu_umc_loop_channels() local
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D | amdgpu_umc.h | 45 #define LOOP_UMC_INST(umc_inst) for ((umc_inst) = 0; (umc_inst) < adev->umc.umc_inst_num; (umc_inst… argument 47 #define LOOP_UMC_INST_AND_CH(umc_inst, ch_inst) LOOP_UMC_INST((umc_inst)) LOOP_UMC_CH_INST((ch_inst… argument 52 #define LOOP_UMC_EACH_NODE_INST_AND_CH(node_inst, umc_inst, ch_inst) \ argument
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D | umc_v12_0.c | 36 uint32_t umc_inst, in get_umc_v12_0_reg_offset() 50 uint32_t node_inst, uint32_t umc_inst, in umc_v12_0_reset_error_count_per_channel() 137 uint32_t node_inst, uint32_t umc_inst, in umc_v12_0_query_error_count() 329 uint32_t node_inst, uint32_t umc_inst, in umc_v12_0_query_error_address() 394 uint32_t node_inst, uint32_t umc_inst, in umc_v12_0_err_cnt_init_per_channel()
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D | ta_ras_if.h | 147 uint32_t umc_inst; member
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D | amdgpu_ras.c | 4166 uint32_t umc_inst = 0, ch_inst = 0; in amdgpu_bad_page_notifier() local
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