1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2/* 3 * Device Tree Source for the R-Car V4H (R8A779G0) SoC 4 * 5 * Copyright (C) 2022 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a779g0-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a779g0-sysc.h> 11 12/ { 13 compatible = "renesas,r8a779g0"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 /* External Audio clock - to be overridden by boards that provide it */ 18 audio_clkin: audio_clkin { 19 compatible = "fixed-clock"; 20 #clock-cells = <0>; 21 clock-frequency = <0>; 22 }; 23 24 /* External CAN clock - to be overridden by boards that provide it */ 25 can_clk: can { 26 compatible = "fixed-clock"; 27 #clock-cells = <0>; 28 clock-frequency = <0>; 29 }; 30 31 cluster0_opp: opp-table-0 { 32 compatible = "operating-points-v2"; 33 opp-shared; 34 35 opp-500000000 { 36 opp-hz = /bits/ 64 <500000000>; 37 opp-microvolt = <825000>; 38 clock-latency-ns = <500000>; 39 }; 40 opp-1000000000 { 41 opp-hz = /bits/ 64 <1000000000>; 42 opp-microvolt = <825000>; 43 clock-latency-ns = <500000>; 44 }; 45 opp-1500000000 { 46 opp-hz = /bits/ 64 <1500000000>; 47 opp-microvolt = <825000>; 48 clock-latency-ns = <500000>; 49 }; 50 opp-1700000000 { 51 opp-hz = /bits/ 64 <1700000000>; 52 opp-microvolt = <825000>; 53 clock-latency-ns = <500000>; 54 opp-suspend; 55 }; 56 opp-1800000000 { 57 opp-hz = /bits/ 64 <1800000000>; 58 opp-microvolt = <880000>; 59 clock-latency-ns = <500000>; 60 turbo-mode; 61 }; 62 }; 63 64 cpus { 65 #address-cells = <1>; 66 #size-cells = <0>; 67 68 cpu-map { 69 cluster0 { 70 core0 { 71 cpu = <&a76_0>; 72 }; 73 core1 { 74 cpu = <&a76_1>; 75 }; 76 }; 77 78 cluster1 { 79 core0 { 80 cpu = <&a76_2>; 81 }; 82 core1 { 83 cpu = <&a76_3>; 84 }; 85 }; 86 }; 87 88 a76_0: cpu@0 { 89 compatible = "arm,cortex-a76"; 90 reg = <0>; 91 device_type = "cpu"; 92 power-domains = <&sysc R8A779G0_PD_A1E0D0C0>; 93 next-level-cache = <&L3_CA76_0>; 94 enable-method = "psci"; 95 cpu-idle-states = <&CPU_SLEEP_0>; 96 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 97 operating-points-v2 = <&cluster0_opp>; 98 }; 99 100 a76_1: cpu@100 { 101 compatible = "arm,cortex-a76"; 102 reg = <0x100>; 103 device_type = "cpu"; 104 power-domains = <&sysc R8A779G0_PD_A1E0D0C1>; 105 next-level-cache = <&L3_CA76_0>; 106 enable-method = "psci"; 107 cpu-idle-states = <&CPU_SLEEP_0>; 108 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 109 operating-points-v2 = <&cluster0_opp>; 110 }; 111 112 a76_2: cpu@10000 { 113 compatible = "arm,cortex-a76"; 114 reg = <0x10000>; 115 device_type = "cpu"; 116 power-domains = <&sysc R8A779G0_PD_A1E0D1C0>; 117 next-level-cache = <&L3_CA76_1>; 118 enable-method = "psci"; 119 cpu-idle-states = <&CPU_SLEEP_0>; 120 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 121 operating-points-v2 = <&cluster0_opp>; 122 }; 123 124 a76_3: cpu@10100 { 125 compatible = "arm,cortex-a76"; 126 reg = <0x10100>; 127 device_type = "cpu"; 128 power-domains = <&sysc R8A779G0_PD_A1E0D1C1>; 129 next-level-cache = <&L3_CA76_1>; 130 enable-method = "psci"; 131 cpu-idle-states = <&CPU_SLEEP_0>; 132 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 133 operating-points-v2 = <&cluster0_opp>; 134 }; 135 136 idle-states { 137 entry-method = "psci"; 138 139 CPU_SLEEP_0: cpu-sleep-0 { 140 compatible = "arm,idle-state"; 141 arm,psci-suspend-param = <0x0010000>; 142 local-timer-stop; 143 entry-latency-us = <400>; 144 exit-latency-us = <500>; 145 min-residency-us = <4000>; 146 }; 147 }; 148 149 L3_CA76_0: cache-controller-0 { 150 compatible = "cache"; 151 power-domains = <&sysc R8A779G0_PD_A2E0D0>; 152 cache-unified; 153 cache-level = <3>; 154 }; 155 156 L3_CA76_1: cache-controller-1 { 157 compatible = "cache"; 158 power-domains = <&sysc R8A779G0_PD_A2E0D1>; 159 cache-unified; 160 cache-level = <3>; 161 }; 162 }; 163 164 extal_clk: extal { 165 compatible = "fixed-clock"; 166 #clock-cells = <0>; 167 /* This value must be overridden by the board */ 168 clock-frequency = <0>; 169 }; 170 171 extalr_clk: extalr { 172 compatible = "fixed-clock"; 173 #clock-cells = <0>; 174 /* This value must be overridden by the board */ 175 clock-frequency = <0>; 176 }; 177 178 pcie0_clkref: pcie0-clkref { 179 compatible = "fixed-clock"; 180 #clock-cells = <0>; 181 /* This value must be overridden by the board */ 182 clock-frequency = <0>; 183 }; 184 185 pcie1_clkref: pcie1-clkref { 186 compatible = "fixed-clock"; 187 #clock-cells = <0>; 188 /* This value must be overridden by the board */ 189 clock-frequency = <0>; 190 }; 191 192 pmu_a76 { 193 compatible = "arm,cortex-a76-pmu"; 194 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 195 }; 196 197 psci { 198 compatible = "arm,psci-1.0", "arm,psci-0.2"; 199 method = "smc"; 200 }; 201 202 /* External SCIF clocks - to be overridden by boards that provide them */ 203 scif_clk: scif { 204 compatible = "fixed-clock"; 205 #clock-cells = <0>; 206 clock-frequency = <0>; 207 }; 208 209 scif_clk2: scif2 { 210 compatible = "fixed-clock"; 211 #clock-cells = <0>; 212 clock-frequency = <0>; 213 }; 214 215 soc: soc { 216 compatible = "simple-bus"; 217 interrupt-parent = <&gic>; 218 #address-cells = <2>; 219 #size-cells = <2>; 220 ranges; 221 222 rwdt: watchdog@e6020000 { 223 compatible = "renesas,r8a779g0-wdt", 224 "renesas,rcar-gen4-wdt"; 225 reg = <0 0xe6020000 0 0x0c>; 226 interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; 227 clocks = <&cpg CPG_MOD 907>; 228 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 229 resets = <&cpg 907>; 230 status = "disabled"; 231 }; 232 233 pfc: pinctrl@e6050000 { 234 compatible = "renesas,pfc-r8a779g0"; 235 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, 236 <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, 237 <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, 238 <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>, 239 <0 0xe6068000 0 0x16c>; 240 }; 241 242 gpio0: gpio@e6050180 { 243 compatible = "renesas,gpio-r8a779g0", 244 "renesas,rcar-gen4-gpio"; 245 reg = <0 0xe6050180 0 0x54>; 246 interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>; 247 clocks = <&cpg CPG_MOD 915>; 248 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 249 resets = <&cpg 915>; 250 gpio-controller; 251 #gpio-cells = <2>; 252 gpio-ranges = <&pfc 0 0 19>; 253 interrupt-controller; 254 #interrupt-cells = <2>; 255 }; 256 257 gpio1: gpio@e6050980 { 258 compatible = "renesas,gpio-r8a779g0", 259 "renesas,rcar-gen4-gpio"; 260 reg = <0 0xe6050980 0 0x54>; 261 interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>; 262 clocks = <&cpg CPG_MOD 915>; 263 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 264 resets = <&cpg 915>; 265 gpio-controller; 266 #gpio-cells = <2>; 267 gpio-ranges = <&pfc 0 32 29>; 268 interrupt-controller; 269 #interrupt-cells = <2>; 270 }; 271 272 gpio2: gpio@e6058180 { 273 compatible = "renesas,gpio-r8a779g0", 274 "renesas,rcar-gen4-gpio"; 275 reg = <0 0xe6058180 0 0x54>; 276 interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>; 277 clocks = <&cpg CPG_MOD 916>; 278 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 279 resets = <&cpg 916>; 280 gpio-controller; 281 #gpio-cells = <2>; 282 gpio-ranges = <&pfc 0 64 20>; 283 interrupt-controller; 284 #interrupt-cells = <2>; 285 }; 286 287 gpio3: gpio@e6058980 { 288 compatible = "renesas,gpio-r8a779g0", 289 "renesas,rcar-gen4-gpio"; 290 reg = <0 0xe6058980 0 0x54>; 291 interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>; 292 clocks = <&cpg CPG_MOD 916>; 293 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 294 resets = <&cpg 916>; 295 gpio-controller; 296 #gpio-cells = <2>; 297 gpio-ranges = <&pfc 0 96 30>; 298 interrupt-controller; 299 #interrupt-cells = <2>; 300 }; 301 302 gpio4: gpio@e6060180 { 303 compatible = "renesas,gpio-r8a779g0", 304 "renesas,rcar-gen4-gpio"; 305 reg = <0 0xe6060180 0 0x54>; 306 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>; 307 clocks = <&cpg CPG_MOD 917>; 308 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 309 resets = <&cpg 917>; 310 gpio-controller; 311 #gpio-cells = <2>; 312 gpio-ranges = <&pfc 0 128 25>; 313 interrupt-controller; 314 #interrupt-cells = <2>; 315 }; 316 317 gpio5: gpio@e6060980 { 318 compatible = "renesas,gpio-r8a779g0", 319 "renesas,rcar-gen4-gpio"; 320 reg = <0 0xe6060980 0 0x54>; 321 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>; 322 clocks = <&cpg CPG_MOD 917>; 323 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 324 resets = <&cpg 917>; 325 gpio-controller; 326 #gpio-cells = <2>; 327 gpio-ranges = <&pfc 0 160 21>; 328 interrupt-controller; 329 #interrupt-cells = <2>; 330 }; 331 332 gpio6: gpio@e6061180 { 333 compatible = "renesas,gpio-r8a779g0", 334 "renesas,rcar-gen4-gpio"; 335 reg = <0 0xe6061180 0 0x54>; 336 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>; 337 clocks = <&cpg CPG_MOD 917>; 338 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 339 resets = <&cpg 917>; 340 gpio-controller; 341 #gpio-cells = <2>; 342 gpio-ranges = <&pfc 0 192 21>; 343 interrupt-controller; 344 #interrupt-cells = <2>; 345 }; 346 347 gpio7: gpio@e6061980 { 348 compatible = "renesas,gpio-r8a779g0", 349 "renesas,rcar-gen4-gpio"; 350 reg = <0 0xe6061980 0 0x54>; 351 interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>; 352 clocks = <&cpg CPG_MOD 917>; 353 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 354 resets = <&cpg 917>; 355 gpio-controller; 356 #gpio-cells = <2>; 357 gpio-ranges = <&pfc 0 224 21>; 358 interrupt-controller; 359 #interrupt-cells = <2>; 360 }; 361 362 gpio8: gpio@e6068180 { 363 compatible = "renesas,gpio-r8a779g0", 364 "renesas,rcar-gen4-gpio"; 365 reg = <0 0xe6068180 0 0x54>; 366 interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH>; 367 clocks = <&cpg CPG_MOD 918>; 368 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 369 resets = <&cpg 918>; 370 gpio-controller; 371 #gpio-cells = <2>; 372 gpio-ranges = <&pfc 0 256 14>; 373 interrupt-controller; 374 #interrupt-cells = <2>; 375 }; 376 377 cmt0: timer@e60f0000 { 378 compatible = "renesas,r8a779g0-cmt0", 379 "renesas,rcar-gen4-cmt0"; 380 reg = <0 0xe60f0000 0 0x1004>; 381 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 382 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 383 clocks = <&cpg CPG_MOD 910>; 384 clock-names = "fck"; 385 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 386 resets = <&cpg 910>; 387 status = "disabled"; 388 }; 389 390 cmt1: timer@e6130000 { 391 compatible = "renesas,r8a779g0-cmt1", 392 "renesas,rcar-gen4-cmt1"; 393 reg = <0 0xe6130000 0 0x1004>; 394 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 395 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, 396 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 397 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, 398 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, 399 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, 400 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 401 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 402 clocks = <&cpg CPG_MOD 911>; 403 clock-names = "fck"; 404 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 405 resets = <&cpg 911>; 406 status = "disabled"; 407 }; 408 409 cmt2: timer@e6140000 { 410 compatible = "renesas,r8a779g0-cmt1", 411 "renesas,rcar-gen4-cmt1"; 412 reg = <0 0xe6140000 0 0x1004>; 413 interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, 414 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 415 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, 416 <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, 417 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 418 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, 419 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, 420 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>; 421 clocks = <&cpg CPG_MOD 912>; 422 clock-names = "fck"; 423 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 424 resets = <&cpg 912>; 425 status = "disabled"; 426 }; 427 428 cmt3: timer@e6148000 { 429 compatible = "renesas,r8a779g0-cmt1", 430 "renesas,rcar-gen4-cmt1"; 431 reg = <0 0xe6148000 0 0x1004>; 432 interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, 433 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 434 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, 435 <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 436 <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 437 <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 438 <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 439 <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>; 440 clocks = <&cpg CPG_MOD 913>; 441 clock-names = "fck"; 442 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 443 resets = <&cpg 913>; 444 status = "disabled"; 445 }; 446 447 cpg: clock-controller@e6150000 { 448 compatible = "renesas,r8a779g0-cpg-mssr"; 449 reg = <0 0xe6150000 0 0x4000>; 450 clocks = <&extal_clk>, <&extalr_clk>; 451 clock-names = "extal", "extalr"; 452 #clock-cells = <2>; 453 #power-domain-cells = <0>; 454 #reset-cells = <1>; 455 }; 456 457 rst: reset-controller@e6160000 { 458 compatible = "renesas,r8a779g0-rst"; 459 reg = <0 0xe6160000 0 0x4000>; 460 }; 461 462 sysc: system-controller@e6180000 { 463 compatible = "renesas,r8a779g0-sysc"; 464 reg = <0 0xe6180000 0 0x4000>; 465 #power-domain-cells = <1>; 466 }; 467 468 tsc: thermal@e6198000 { 469 compatible = "renesas,r8a779g0-thermal"; 470 reg = <0 0xe6198000 0 0x200>, 471 <0 0xe61a0000 0 0x200>, 472 <0 0xe61a8000 0 0x200>, 473 <0 0xe61b0000 0 0x200>; 474 clocks = <&cpg CPG_MOD 919>; 475 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 476 resets = <&cpg 919>; 477 #thermal-sensor-cells = <1>; 478 }; 479 480 intc_ex: interrupt-controller@e61c0000 { 481 compatible = "renesas,intc-ex-r8a779g0", "renesas,irqc"; 482 #interrupt-cells = <2>; 483 interrupt-controller; 484 reg = <0 0xe61c0000 0 0x200>; 485 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 486 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 487 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 488 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 489 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 490 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 491 clocks = <&cpg CPG_MOD 611>; 492 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 493 resets = <&cpg 611>; 494 }; 495 496 tmu0: timer@e61e0000 { 497 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 498 reg = <0 0xe61e0000 0 0x30>; 499 interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, 500 <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, 501 <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>; 502 interrupt-names = "tuni0", "tuni1", "tuni2"; 503 clocks = <&cpg CPG_MOD 713>; 504 clock-names = "fck"; 505 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 506 resets = <&cpg 713>; 507 status = "disabled"; 508 }; 509 510 tmu1: timer@e6fc0000 { 511 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 512 reg = <0 0xe6fc0000 0 0x30>; 513 interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 514 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 515 <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, 516 <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>; 517 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 518 clocks = <&cpg CPG_MOD 714>; 519 clock-names = "fck"; 520 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 521 resets = <&cpg 714>; 522 status = "disabled"; 523 }; 524 525 tmu2: timer@e6fd0000 { 526 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 527 reg = <0 0xe6fd0000 0 0x30>; 528 interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, 529 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, 530 <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>, 531 <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>; 532 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 533 clocks = <&cpg CPG_MOD 715>; 534 clock-names = "fck"; 535 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 536 resets = <&cpg 715>; 537 status = "disabled"; 538 }; 539 540 tmu3: timer@e6fe0000 { 541 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 542 reg = <0 0xe6fe0000 0 0x30>; 543 interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, 544 <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, 545 <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, 546 <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>; 547 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 548 clocks = <&cpg CPG_MOD 716>; 549 clock-names = "fck"; 550 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 551 resets = <&cpg 716>; 552 status = "disabled"; 553 }; 554 555 tmu4: timer@ffc00000 { 556 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 557 reg = <0 0xffc00000 0 0x30>; 558 interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 559 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 560 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, 561 <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; 562 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 563 clocks = <&cpg CPG_MOD 717>; 564 clock-names = "fck"; 565 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 566 resets = <&cpg 717>; 567 status = "disabled"; 568 }; 569 570 tsn0: ethernet@e6460000 { 571 compatible = "renesas,r8a779g0-ethertsn", "renesas,rcar-gen4-ethertsn"; 572 reg = <0 0xe6460000 0 0x7000>, 573 <0 0xe6449000 0 0x500>; 574 reg-names = "tsnes", "gptp"; 575 interrupts = <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 576 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>; 577 interrupt-names = "tx", "rx"; 578 clocks = <&cpg CPG_MOD 2723>; 579 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 580 resets = <&cpg 2723>; 581 status = "disabled"; 582 }; 583 584 i2c0: i2c@e6500000 { 585 compatible = "renesas,i2c-r8a779g0", 586 "renesas,rcar-gen4-i2c"; 587 reg = <0 0xe6500000 0 0x40>; 588 interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>; 589 clocks = <&cpg CPG_MOD 518>; 590 dmas = <&dmac0 0x91>, <&dmac0 0x90>, 591 <&dmac1 0x91>, <&dmac1 0x90>; 592 dma-names = "tx", "rx", "tx", "rx"; 593 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 594 resets = <&cpg 518>; 595 i2c-scl-internal-delay-ns = <110>; 596 #address-cells = <1>; 597 #size-cells = <0>; 598 status = "disabled"; 599 }; 600 601 i2c1: i2c@e6508000 { 602 compatible = "renesas,i2c-r8a779g0", 603 "renesas,rcar-gen4-i2c"; 604 reg = <0 0xe6508000 0 0x40>; 605 interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>; 606 clocks = <&cpg CPG_MOD 519>; 607 dmas = <&dmac0 0x93>, <&dmac0 0x92>, 608 <&dmac1 0x93>, <&dmac1 0x92>; 609 dma-names = "tx", "rx", "tx", "rx"; 610 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 611 resets = <&cpg 519>; 612 i2c-scl-internal-delay-ns = <110>; 613 #address-cells = <1>; 614 #size-cells = <0>; 615 status = "disabled"; 616 }; 617 618 i2c2: i2c@e6510000 { 619 compatible = "renesas,i2c-r8a779g0", 620 "renesas,rcar-gen4-i2c"; 621 reg = <0 0xe6510000 0 0x40>; 622 interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>; 623 clocks = <&cpg CPG_MOD 520>; 624 dmas = <&dmac0 0x95>, <&dmac0 0x94>, 625 <&dmac1 0x95>, <&dmac1 0x94>; 626 dma-names = "tx", "rx", "tx", "rx"; 627 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 628 resets = <&cpg 520>; 629 i2c-scl-internal-delay-ns = <110>; 630 #address-cells = <1>; 631 #size-cells = <0>; 632 status = "disabled"; 633 }; 634 635 i2c3: i2c@e66d0000 { 636 compatible = "renesas,i2c-r8a779g0", 637 "renesas,rcar-gen4-i2c"; 638 reg = <0 0xe66d0000 0 0x40>; 639 interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>; 640 clocks = <&cpg CPG_MOD 521>; 641 dmas = <&dmac0 0x97>, <&dmac0 0x96>, 642 <&dmac1 0x97>, <&dmac1 0x96>; 643 dma-names = "tx", "rx", "tx", "rx"; 644 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 645 resets = <&cpg 521>; 646 i2c-scl-internal-delay-ns = <110>; 647 #address-cells = <1>; 648 #size-cells = <0>; 649 status = "disabled"; 650 }; 651 652 i2c4: i2c@e66d8000 { 653 compatible = "renesas,i2c-r8a779g0", 654 "renesas,rcar-gen4-i2c"; 655 reg = <0 0xe66d8000 0 0x40>; 656 interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>; 657 clocks = <&cpg CPG_MOD 522>; 658 dma-names = "tx", "rx", "tx", "rx"; 659 dmas = <&dmac0 0x99>, <&dmac0 0x98>, 660 <&dmac1 0x99>, <&dmac1 0x98>; 661 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 662 resets = <&cpg 522>; 663 i2c-scl-internal-delay-ns = <110>; 664 #address-cells = <1>; 665 #size-cells = <0>; 666 status = "disabled"; 667 }; 668 669 i2c5: i2c@e66e0000 { 670 compatible = "renesas,i2c-r8a779g0", 671 "renesas,rcar-gen4-i2c"; 672 reg = <0 0xe66e0000 0 0x40>; 673 interrupts = <GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>; 674 clocks = <&cpg CPG_MOD 523>; 675 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>, 676 <&dmac1 0x9b>, <&dmac1 0x9a>; 677 dma-names = "tx", "rx", "tx", "rx"; 678 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 679 resets = <&cpg 523>; 680 i2c-scl-internal-delay-ns = <110>; 681 #address-cells = <1>; 682 #size-cells = <0>; 683 status = "disabled"; 684 }; 685 686 hscif0: serial@e6540000 { 687 compatible = "renesas,hscif-r8a779g0", 688 "renesas,rcar-gen4-hscif", "renesas,hscif"; 689 reg = <0 0xe6540000 0 0x60>; 690 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 691 clocks = <&cpg CPG_MOD 514>, 692 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 693 <&scif_clk>; 694 clock-names = "fck", "brg_int", "scif_clk"; 695 dmas = <&dmac0 0x31>, <&dmac0 0x30>, 696 <&dmac1 0x31>, <&dmac1 0x30>; 697 dma-names = "tx", "rx", "tx", "rx"; 698 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 699 resets = <&cpg 514>; 700 status = "disabled"; 701 }; 702 703 hscif1: serial@e6550000 { 704 compatible = "renesas,hscif-r8a779g0", 705 "renesas,rcar-gen4-hscif", "renesas,hscif"; 706 reg = <0 0xe6550000 0 0x60>; 707 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 708 clocks = <&cpg CPG_MOD 515>, 709 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 710 <&scif_clk>; 711 clock-names = "fck", "brg_int", "scif_clk"; 712 dmas = <&dmac0 0x33>, <&dmac0 0x32>, 713 <&dmac1 0x33>, <&dmac1 0x32>; 714 dma-names = "tx", "rx", "tx", "rx"; 715 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 716 resets = <&cpg 515>; 717 status = "disabled"; 718 }; 719 720 hscif2: serial@e6560000 { 721 compatible = "renesas,hscif-r8a779g0", 722 "renesas,rcar-gen4-hscif", "renesas,hscif"; 723 reg = <0 0xe6560000 0 0x60>; 724 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 725 clocks = <&cpg CPG_MOD 516>, 726 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 727 <&scif_clk2>; 728 clock-names = "fck", "brg_int", "scif_clk"; 729 dmas = <&dmac0 0x35>, <&dmac0 0x34>, 730 <&dmac1 0x35>, <&dmac1 0x34>; 731 dma-names = "tx", "rx", "tx", "rx"; 732 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 733 resets = <&cpg 516>; 734 status = "disabled"; 735 }; 736 737 hscif3: serial@e66a0000 { 738 compatible = "renesas,hscif-r8a779g0", 739 "renesas,rcar-gen4-hscif", "renesas,hscif"; 740 reg = <0 0xe66a0000 0 0x60>; 741 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 742 clocks = <&cpg CPG_MOD 517>, 743 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 744 <&scif_clk>; 745 clock-names = "fck", "brg_int", "scif_clk"; 746 dmas = <&dmac0 0x37>, <&dmac0 0x36>, 747 <&dmac1 0x37>, <&dmac1 0x36>; 748 dma-names = "tx", "rx", "tx", "rx"; 749 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 750 resets = <&cpg 517>; 751 status = "disabled"; 752 }; 753 754 pciec0: pcie@e65d0000 { 755 compatible = "renesas,r8a779g0-pcie", 756 "renesas,rcar-gen4-pcie"; 757 reg = <0 0xe65d0000 0 0x1000>, <0 0xe65d2000 0 0x0800>, 758 <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>, 759 <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>, 760 <0 0xfe000000 0 0x400000>; 761 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config"; 762 interrupts = <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 763 <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, 764 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, 765 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; 766 interrupt-names = "msi", "dma", "sft_ce", "app"; 767 clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>; 768 clock-names = "core", "ref"; 769 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 770 resets = <&cpg 624>; 771 reset-names = "pwr"; 772 max-link-speed = <4>; 773 num-lanes = <2>; 774 #address-cells = <3>; 775 #size-cells = <2>; 776 bus-range = <0x00 0xff>; 777 device_type = "pci"; 778 ranges = <0x01000000 0 0x00000000 0 0xfe000000 0 0x00400000>, 779 <0x02000000 0 0x30000000 0 0x30000000 0 0x10000000>; 780 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 781 #interrupt-cells = <1>; 782 interrupt-map-mask = <0 0 0 7>; 783 interrupt-map = <0 0 0 1 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 784 <0 0 0 2 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 785 <0 0 0 3 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 786 <0 0 0 4 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>; 787 snps,enable-cdm-check; 788 status = "disabled"; 789 }; 790 791 pciec1: pcie@e65d8000 { 792 compatible = "renesas,r8a779g0-pcie", 793 "renesas,rcar-gen4-pcie"; 794 reg = <0 0xe65d8000 0 0x1000>, <0 0xe65da000 0 0x0800>, 795 <0 0xe65db000 0 0x2000>, <0 0xe65dd000 0 0x1200>, 796 <0 0xe65de200 0 0x0e00>, <0 0xe65df000 0 0x0400>, 797 <0 0xee900000 0 0x400000>; 798 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config"; 799 interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 800 <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, 801 <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, 802 <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>; 803 interrupt-names = "msi", "dma", "sft_ce", "app"; 804 clocks = <&cpg CPG_MOD 625>, <&pcie1_clkref>; 805 clock-names = "core", "ref"; 806 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 807 resets = <&cpg 625>; 808 reset-names = "pwr"; 809 max-link-speed = <4>; 810 num-lanes = <2>; 811 #address-cells = <3>; 812 #size-cells = <2>; 813 bus-range = <0x00 0xff>; 814 device_type = "pci"; 815 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00400000>, 816 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x10000000>; 817 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 818 #interrupt-cells = <1>; 819 interrupt-map-mask = <0 0 0 7>; 820 interrupt-map = <0 0 0 1 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 821 <0 0 0 2 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 822 <0 0 0 3 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 823 <0 0 0 4 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>; 824 snps,enable-cdm-check; 825 status = "disabled"; 826 }; 827 828 pciec0_ep: pcie-ep@e65d0000 { 829 compatible = "renesas,r8a779g0-pcie-ep", 830 "renesas,rcar-gen4-pcie-ep"; 831 reg = <0 0xe65d0000 0 0x2000>, <0 0xe65d2000 0 0x1000>, 832 <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>, 833 <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>, 834 <0 0xfe000000 0 0x400000>; 835 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "addr_space"; 836 interrupts = <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, 837 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, 838 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; 839 interrupt-names = "dma", "sft_ce", "app"; 840 clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>; 841 clock-names = "core", "ref"; 842 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 843 resets = <&cpg 624>; 844 reset-names = "pwr"; 845 max-link-speed = <4>; 846 num-lanes = <2>; 847 max-functions = /bits/ 8 <2>; 848 status = "disabled"; 849 }; 850 851 pciec1_ep: pcie-ep@e65d8000 { 852 compatible = "renesas,r8a779g0-pcie-ep", 853 "renesas,rcar-gen4-pcie-ep"; 854 reg = <0 0xe65d8000 0 0x2000>, <0 0xe65da000 0 0x1000>, 855 <0 0xe65db000 0 0x2000>, <0 0xe65dd000 0 0x1200>, 856 <0 0xe65de200 0 0x0e00>, <0 0xe65df000 0 0x0400>, 857 <0 0xee900000 0 0x400000>; 858 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "addr_space"; 859 interrupts = <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, 860 <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>; 862 interrupt-names = "dma", "sft_ce", "app"; 863 clocks = <&cpg CPG_MOD 625>, <&pcie1_clkref>; 864 clock-names = "core", "ref"; 865 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 866 resets = <&cpg 625>; 867 reset-names = "pwr"; 868 max-link-speed = <4>; 869 num-lanes = <2>; 870 max-functions = /bits/ 8 <2>; 871 status = "disabled"; 872 }; 873 874 canfd: can@e6660000 { 875 compatible = "renesas,r8a779g0-canfd", 876 "renesas,rcar-gen4-canfd"; 877 reg = <0 0xe6660000 0 0x8500>; 878 interrupts = <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 879 <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>; 880 interrupt-names = "ch_int", "g_int"; 881 clocks = <&cpg CPG_MOD 328>, 882 <&cpg CPG_CORE R8A779G0_CLK_CANFD>, 883 <&can_clk>; 884 clock-names = "fck", "canfd", "can_clk"; 885 assigned-clocks = <&cpg CPG_CORE R8A779G0_CLK_CANFD>; 886 assigned-clock-rates = <80000000>; 887 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 888 resets = <&cpg 328>; 889 status = "disabled"; 890 891 channel0 { 892 status = "disabled"; 893 }; 894 895 channel1 { 896 status = "disabled"; 897 }; 898 899 channel2 { 900 status = "disabled"; 901 }; 902 903 channel3 { 904 status = "disabled"; 905 }; 906 907 channel4 { 908 status = "disabled"; 909 }; 910 911 channel5 { 912 status = "disabled"; 913 }; 914 915 channel6 { 916 status = "disabled"; 917 }; 918 919 channel7 { 920 status = "disabled"; 921 }; 922 }; 923 924 avb0: ethernet@e6800000 { 925 compatible = "renesas,etheravb-r8a779g0", 926 "renesas,etheravb-rcar-gen4"; 927 reg = <0 0xe6800000 0 0x1000>; 928 interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 929 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 930 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 931 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 932 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 933 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 934 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 935 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 936 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 937 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 938 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 939 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 940 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 941 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 942 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 943 <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 944 <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 945 <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, 946 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, 947 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, 948 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, 949 <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, 950 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, 951 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, 952 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 953 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 954 "ch5", "ch6", "ch7", "ch8", "ch9", 955 "ch10", "ch11", "ch12", "ch13", 956 "ch14", "ch15", "ch16", "ch17", 957 "ch18", "ch19", "ch20", "ch21", 958 "ch22", "ch23", "ch24"; 959 clocks = <&cpg CPG_MOD 211>; 960 clock-names = "fck"; 961 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 962 resets = <&cpg 211>; 963 phy-mode = "rgmii"; 964 rx-internal-delay-ps = <0>; 965 tx-internal-delay-ps = <0>; 966 iommus = <&ipmmu_hc 0>; 967 status = "disabled"; 968 }; 969 970 avb1: ethernet@e6810000 { 971 compatible = "renesas,etheravb-r8a779g0", 972 "renesas,etheravb-rcar-gen4"; 973 reg = <0 0xe6810000 0 0x1000>; 974 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, 975 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, 976 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, 977 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, 978 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, 979 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, 980 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, 981 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, 982 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 983 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, 984 <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, 985 <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, 986 <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, 987 <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, 988 <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, 989 <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, 990 <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, 991 <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, 992 <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, 993 <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, 994 <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>, 995 <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 996 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 997 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 998 <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; 999 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 1000 "ch5", "ch6", "ch7", "ch8", "ch9", 1001 "ch10", "ch11", "ch12", "ch13", 1002 "ch14", "ch15", "ch16", "ch17", 1003 "ch18", "ch19", "ch20", "ch21", 1004 "ch22", "ch23", "ch24"; 1005 clocks = <&cpg CPG_MOD 212>; 1006 clock-names = "fck"; 1007 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1008 resets = <&cpg 212>; 1009 phy-mode = "rgmii"; 1010 rx-internal-delay-ps = <0>; 1011 tx-internal-delay-ps = <0>; 1012 iommus = <&ipmmu_hc 1>; 1013 status = "disabled"; 1014 }; 1015 1016 avb2: ethernet@e6820000 { 1017 compatible = "renesas,etheravb-r8a779g0", 1018 "renesas,etheravb-rcar-gen4"; 1019 reg = <0 0xe6820000 0 0x1000>; 1020 interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 1021 <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 1022 <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 1023 <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 1024 <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 1025 <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 1026 <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 1027 <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 1028 <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 1029 <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 1030 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 1031 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 1032 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 1033 <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 1034 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 1035 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 1036 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 1037 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 1038 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 1039 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 1040 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 1041 <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 1042 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 1043 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 1044 <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; 1045 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 1046 "ch5", "ch6", "ch7", "ch8", "ch9", 1047 "ch10", "ch11", "ch12", "ch13", 1048 "ch14", "ch15", "ch16", "ch17", 1049 "ch18", "ch19", "ch20", "ch21", 1050 "ch22", "ch23", "ch24"; 1051 clocks = <&cpg CPG_MOD 213>; 1052 clock-names = "fck"; 1053 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1054 resets = <&cpg 213>; 1055 phy-mode = "rgmii"; 1056 rx-internal-delay-ps = <0>; 1057 tx-internal-delay-ps = <0>; 1058 iommus = <&ipmmu_hc 2>; 1059 status = "disabled"; 1060 }; 1061 1062 pwm0: pwm@e6e30000 { 1063 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1064 reg = <0 0xe6e30000 0 0x10>; 1065 #pwm-cells = <2>; 1066 clocks = <&cpg CPG_MOD 628>; 1067 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1068 resets = <&cpg 628>; 1069 status = "disabled"; 1070 }; 1071 1072 pwm1: pwm@e6e31000 { 1073 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1074 reg = <0 0xe6e31000 0 0x10>; 1075 #pwm-cells = <2>; 1076 clocks = <&cpg CPG_MOD 628>; 1077 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1078 resets = <&cpg 628>; 1079 status = "disabled"; 1080 }; 1081 1082 pwm2: pwm@e6e32000 { 1083 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1084 reg = <0 0xe6e32000 0 0x10>; 1085 #pwm-cells = <2>; 1086 clocks = <&cpg CPG_MOD 628>; 1087 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1088 resets = <&cpg 628>; 1089 status = "disabled"; 1090 }; 1091 1092 pwm3: pwm@e6e33000 { 1093 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1094 reg = <0 0xe6e33000 0 0x10>; 1095 #pwm-cells = <2>; 1096 clocks = <&cpg CPG_MOD 628>; 1097 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1098 resets = <&cpg 628>; 1099 status = "disabled"; 1100 }; 1101 1102 pwm4: pwm@e6e34000 { 1103 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1104 reg = <0 0xe6e34000 0 0x10>; 1105 #pwm-cells = <2>; 1106 clocks = <&cpg CPG_MOD 628>; 1107 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1108 resets = <&cpg 628>; 1109 status = "disabled"; 1110 }; 1111 1112 pwm5: pwm@e6e35000 { 1113 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1114 reg = <0 0xe6e35000 0 0x10>; 1115 #pwm-cells = <2>; 1116 clocks = <&cpg CPG_MOD 628>; 1117 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1118 resets = <&cpg 628>; 1119 status = "disabled"; 1120 }; 1121 1122 pwm6: pwm@e6e36000 { 1123 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1124 reg = <0 0xe6e36000 0 0x10>; 1125 #pwm-cells = <2>; 1126 clocks = <&cpg CPG_MOD 628>; 1127 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1128 resets = <&cpg 628>; 1129 status = "disabled"; 1130 }; 1131 1132 pwm7: pwm@e6e37000 { 1133 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1134 reg = <0 0xe6e37000 0 0x10>; 1135 #pwm-cells = <2>; 1136 clocks = <&cpg CPG_MOD 628>; 1137 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1138 resets = <&cpg 628>; 1139 status = "disabled"; 1140 }; 1141 1142 pwm8: pwm@e6e38000 { 1143 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1144 reg = <0 0xe6e38000 0 0x10>; 1145 #pwm-cells = <2>; 1146 clocks = <&cpg CPG_MOD 628>; 1147 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1148 resets = <&cpg 628>; 1149 status = "disabled"; 1150 }; 1151 1152 pwm9: pwm@e6e39000 { 1153 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1154 reg = <0 0xe6e39000 0 0x10>; 1155 #pwm-cells = <2>; 1156 clocks = <&cpg CPG_MOD 628>; 1157 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1158 resets = <&cpg 628>; 1159 status = "disabled"; 1160 }; 1161 1162 scif0: serial@e6e60000 { 1163 compatible = "renesas,scif-r8a779g0", 1164 "renesas,rcar-gen4-scif", "renesas,scif"; 1165 reg = <0 0xe6e60000 0 64>; 1166 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 1167 clocks = <&cpg CPG_MOD 702>, 1168 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1169 <&scif_clk>; 1170 clock-names = "fck", "brg_int", "scif_clk"; 1171 dmas = <&dmac0 0x51>, <&dmac0 0x50>, 1172 <&dmac1 0x51>, <&dmac1 0x50>; 1173 dma-names = "tx", "rx", "tx", "rx"; 1174 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1175 resets = <&cpg 702>; 1176 status = "disabled"; 1177 }; 1178 1179 scif1: serial@e6e68000 { 1180 compatible = "renesas,scif-r8a779g0", 1181 "renesas,rcar-gen4-scif", "renesas,scif"; 1182 reg = <0 0xe6e68000 0 64>; 1183 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 1184 clocks = <&cpg CPG_MOD 703>, 1185 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1186 <&scif_clk>; 1187 clock-names = "fck", "brg_int", "scif_clk"; 1188 dmas = <&dmac0 0x53>, <&dmac0 0x52>, 1189 <&dmac1 0x53>, <&dmac1 0x52>; 1190 dma-names = "tx", "rx", "tx", "rx"; 1191 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1192 resets = <&cpg 703>; 1193 status = "disabled"; 1194 }; 1195 1196 scif3: serial@e6c50000 { 1197 compatible = "renesas,scif-r8a779g0", 1198 "renesas,rcar-gen4-scif", "renesas,scif"; 1199 reg = <0 0xe6c50000 0 64>; 1200 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 1201 clocks = <&cpg CPG_MOD 704>, 1202 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1203 <&scif_clk>; 1204 clock-names = "fck", "brg_int", "scif_clk"; 1205 dmas = <&dmac0 0x57>, <&dmac0 0x56>, 1206 <&dmac1 0x57>, <&dmac1 0x56>; 1207 dma-names = "tx", "rx", "tx", "rx"; 1208 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1209 resets = <&cpg 704>; 1210 status = "disabled"; 1211 }; 1212 1213 scif4: serial@e6c40000 { 1214 compatible = "renesas,scif-r8a779g0", 1215 "renesas,rcar-gen4-scif", "renesas,scif"; 1216 reg = <0 0xe6c40000 0 64>; 1217 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 1218 clocks = <&cpg CPG_MOD 705>, 1219 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1220 <&scif_clk2>; 1221 clock-names = "fck", "brg_int", "scif_clk"; 1222 dmas = <&dmac0 0x59>, <&dmac0 0x58>, 1223 <&dmac1 0x59>, <&dmac1 0x58>; 1224 dma-names = "tx", "rx", "tx", "rx"; 1225 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1226 resets = <&cpg 705>; 1227 status = "disabled"; 1228 }; 1229 1230 tpu: pwm@e6e80000 { 1231 compatible = "renesas,tpu-r8a779g0", "renesas,tpu"; 1232 reg = <0 0xe6e80000 0 0x148>; 1233 interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; 1234 clocks = <&cpg CPG_MOD 718>; 1235 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1236 resets = <&cpg 718>; 1237 #pwm-cells = <3>; 1238 status = "disabled"; 1239 }; 1240 1241 msiof0: spi@e6e90000 { 1242 compatible = "renesas,msiof-r8a779g0", 1243 "renesas,rcar-gen4-msiof"; 1244 reg = <0 0xe6e90000 0 0x0064>; 1245 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 1246 clocks = <&cpg CPG_MOD 618>; 1247 dmas = <&dmac0 0x41>, <&dmac0 0x40>, 1248 <&dmac1 0x41>, <&dmac1 0x40>; 1249 dma-names = "tx", "rx", "tx", "rx"; 1250 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1251 resets = <&cpg 618>; 1252 #address-cells = <1>; 1253 #size-cells = <0>; 1254 status = "disabled"; 1255 }; 1256 1257 msiof1: spi@e6ea0000 { 1258 compatible = "renesas,msiof-r8a779g0", 1259 "renesas,rcar-gen4-msiof"; 1260 reg = <0 0xe6ea0000 0 0x0064>; 1261 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; 1262 clocks = <&cpg CPG_MOD 619>; 1263 dmas = <&dmac0 0x43>, <&dmac0 0x42>, 1264 <&dmac1 0x43>, <&dmac1 0x42>; 1265 dma-names = "tx", "rx", "tx", "rx"; 1266 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1267 resets = <&cpg 619>; 1268 #address-cells = <1>; 1269 #size-cells = <0>; 1270 status = "disabled"; 1271 }; 1272 1273 msiof2: spi@e6c00000 { 1274 compatible = "renesas,msiof-r8a779g0", 1275 "renesas,rcar-gen4-msiof"; 1276 reg = <0 0xe6c00000 0 0x0064>; 1277 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; 1278 clocks = <&cpg CPG_MOD 620>; 1279 dmas = <&dmac0 0x45>, <&dmac0 0x44>, 1280 <&dmac1 0x45>, <&dmac1 0x44>; 1281 dma-names = "tx", "rx", "tx", "rx"; 1282 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1283 resets = <&cpg 620>; 1284 #address-cells = <1>; 1285 #size-cells = <0>; 1286 status = "disabled"; 1287 }; 1288 1289 msiof3: spi@e6c10000 { 1290 compatible = "renesas,msiof-r8a779g0", 1291 "renesas,rcar-gen4-msiof"; 1292 reg = <0 0xe6c10000 0 0x0064>; 1293 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 1294 clocks = <&cpg CPG_MOD 621>; 1295 dmas = <&dmac0 0x47>, <&dmac0 0x46>, 1296 <&dmac1 0x47>, <&dmac1 0x46>; 1297 dma-names = "tx", "rx", "tx", "rx"; 1298 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1299 resets = <&cpg 621>; 1300 #address-cells = <1>; 1301 #size-cells = <0>; 1302 status = "disabled"; 1303 }; 1304 1305 msiof4: spi@e6c20000 { 1306 compatible = "renesas,msiof-r8a779g0", 1307 "renesas,rcar-gen4-msiof"; 1308 reg = <0 0xe6c20000 0 0x0064>; 1309 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 1310 clocks = <&cpg CPG_MOD 622>; 1311 dmas = <&dmac0 0x49>, <&dmac0 0x48>, 1312 <&dmac1 0x49>, <&dmac1 0x48>; 1313 dma-names = "tx", "rx", "tx", "rx"; 1314 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1315 resets = <&cpg 622>; 1316 #address-cells = <1>; 1317 #size-cells = <0>; 1318 status = "disabled"; 1319 }; 1320 1321 msiof5: spi@e6c28000 { 1322 compatible = "renesas,msiof-r8a779g0", 1323 "renesas,rcar-gen4-msiof"; 1324 reg = <0 0xe6c28000 0 0x0064>; 1325 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; 1326 clocks = <&cpg CPG_MOD 623>; 1327 dmas = <&dmac0 0x4b>, <&dmac0 0x4a>, 1328 <&dmac1 0x4b>, <&dmac1 0x4a>; 1329 dma-names = "tx", "rx", "tx", "rx"; 1330 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1331 resets = <&cpg 623>; 1332 #address-cells = <1>; 1333 #size-cells = <0>; 1334 status = "disabled"; 1335 }; 1336 1337 vin00: video@e6ef0000 { 1338 compatible = "renesas,vin-r8a779g0", 1339 "renesas,rcar-gen4-vin"; 1340 reg = <0 0xe6ef0000 0 0x1000>; 1341 interrupts = <GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>; 1342 clocks = <&cpg CPG_MOD 730>; 1343 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1344 resets = <&cpg 730>; 1345 renesas,id = <0>; 1346 status = "disabled"; 1347 1348 ports { 1349 #address-cells = <1>; 1350 #size-cells = <0>; 1351 1352 port@2 { 1353 #address-cells = <1>; 1354 #size-cells = <0>; 1355 1356 reg = <2>; 1357 1358 vin00isp0: endpoint@0 { 1359 reg = <0>; 1360 remote-endpoint = <&isp0vin00>; 1361 }; 1362 }; 1363 }; 1364 }; 1365 1366 vin01: video@e6ef1000 { 1367 compatible = "renesas,vin-r8a779g0", 1368 "renesas,rcar-gen4-vin"; 1369 reg = <0 0xe6ef1000 0 0x1000>; 1370 interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>; 1371 clocks = <&cpg CPG_MOD 731>; 1372 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1373 resets = <&cpg 731>; 1374 renesas,id = <1>; 1375 status = "disabled"; 1376 1377 ports { 1378 #address-cells = <1>; 1379 #size-cells = <0>; 1380 1381 port@2 { 1382 #address-cells = <1>; 1383 #size-cells = <0>; 1384 1385 reg = <2>; 1386 1387 vin01isp0: endpoint@0 { 1388 reg = <0>; 1389 remote-endpoint = <&isp0vin01>; 1390 }; 1391 }; 1392 }; 1393 }; 1394 1395 vin02: video@e6ef2000 { 1396 compatible = "renesas,vin-r8a779g0", 1397 "renesas,rcar-gen4-vin"; 1398 reg = <0 0xe6ef2000 0 0x1000>; 1399 interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>; 1400 clocks = <&cpg CPG_MOD 800>; 1401 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1402 resets = <&cpg 800>; 1403 renesas,id = <2>; 1404 status = "disabled"; 1405 1406 ports { 1407 #address-cells = <1>; 1408 #size-cells = <0>; 1409 1410 port@2 { 1411 #address-cells = <1>; 1412 #size-cells = <0>; 1413 1414 reg = <2>; 1415 1416 vin02isp0: endpoint@0 { 1417 reg = <0>; 1418 remote-endpoint = <&isp0vin02>; 1419 }; 1420 }; 1421 }; 1422 }; 1423 1424 vin03: video@e6ef3000 { 1425 compatible = "renesas,vin-r8a779g0", 1426 "renesas,rcar-gen4-vin"; 1427 reg = <0 0xe6ef3000 0 0x1000>; 1428 interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>; 1429 clocks = <&cpg CPG_MOD 801>; 1430 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1431 resets = <&cpg 801>; 1432 renesas,id = <3>; 1433 status = "disabled"; 1434 1435 ports { 1436 #address-cells = <1>; 1437 #size-cells = <0>; 1438 1439 port@2 { 1440 #address-cells = <1>; 1441 #size-cells = <0>; 1442 1443 reg = <2>; 1444 1445 vin03isp0: endpoint@0 { 1446 reg = <0>; 1447 remote-endpoint = <&isp0vin03>; 1448 }; 1449 }; 1450 }; 1451 }; 1452 1453 vin04: video@e6ef4000 { 1454 compatible = "renesas,vin-r8a779g0", 1455 "renesas,rcar-gen4-vin"; 1456 reg = <0 0xe6ef4000 0 0x1000>; 1457 interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>; 1458 clocks = <&cpg CPG_MOD 802>; 1459 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1460 resets = <&cpg 802>; 1461 renesas,id = <4>; 1462 status = "disabled"; 1463 1464 ports { 1465 #address-cells = <1>; 1466 #size-cells = <0>; 1467 1468 port@2 { 1469 #address-cells = <1>; 1470 #size-cells = <0>; 1471 1472 reg = <2>; 1473 1474 vin04isp0: endpoint@0 { 1475 reg = <0>; 1476 remote-endpoint = <&isp0vin04>; 1477 }; 1478 }; 1479 }; 1480 }; 1481 1482 vin05: video@e6ef5000 { 1483 compatible = "renesas,vin-r8a779g0", 1484 "renesas,rcar-gen4-vin"; 1485 reg = <0 0xe6ef5000 0 0x1000>; 1486 interrupts = <GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH>; 1487 clocks = <&cpg CPG_MOD 803>; 1488 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1489 resets = <&cpg 803>; 1490 renesas,id = <5>; 1491 status = "disabled"; 1492 1493 ports { 1494 #address-cells = <1>; 1495 #size-cells = <0>; 1496 1497 port@2 { 1498 #address-cells = <1>; 1499 #size-cells = <0>; 1500 1501 reg = <2>; 1502 1503 vin05isp0: endpoint@0 { 1504 reg = <0>; 1505 remote-endpoint = <&isp0vin05>; 1506 }; 1507 }; 1508 }; 1509 }; 1510 1511 vin06: video@e6ef6000 { 1512 compatible = "renesas,vin-r8a779g0", 1513 "renesas,rcar-gen4-vin"; 1514 reg = <0 0xe6ef6000 0 0x1000>; 1515 interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>; 1516 clocks = <&cpg CPG_MOD 804>; 1517 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1518 resets = <&cpg 804>; 1519 renesas,id = <6>; 1520 status = "disabled"; 1521 1522 ports { 1523 #address-cells = <1>; 1524 #size-cells = <0>; 1525 1526 port@2 { 1527 #address-cells = <1>; 1528 #size-cells = <0>; 1529 1530 reg = <2>; 1531 1532 vin06isp0: endpoint@0 { 1533 reg = <0>; 1534 remote-endpoint = <&isp0vin06>; 1535 }; 1536 }; 1537 }; 1538 }; 1539 1540 vin07: video@e6ef7000 { 1541 compatible = "renesas,vin-r8a779g0", 1542 "renesas,rcar-gen4-vin"; 1543 reg = <0 0xe6ef7000 0 0x1000>; 1544 interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>; 1545 clocks = <&cpg CPG_MOD 805>; 1546 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1547 resets = <&cpg 805>; 1548 renesas,id = <7>; 1549 status = "disabled"; 1550 1551 ports { 1552 #address-cells = <1>; 1553 #size-cells = <0>; 1554 1555 port@2 { 1556 #address-cells = <1>; 1557 #size-cells = <0>; 1558 1559 reg = <2>; 1560 1561 vin07isp0: endpoint@0 { 1562 reg = <0>; 1563 remote-endpoint = <&isp0vin07>; 1564 }; 1565 }; 1566 }; 1567 }; 1568 1569 vin08: video@e6ef8000 { 1570 compatible = "renesas,vin-r8a779g0", 1571 "renesas,rcar-gen4-vin"; 1572 reg = <0 0xe6ef8000 0 0x1000>; 1573 interrupts = <GIC_SPI 537 IRQ_TYPE_LEVEL_HIGH>; 1574 clocks = <&cpg CPG_MOD 806>; 1575 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1576 resets = <&cpg 806>; 1577 renesas,id = <8>; 1578 status = "disabled"; 1579 1580 ports { 1581 #address-cells = <1>; 1582 #size-cells = <0>; 1583 1584 port@2 { 1585 #address-cells = <1>; 1586 #size-cells = <0>; 1587 1588 reg = <2>; 1589 1590 vin08isp1: endpoint@1 { 1591 reg = <1>; 1592 remote-endpoint = <&isp1vin08>; 1593 }; 1594 }; 1595 }; 1596 }; 1597 1598 vin09: video@e6ef9000 { 1599 compatible = "renesas,vin-r8a779g0", 1600 "renesas,rcar-gen4-vin"; 1601 reg = <0 0xe6ef9000 0 0x1000>; 1602 interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>; 1603 clocks = <&cpg CPG_MOD 807>; 1604 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1605 resets = <&cpg 807>; 1606 renesas,id = <9>; 1607 status = "disabled"; 1608 1609 ports { 1610 #address-cells = <1>; 1611 #size-cells = <0>; 1612 1613 port@2 { 1614 #address-cells = <1>; 1615 #size-cells = <0>; 1616 1617 reg = <2>; 1618 1619 vin09isp1: endpoint@1 { 1620 reg = <1>; 1621 remote-endpoint = <&isp1vin09>; 1622 }; 1623 }; 1624 }; 1625 }; 1626 1627 vin10: video@e6efa000 { 1628 compatible = "renesas,vin-r8a779g0", 1629 "renesas,rcar-gen4-vin"; 1630 reg = <0 0xe6efa000 0 0x1000>; 1631 interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>; 1632 clocks = <&cpg CPG_MOD 808>; 1633 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1634 resets = <&cpg 808>; 1635 renesas,id = <10>; 1636 status = "disabled"; 1637 1638 ports { 1639 #address-cells = <1>; 1640 #size-cells = <0>; 1641 1642 port@2 { 1643 #address-cells = <1>; 1644 #size-cells = <0>; 1645 1646 reg = <2>; 1647 1648 vin10isp1: endpoint@1 { 1649 reg = <1>; 1650 remote-endpoint = <&isp1vin10>; 1651 }; 1652 }; 1653 }; 1654 }; 1655 1656 vin11: video@e6efb000 { 1657 compatible = "renesas,vin-r8a779g0", 1658 "renesas,rcar-gen4-vin"; 1659 reg = <0 0xe6efb000 0 0x1000>; 1660 interrupts = <GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>; 1661 clocks = <&cpg CPG_MOD 809>; 1662 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1663 resets = <&cpg 809>; 1664 renesas,id = <11>; 1665 status = "disabled"; 1666 1667 ports { 1668 #address-cells = <1>; 1669 #size-cells = <0>; 1670 1671 port@2 { 1672 #address-cells = <1>; 1673 #size-cells = <0>; 1674 1675 reg = <2>; 1676 1677 vin11isp1: endpoint@1 { 1678 reg = <1>; 1679 remote-endpoint = <&isp1vin11>; 1680 }; 1681 }; 1682 }; 1683 }; 1684 1685 vin12: video@e6efc000 { 1686 compatible = "renesas,vin-r8a779g0", 1687 "renesas,rcar-gen4-vin"; 1688 reg = <0 0xe6efc000 0 0x1000>; 1689 interrupts = <GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>; 1690 clocks = <&cpg CPG_MOD 810>; 1691 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1692 resets = <&cpg 810>; 1693 renesas,id = <12>; 1694 status = "disabled"; 1695 1696 ports { 1697 #address-cells = <1>; 1698 #size-cells = <0>; 1699 1700 port@2 { 1701 #address-cells = <1>; 1702 #size-cells = <0>; 1703 1704 reg = <2>; 1705 1706 vin12isp1: endpoint@1 { 1707 reg = <1>; 1708 remote-endpoint = <&isp1vin12>; 1709 }; 1710 }; 1711 }; 1712 }; 1713 1714 vin13: video@e6efd000 { 1715 compatible = "renesas,vin-r8a779g0", 1716 "renesas,rcar-gen4-vin"; 1717 reg = <0 0xe6efd000 0 0x1000>; 1718 interrupts = <GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>; 1719 clocks = <&cpg CPG_MOD 811>; 1720 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1721 resets = <&cpg 811>; 1722 renesas,id = <13>; 1723 status = "disabled"; 1724 1725 ports { 1726 #address-cells = <1>; 1727 #size-cells = <0>; 1728 1729 port@2 { 1730 #address-cells = <1>; 1731 #size-cells = <0>; 1732 1733 reg = <2>; 1734 1735 vin13isp1: endpoint@1 { 1736 reg = <1>; 1737 remote-endpoint = <&isp1vin13>; 1738 }; 1739 }; 1740 }; 1741 }; 1742 1743 vin14: video@e6efe000 { 1744 compatible = "renesas,vin-r8a779g0", 1745 "renesas,rcar-gen4-vin"; 1746 reg = <0 0xe6efe000 0 0x1000>; 1747 interrupts = <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>; 1748 clocks = <&cpg CPG_MOD 812>; 1749 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1750 resets = <&cpg 812>; 1751 renesas,id = <14>; 1752 status = "disabled"; 1753 1754 ports { 1755 #address-cells = <1>; 1756 #size-cells = <0>; 1757 1758 port@2 { 1759 #address-cells = <1>; 1760 #size-cells = <0>; 1761 1762 reg = <2>; 1763 1764 vin14isp1: endpoint@1 { 1765 reg = <1>; 1766 remote-endpoint = <&isp1vin14>; 1767 }; 1768 }; 1769 }; 1770 }; 1771 1772 vin15: video@e6eff000 { 1773 compatible = "renesas,vin-r8a779g0", 1774 "renesas,rcar-gen4-vin"; 1775 reg = <0 0xe6eff000 0 0x1000>; 1776 interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>; 1777 clocks = <&cpg CPG_MOD 813>; 1778 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1779 resets = <&cpg 813>; 1780 renesas,id = <15>; 1781 status = "disabled"; 1782 1783 ports { 1784 #address-cells = <1>; 1785 #size-cells = <0>; 1786 1787 port@2 { 1788 #address-cells = <1>; 1789 #size-cells = <0>; 1790 1791 reg = <2>; 1792 1793 vin15isp1: endpoint@1 { 1794 reg = <1>; 1795 remote-endpoint = <&isp1vin15>; 1796 }; 1797 }; 1798 }; 1799 }; 1800 1801 dmac0: dma-controller@e7350000 { 1802 compatible = "renesas,dmac-r8a779g0", 1803 "renesas,rcar-gen4-dmac"; 1804 reg = <0 0xe7350000 0 0x1000>, 1805 <0 0xe7300000 0 0x10000>; 1806 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 1807 <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 1808 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 1809 <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 1810 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 1811 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 1812 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 1813 <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 1814 <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 1815 <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 1816 <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 1817 <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 1818 <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, 1819 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, 1820 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, 1821 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 1822 <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 1823 interrupt-names = "error", 1824 "ch0", "ch1", "ch2", "ch3", "ch4", 1825 "ch5", "ch6", "ch7", "ch8", "ch9", 1826 "ch10", "ch11", "ch12", "ch13", 1827 "ch14", "ch15"; 1828 clocks = <&cpg CPG_MOD 709>; 1829 clock-names = "fck"; 1830 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1831 resets = <&cpg 709>; 1832 #dma-cells = <1>; 1833 dma-channels = <16>; 1834 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 1835 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 1836 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 1837 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 1838 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 1839 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 1840 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 1841 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 1842 }; 1843 1844 dmac1: dma-controller@e7351000 { 1845 compatible = "renesas,dmac-r8a779g0", 1846 "renesas,rcar-gen4-dmac"; 1847 reg = <0 0xe7351000 0 0x1000>, 1848 <0 0xe7310000 0 0x10000>; 1849 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 1850 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 1851 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 1852 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 1853 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 1854 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 1855 <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 1856 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 1857 <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 1858 <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1859 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 1860 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 1861 <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 1862 <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 1863 <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1864 <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 1865 <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 1866 interrupt-names = "error", 1867 "ch0", "ch1", "ch2", "ch3", "ch4", 1868 "ch5", "ch6", "ch7", "ch8", "ch9", 1869 "ch10", "ch11", "ch12", "ch13", 1870 "ch14", "ch15"; 1871 clocks = <&cpg CPG_MOD 710>; 1872 clock-names = "fck"; 1873 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1874 resets = <&cpg 710>; 1875 #dma-cells = <1>; 1876 dma-channels = <16>; 1877 iommus = <&ipmmu_ds0 16>, <&ipmmu_ds0 17>, 1878 <&ipmmu_ds0 18>, <&ipmmu_ds0 19>, 1879 <&ipmmu_ds0 20>, <&ipmmu_ds0 21>, 1880 <&ipmmu_ds0 22>, <&ipmmu_ds0 23>, 1881 <&ipmmu_ds0 24>, <&ipmmu_ds0 25>, 1882 <&ipmmu_ds0 26>, <&ipmmu_ds0 27>, 1883 <&ipmmu_ds0 28>, <&ipmmu_ds0 29>, 1884 <&ipmmu_ds0 30>, <&ipmmu_ds0 31>; 1885 }; 1886 1887 rcar_sound: sound@ec5a0000 { 1888 compatible = "renesas,rcar_sound-r8a779g0", "renesas,rcar_sound-gen4"; 1889 reg = <0 0xec5a0000 0 0x020>, 1890 <0 0xec540000 0 0x1000>, 1891 <0 0xec541000 0 0x050>, 1892 <0 0xec400000 0 0x40000>; 1893 reg-names = "adg", "ssiu", "ssi", "sdmc"; 1894 1895 clocks = <&cpg CPG_MOD 2926>, <&cpg CPG_MOD 2927>, <&audio_clkin>; 1896 clock-names = "ssiu.0", "ssi.0", "clkin"; 1897 /* #clock-cells is fixed */ 1898 #clock-cells = <0>; 1899 /* #sound-dai-cells is fixed */ 1900 #sound-dai-cells = <0>; 1901 1902 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1903 resets = <&cpg 2926>, <&cpg 2927>; 1904 reset-names = "ssiu.0", "ssi.0"; 1905 status = "disabled"; 1906 1907 rcar_sound,ssiu { 1908 ssiu00: ssiu-0 { 1909 dmas = <&dmac0 0x6e>, <&dmac0 0x6f>; 1910 dma-names = "tx", "rx"; 1911 }; 1912 ssiu01: ssiu-1 { 1913 dmas = <&dmac0 0x6c>, <&dmac0 0x6d>; 1914 dma-names = "tx", "rx"; 1915 }; 1916 ssiu02: ssiu-2 { 1917 dmas = <&dmac0 0x6a>, <&dmac0 0x6b>; 1918 dma-names = "tx", "rx"; 1919 }; 1920 ssiu03: ssiu-3 { 1921 dmas = <&dmac0 0x68>, <&dmac0 0x69>; 1922 dma-names = "tx", "rx"; 1923 }; 1924 ssiu04: ssiu-4 { 1925 dmas = <&dmac0 0x66>, <&dmac0 0x67>; 1926 dma-names = "tx", "rx"; 1927 }; 1928 ssiu05: ssiu-5 { 1929 dmas = <&dmac0 0x64>, <&dmac0 0x65>; 1930 dma-names = "tx", "rx"; 1931 }; 1932 ssiu06: ssiu-6 { 1933 dmas = <&dmac0 0x62>, <&dmac0 0x63>; 1934 dma-names = "tx", "rx"; 1935 }; 1936 ssiu07: ssiu-7 { 1937 dmas = <&dmac0 0x60>, <&dmac0 0x61>; 1938 dma-names = "tx", "rx"; 1939 }; 1940 }; 1941 1942 rcar_sound,ssi { 1943 ssi0: ssi-0 { 1944 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>; 1945 }; 1946 }; 1947 }; 1948 1949 mmc0: mmc@ee140000 { 1950 compatible = "renesas,sdhi-r8a779g0", 1951 "renesas,rcar-gen4-sdhi"; 1952 reg = <0 0xee140000 0 0x2000>; 1953 interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>; 1954 clocks = <&cpg CPG_MOD 706>, 1955 <&cpg CPG_CORE R8A779G0_CLK_SD0H>; 1956 clock-names = "core", "clkh"; 1957 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1958 resets = <&cpg 706>; 1959 max-frequency = <200000000>; 1960 iommus = <&ipmmu_ds0 32>; 1961 status = "disabled"; 1962 }; 1963 1964 rpc: spi@ee200000 { 1965 compatible = "renesas,r8a779g0-rpc-if", 1966 "renesas,rcar-gen4-rpc-if"; 1967 reg = <0 0xee200000 0 0x200>, 1968 <0 0x08000000 0 0x04000000>, 1969 <0 0xee208000 0 0x100>; 1970 reg-names = "regs", "dirmap", "wbuf"; 1971 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 1972 clocks = <&cpg CPG_MOD 629>; 1973 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1974 resets = <&cpg 629>; 1975 #address-cells = <1>; 1976 #size-cells = <0>; 1977 status = "disabled"; 1978 }; 1979 1980 ipmmu_rt0: iommu@ee480000 { 1981 compatible = "renesas,ipmmu-r8a779g0", 1982 "renesas,rcar-gen4-ipmmu-vmsa"; 1983 reg = <0 0xee480000 0 0x20000>; 1984 renesas,ipmmu-main = <&ipmmu_mm>; 1985 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1986 #iommu-cells = <1>; 1987 }; 1988 1989 ipmmu_rt1: iommu@ee4c0000 { 1990 compatible = "renesas,ipmmu-r8a779g0", 1991 "renesas,rcar-gen4-ipmmu-vmsa"; 1992 reg = <0 0xee4c0000 0 0x20000>; 1993 renesas,ipmmu-main = <&ipmmu_mm>; 1994 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1995 #iommu-cells = <1>; 1996 }; 1997 1998 ipmmu_ds0: iommu@eed00000 { 1999 compatible = "renesas,ipmmu-r8a779g0", 2000 "renesas,rcar-gen4-ipmmu-vmsa"; 2001 reg = <0 0xeed00000 0 0x20000>; 2002 renesas,ipmmu-main = <&ipmmu_mm>; 2003 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2004 #iommu-cells = <1>; 2005 }; 2006 2007 ipmmu_hc: iommu@eed40000 { 2008 compatible = "renesas,ipmmu-r8a779g0", 2009 "renesas,rcar-gen4-ipmmu-vmsa"; 2010 reg = <0 0xeed40000 0 0x20000>; 2011 renesas,ipmmu-main = <&ipmmu_mm>; 2012 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2013 #iommu-cells = <1>; 2014 }; 2015 2016 ipmmu_ir: iommu@eed80000 { 2017 compatible = "renesas,ipmmu-r8a779g0", 2018 "renesas,rcar-gen4-ipmmu-vmsa"; 2019 reg = <0 0xeed80000 0 0x20000>; 2020 renesas,ipmmu-main = <&ipmmu_mm>; 2021 power-domains = <&sysc R8A779G0_PD_A3IR>; 2022 #iommu-cells = <1>; 2023 }; 2024 2025 ipmmu_vc: iommu@eedc0000 { 2026 compatible = "renesas,ipmmu-r8a779g0", 2027 "renesas,rcar-gen4-ipmmu-vmsa"; 2028 reg = <0 0xeedc0000 0 0x20000>; 2029 renesas,ipmmu-main = <&ipmmu_mm>; 2030 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2031 #iommu-cells = <1>; 2032 }; 2033 2034 ipmmu_3dg: iommu@eee00000 { 2035 compatible = "renesas,ipmmu-r8a779g0", 2036 "renesas,rcar-gen4-ipmmu-vmsa"; 2037 reg = <0 0xeee00000 0 0x20000>; 2038 renesas,ipmmu-main = <&ipmmu_mm>; 2039 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2040 #iommu-cells = <1>; 2041 }; 2042 2043 ipmmu_vi0: iommu@eee80000 { 2044 compatible = "renesas,ipmmu-r8a779g0", 2045 "renesas,rcar-gen4-ipmmu-vmsa"; 2046 reg = <0 0xeee80000 0 0x20000>; 2047 renesas,ipmmu-main = <&ipmmu_mm>; 2048 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2049 #iommu-cells = <1>; 2050 }; 2051 2052 ipmmu_vi1: iommu@eeec0000 { 2053 compatible = "renesas,ipmmu-r8a779g0", 2054 "renesas,rcar-gen4-ipmmu-vmsa"; 2055 reg = <0 0xeeec0000 0 0x20000>; 2056 renesas,ipmmu-main = <&ipmmu_mm>; 2057 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2058 #iommu-cells = <1>; 2059 }; 2060 2061 ipmmu_vip0: iommu@eef00000 { 2062 compatible = "renesas,ipmmu-r8a779g0", 2063 "renesas,rcar-gen4-ipmmu-vmsa"; 2064 reg = <0 0xeef00000 0 0x20000>; 2065 renesas,ipmmu-main = <&ipmmu_mm>; 2066 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2067 #iommu-cells = <1>; 2068 }; 2069 2070 ipmmu_vip1: iommu@eef40000 { 2071 compatible = "renesas,ipmmu-r8a779g0", 2072 "renesas,rcar-gen4-ipmmu-vmsa"; 2073 reg = <0 0xeef40000 0 0x20000>; 2074 renesas,ipmmu-main = <&ipmmu_mm>; 2075 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2076 #iommu-cells = <1>; 2077 }; 2078 2079 ipmmu_mm: iommu@eefc0000 { 2080 compatible = "renesas,ipmmu-r8a779g0", 2081 "renesas,rcar-gen4-ipmmu-vmsa"; 2082 reg = <0 0xeefc0000 0 0x20000>; 2083 interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 2084 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>; 2085 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2086 #iommu-cells = <1>; 2087 }; 2088 2089 gic: interrupt-controller@f1000000 { 2090 compatible = "arm,gic-v3"; 2091 #interrupt-cells = <3>; 2092 #address-cells = <0>; 2093 interrupt-controller; 2094 reg = <0x0 0xf1000000 0 0x20000>, 2095 <0x0 0xf1060000 0 0x110000>; 2096 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 2097 }; 2098 2099 csi40: csi2@fe500000 { 2100 compatible = "renesas,r8a779g0-csi2"; 2101 reg = <0 0xfe500000 0 0x40000>; 2102 interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>; 2103 clocks = <&cpg CPG_MOD 331>; 2104 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2105 resets = <&cpg 331>; 2106 status = "disabled"; 2107 2108 ports { 2109 #address-cells = <1>; 2110 #size-cells = <0>; 2111 2112 port@0 { 2113 reg = <0>; 2114 }; 2115 2116 port@1 { 2117 reg = <1>; 2118 csi40isp0: endpoint { 2119 remote-endpoint = <&isp0csi40>; 2120 }; 2121 }; 2122 }; 2123 }; 2124 2125 csi41: csi2@fe540000 { 2126 compatible = "renesas,r8a779g0-csi2"; 2127 reg = <0 0xfe540000 0 0x40000>; 2128 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>; 2129 clocks = <&cpg CPG_MOD 400>; 2130 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2131 resets = <&cpg 400>; 2132 status = "disabled"; 2133 2134 ports { 2135 #address-cells = <1>; 2136 #size-cells = <0>; 2137 2138 port@0 { 2139 reg = <0>; 2140 }; 2141 2142 port@1 { 2143 reg = <1>; 2144 csi41isp1: endpoint { 2145 remote-endpoint = <&isp1csi41>; 2146 }; 2147 }; 2148 }; 2149 }; 2150 2151 fcpvd0: fcp@fea10000 { 2152 compatible = "renesas,fcpv"; 2153 reg = <0 0xfea10000 0 0x200>; 2154 clocks = <&cpg CPG_MOD 508>; 2155 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2156 resets = <&cpg 508>; 2157 iommus = <&ipmmu_vi1 6>; 2158 }; 2159 2160 fcpvd1: fcp@fea11000 { 2161 compatible = "renesas,fcpv"; 2162 reg = <0 0xfea11000 0 0x200>; 2163 clocks = <&cpg CPG_MOD 509>; 2164 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2165 resets = <&cpg 509>; 2166 iommus = <&ipmmu_vi1 7>; 2167 }; 2168 2169 vspd0: vsp@fea20000 { 2170 compatible = "renesas,vsp2"; 2171 reg = <0 0xfea20000 0 0x7000>; 2172 interrupts = <GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH>; 2173 clocks = <&cpg CPG_MOD 830>; 2174 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2175 resets = <&cpg 830>; 2176 2177 renesas,fcp = <&fcpvd0>; 2178 }; 2179 2180 vspd1: vsp@fea28000 { 2181 compatible = "renesas,vsp2"; 2182 reg = <0 0xfea28000 0 0x7000>; 2183 interrupts = <GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>; 2184 clocks = <&cpg CPG_MOD 831>; 2185 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2186 resets = <&cpg 831>; 2187 2188 renesas,fcp = <&fcpvd1>; 2189 }; 2190 2191 du: display@feb00000 { 2192 compatible = "renesas,du-r8a779g0"; 2193 reg = <0 0xfeb00000 0 0x40000>; 2194 interrupts = <GIC_SPI 523 IRQ_TYPE_LEVEL_HIGH>, 2195 <GIC_SPI 524 IRQ_TYPE_LEVEL_HIGH>; 2196 clocks = <&cpg CPG_MOD 411>; 2197 clock-names = "du.0"; 2198 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2199 resets = <&cpg 411>; 2200 reset-names = "du.0"; 2201 renesas,vsps = <&vspd0 0>, <&vspd1 0>; 2202 2203 status = "disabled"; 2204 2205 ports { 2206 #address-cells = <1>; 2207 #size-cells = <0>; 2208 2209 port@0 { 2210 reg = <0>; 2211 du_out_dsi0: endpoint { 2212 remote-endpoint = <&dsi0_in>; 2213 }; 2214 }; 2215 2216 port@1 { 2217 reg = <1>; 2218 du_out_dsi1: endpoint { 2219 remote-endpoint = <&dsi1_in>; 2220 }; 2221 }; 2222 }; 2223 }; 2224 2225 isp0: isp@fed00000 { 2226 compatible = "renesas,r8a779g0-isp", 2227 "renesas,rcar-gen4-isp"; 2228 reg = <0 0xfed00000 0 0x10000>; 2229 interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_LOW>; 2230 clocks = <&cpg CPG_MOD 612>; 2231 power-domains = <&sysc R8A779G0_PD_A3ISP0>; 2232 resets = <&cpg 612>; 2233 status = "disabled"; 2234 2235 ports { 2236 #address-cells = <1>; 2237 #size-cells = <0>; 2238 2239 port@0 { 2240 #address-cells = <1>; 2241 #size-cells = <0>; 2242 2243 reg = <0>; 2244 2245 isp0csi40: endpoint@0 { 2246 reg = <0>; 2247 remote-endpoint = <&csi40isp0>; 2248 }; 2249 }; 2250 2251 port@1 { 2252 reg = <1>; 2253 isp0vin00: endpoint { 2254 remote-endpoint = <&vin00isp0>; 2255 }; 2256 }; 2257 2258 port@2 { 2259 reg = <2>; 2260 isp0vin01: endpoint { 2261 remote-endpoint = <&vin01isp0>; 2262 }; 2263 }; 2264 2265 port@3 { 2266 reg = <3>; 2267 isp0vin02: endpoint { 2268 remote-endpoint = <&vin02isp0>; 2269 }; 2270 }; 2271 2272 port@4 { 2273 reg = <4>; 2274 isp0vin03: endpoint { 2275 remote-endpoint = <&vin03isp0>; 2276 }; 2277 }; 2278 2279 port@5 { 2280 reg = <5>; 2281 isp0vin04: endpoint { 2282 remote-endpoint = <&vin04isp0>; 2283 }; 2284 }; 2285 2286 port@6 { 2287 reg = <6>; 2288 isp0vin05: endpoint { 2289 remote-endpoint = <&vin05isp0>; 2290 }; 2291 }; 2292 2293 port@7 { 2294 reg = <7>; 2295 isp0vin06: endpoint { 2296 remote-endpoint = <&vin06isp0>; 2297 }; 2298 }; 2299 2300 port@8 { 2301 reg = <8>; 2302 isp0vin07: endpoint { 2303 remote-endpoint = <&vin07isp0>; 2304 }; 2305 }; 2306 }; 2307 }; 2308 2309 isp1: isp@fed20000 { 2310 compatible = "renesas,r8a779g0-isp", 2311 "renesas,rcar-gen4-isp"; 2312 reg = <0 0xfed20000 0 0x10000>; 2313 interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_LOW>; 2314 clocks = <&cpg CPG_MOD 613>; 2315 power-domains = <&sysc R8A779G0_PD_A3ISP1>; 2316 resets = <&cpg 613>; 2317 status = "disabled"; 2318 2319 ports { 2320 #address-cells = <1>; 2321 #size-cells = <0>; 2322 2323 port@0 { 2324 #address-cells = <1>; 2325 #size-cells = <0>; 2326 2327 reg = <0>; 2328 2329 isp1csi41: endpoint@1 { 2330 reg = <1>; 2331 remote-endpoint = <&csi41isp1>; 2332 }; 2333 }; 2334 2335 port@1 { 2336 reg = <1>; 2337 isp1vin08: endpoint { 2338 remote-endpoint = <&vin08isp1>; 2339 }; 2340 }; 2341 2342 port@2 { 2343 reg = <2>; 2344 isp1vin09: endpoint { 2345 remote-endpoint = <&vin09isp1>; 2346 }; 2347 }; 2348 2349 port@3 { 2350 reg = <3>; 2351 isp1vin10: endpoint { 2352 remote-endpoint = <&vin10isp1>; 2353 }; 2354 }; 2355 2356 port@4 { 2357 reg = <4>; 2358 isp1vin11: endpoint { 2359 remote-endpoint = <&vin11isp1>; 2360 }; 2361 }; 2362 2363 port@5 { 2364 reg = <5>; 2365 isp1vin12: endpoint { 2366 remote-endpoint = <&vin12isp1>; 2367 }; 2368 }; 2369 2370 port@6 { 2371 reg = <6>; 2372 isp1vin13: endpoint { 2373 remote-endpoint = <&vin13isp1>; 2374 }; 2375 }; 2376 2377 port@7 { 2378 reg = <7>; 2379 isp1vin14: endpoint { 2380 remote-endpoint = <&vin14isp1>; 2381 }; 2382 }; 2383 2384 port@8 { 2385 reg = <8>; 2386 isp1vin15: endpoint { 2387 remote-endpoint = <&vin15isp1>; 2388 }; 2389 }; 2390 }; 2391 }; 2392 2393 dsi0: dsi-encoder@fed80000 { 2394 compatible = "renesas,r8a779g0-dsi-csi2-tx"; 2395 reg = <0 0xfed80000 0 0x10000>; 2396 clocks = <&cpg CPG_MOD 415>, 2397 <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, 2398 <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; 2399 clock-names = "fck", "dsi", "pll"; 2400 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2401 resets = <&cpg 415>; 2402 2403 status = "disabled"; 2404 2405 ports { 2406 #address-cells = <1>; 2407 #size-cells = <0>; 2408 2409 port@0 { 2410 reg = <0>; 2411 dsi0_in: endpoint { 2412 remote-endpoint = <&du_out_dsi0>; 2413 }; 2414 }; 2415 2416 port@1 { 2417 reg = <1>; 2418 }; 2419 }; 2420 }; 2421 2422 dsi1: dsi-encoder@fed90000 { 2423 compatible = "renesas,r8a779g0-dsi-csi2-tx"; 2424 reg = <0 0xfed90000 0 0x10000>; 2425 clocks = <&cpg CPG_MOD 416>, 2426 <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, 2427 <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; 2428 clock-names = "fck", "dsi", "pll"; 2429 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2430 resets = <&cpg 416>; 2431 2432 status = "disabled"; 2433 2434 ports { 2435 #address-cells = <1>; 2436 #size-cells = <0>; 2437 2438 port@0 { 2439 reg = <0>; 2440 dsi1_in: endpoint { 2441 remote-endpoint = <&du_out_dsi1>; 2442 }; 2443 }; 2444 2445 port@1 { 2446 reg = <1>; 2447 }; 2448 }; 2449 }; 2450 2451 prr: chipid@fff00044 { 2452 compatible = "renesas,prr"; 2453 reg = <0 0xfff00044 0 4>; 2454 }; 2455 }; 2456 2457 thermal-zones { 2458 sensor_thermal_cr52: sensor1-thermal { 2459 polling-delay-passive = <250>; 2460 polling-delay = <1000>; 2461 thermal-sensors = <&tsc 0>; 2462 2463 trips { 2464 sensor1_crit: sensor1-crit { 2465 temperature = <120000>; 2466 hysteresis = <1000>; 2467 type = "critical"; 2468 }; 2469 }; 2470 }; 2471 2472 sensor_thermal_cnn: sensor2-thermal { 2473 polling-delay-passive = <250>; 2474 polling-delay = <1000>; 2475 thermal-sensors = <&tsc 1>; 2476 2477 trips { 2478 sensor2_crit: sensor2-crit { 2479 temperature = <120000>; 2480 hysteresis = <1000>; 2481 type = "critical"; 2482 }; 2483 }; 2484 }; 2485 2486 sensor_thermal_ca76: sensor3-thermal { 2487 polling-delay-passive = <250>; 2488 polling-delay = <1000>; 2489 thermal-sensors = <&tsc 2>; 2490 2491 trips { 2492 sensor3_crit: sensor3-crit { 2493 temperature = <120000>; 2494 hysteresis = <1000>; 2495 type = "critical"; 2496 }; 2497 }; 2498 }; 2499 2500 sensor_thermal_ddr1: sensor4-thermal { 2501 polling-delay-passive = <250>; 2502 polling-delay = <1000>; 2503 thermal-sensors = <&tsc 3>; 2504 2505 trips { 2506 sensor4_crit: sensor4-crit { 2507 temperature = <120000>; 2508 hysteresis = <1000>; 2509 type = "critical"; 2510 }; 2511 }; 2512 }; 2513 }; 2514 2515 timer { 2516 compatible = "arm,armv8-timer"; 2517 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, 2518 <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, 2519 <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, 2520 <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, 2521 <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; 2522 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", 2523 "hyp-virt"; 2524 }; 2525}; 2526