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Searched defs:smu_11_0_7_powerplay_table (Results 1 – 1 of 1) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/inc/
Dsmu_v11_0_7_pptable.h172 struct smu_11_0_7_powerplay_table struct
174 …header header; //For sienna_cichlid, header.format_revision = 15, header.content_revision = 0
175 uint8_t table_revision; //For sienna_cichlid, table_revision = 2
176 … //Driver portion table size. The offset to smc_pptable including header size
177 …uint32_t golden_pp_id; //PPGen use only: PP Table ID on the Golden Data Base
178 …_t golden_revision; //PPGen use only: PP Table Revision on the Golden Data Base
179 … //PPGen use only: PPTable for different ASICs. For sienna_cichlid this should be 0x80
180 uint32_t platform_caps; //POWERPLAYABLE::ulPlatformCaps
182 uint8_t thermal_controller_type; //one of SMU_11_0_7_PP_THERMALCONTROLLER
184 uint16_t small_power_limit1;
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