1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
4 *
5 * Contact Information: wlanfae <wlanfae@realtek.com>
6 */
7 #include "rtl_core.h"
8 #include "rtl_dm.h"
9 #include "r8192E_hw.h"
10 #include "r8192E_phy.h"
11 #include "r8192E_phyreg.h"
12 #include "r8190P_rtl8256.h"
13 #include "r8192E_cmdpkt.h"
14
15 /*---------------------------Define Local Constant---------------------------*/
16 static u32 edca_setting_DL[HT_IOT_PEER_MAX] = {
17 0x5e4322,
18 0x5e4322,
19 0x5ea44f,
20 0x5e4322,
21 0x604322,
22 0xa44f,
23 0x5e4322,
24 0x5e4332
25 };
26
27 static u32 edca_setting_DL_GMode[HT_IOT_PEER_MAX] = {
28 0x5e4322,
29 0x5e4322,
30 0x5e4322,
31 0x5e4322,
32 0x604322,
33 0xa44f,
34 0x5e4322,
35 0x5e4322
36 };
37
38 static u32 edca_setting_UL[HT_IOT_PEER_MAX] = {
39 0x5e4322,
40 0xa44f,
41 0x5ea44f,
42 0x5e4322,
43 0x604322,
44 0x5e4322,
45 0x5e4322,
46 0x5e4332
47 };
48
49 const u32 dm_tx_bb_gain[TX_BB_GAIN_TABLE_LEN] = {
50 0x7f8001fe, /* 12 dB */
51 0x788001e2, /* 11 dB */
52 0x71c001c7,
53 0x6b8001ae,
54 0x65400195,
55 0x5fc0017f,
56 0x5a400169,
57 0x55400155,
58 0x50800142,
59 0x4c000130,
60 0x47c0011f,
61 0x43c0010f,
62 0x40000100,
63 0x3c8000f2,
64 0x390000e4,
65 0x35c000d7,
66 0x32c000cb,
67 0x300000c0,
68 0x2d4000b5,
69 0x2ac000ab,
70 0x288000a2,
71 0x26000098,
72 0x24000090,
73 0x22000088,
74 0x20000080,
75 0x1a00006c,
76 0x1c800072,
77 0x18000060,
78 0x19800066,
79 0x15800056,
80 0x26c0005b,
81 0x14400051,
82 0x24400051,
83 0x1300004c,
84 0x12000048,
85 0x11000044,
86 0x10000040, /* -24 dB */
87 };
88
89 const u8 dm_cck_tx_bb_gain[CCK_TX_BB_GAIN_TABLE_LEN][8] = {
90 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
91 {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},
92 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
93 {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},
94 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
95 {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},
96 {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
97 {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},
98 {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
99 {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},
100 {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
101 {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},
102 {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
103 {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},
104 {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
105 {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},
106 {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
107 {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},
108 {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
109 {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
110 {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
111 {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},
112 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}
113 };
114
115 const u8 dm_cck_tx_bb_gain_ch14[CCK_TX_BB_GAIN_TABLE_LEN][8] = {
116 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
117 {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},
118 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
119 {0x2d, 0x2d, 0x27, 0x17, 0x00, 0x00, 0x00, 0x00},
120 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
121 {0x28, 0x28, 0x22, 0x14, 0x00, 0x00, 0x00, 0x00},
122 {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
123 {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},
124 {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
125 {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},
126 {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
127 {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},
128 {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
129 {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},
130 {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
131 {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},
132 {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
133 {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},
134 {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
135 {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
136 {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
137 {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},
138 {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}
139 };
140
141 /*---------------------------Define Local Constant---------------------------*/
142
143
144 /*------------------------Define global variable-----------------------------*/
145 struct dig_t dm_digtable;
146
147 static struct drx_path_sel dm_rx_path_sel_table;
148 /*------------------------Define global variable-----------------------------*/
149
150
151 /*------------------------Define local variable------------------------------*/
152 /*------------------------Define local variable------------------------------*/
153
154
155
156 /*---------------------Define local function prototype-----------------------*/
157 static void _rtl92e_dm_check_rate_adaptive(struct net_device *dev);
158
159 static void _rtl92e_dm_init_bandwidth_autoswitch(struct net_device *dev);
160 static void _rtl92e_dm_bandwidth_autoswitch(struct net_device *dev);
161
162 static void _rtl92e_dm_check_tx_power_tracking(struct net_device *dev);
163
164 static void _rtl92e_dm_dig_init(struct net_device *dev);
165 static void _rtl92e_dm_ctrl_initgain_byrssi(struct net_device *dev);
166 static void _rtl92e_dm_initial_gain(struct net_device *dev);
167 static void _rtl92e_dm_pd_th(struct net_device *dev);
168 static void _rtl92e_dm_cs_ratio(struct net_device *dev);
169
170 static void _rtl92e_dm_init_cts_to_self(struct net_device *dev);
171
172 static void _rtl92e_dm_check_edca_turbo(struct net_device *dev);
173 static void _rtl92e_dm_check_rx_path_selection(struct net_device *dev);
174 static void _rtl92e_dm_init_rx_path_selection(struct net_device *dev);
175 static void _rtl92e_dm_rx_path_sel_byrssi(struct net_device *dev);
176
177 static void _rtl92e_dm_init_fsync(struct net_device *dev);
178 static void _rtl92e_dm_deinit_fsync(struct net_device *dev);
179
180 static void _rtl92e_dm_check_txrateandretrycount(struct net_device *dev);
181 static void _rtl92e_dm_check_fsync(struct net_device *dev);
182 static void _rtl92e_dm_check_rf_ctrl_gpio(void *data);
183 static void _rtl92e_dm_fsync_timer_callback(struct timer_list *t);
184
185 /*---------------------Define local function prototype-----------------------*/
186
187 static void _rtl92e_dm_init_dynamic_tx_power(struct net_device *dev);
188 static void _rtl92e_dm_dynamic_tx_power(struct net_device *dev);
189
190 static void _rtl92e_dm_send_rssi_to_fw(struct net_device *dev);
191 static void _rtl92e_dm_cts_to_self(struct net_device *dev);
192 /*---------------------------Define function prototype------------------------*/
193
rtl92e_dm_init(struct net_device * dev)194 void rtl92e_dm_init(struct net_device *dev)
195 {
196 struct r8192_priv *priv = rtllib_priv(dev);
197
198 priv->undecorated_smoothed_pwdb = -1;
199
200 _rtl92e_dm_init_dynamic_tx_power(dev);
201
202 rtl92e_init_adaptive_rate(dev);
203
204 _rtl92e_dm_dig_init(dev);
205 rtl92e_dm_init_edca_turbo(dev);
206 _rtl92e_dm_init_bandwidth_autoswitch(dev);
207 _rtl92e_dm_init_fsync(dev);
208 _rtl92e_dm_init_rx_path_selection(dev);
209 _rtl92e_dm_init_cts_to_self(dev);
210
211 INIT_DELAYED_WORK(&priv->gpio_change_rf_wq, (void *)_rtl92e_dm_check_rf_ctrl_gpio);
212 }
213
rtl92e_dm_deinit(struct net_device * dev)214 void rtl92e_dm_deinit(struct net_device *dev)
215 {
216 _rtl92e_dm_deinit_fsync(dev);
217 }
218
rtl92e_dm_watchdog(struct net_device * dev)219 void rtl92e_dm_watchdog(struct net_device *dev)
220 {
221 struct r8192_priv *priv = rtllib_priv(dev);
222
223 if (priv->being_init_adapter)
224 return;
225
226 _rtl92e_dm_check_txrateandretrycount(dev);
227 _rtl92e_dm_check_edca_turbo(dev);
228
229 _rtl92e_dm_check_rate_adaptive(dev);
230 _rtl92e_dm_dynamic_tx_power(dev);
231 _rtl92e_dm_check_tx_power_tracking(dev);
232
233 _rtl92e_dm_ctrl_initgain_byrssi(dev);
234 _rtl92e_dm_bandwidth_autoswitch(dev);
235
236 _rtl92e_dm_check_rx_path_selection(dev);
237 _rtl92e_dm_check_fsync(dev);
238
239 _rtl92e_dm_send_rssi_to_fw(dev);
240 _rtl92e_dm_cts_to_self(dev);
241 }
242
rtl92e_init_adaptive_rate(struct net_device * dev)243 void rtl92e_init_adaptive_rate(struct net_device *dev)
244 {
245 struct r8192_priv *priv = rtllib_priv(dev);
246 struct rate_adaptive *pra = &priv->rate_adaptive;
247
248 pra->ratr_state = DM_RATR_STA_MAX;
249 pra->high2low_rssi_thresh_for_ra = RATE_ADAPTIVE_TH_HIGH;
250 pra->low2high_rssi_thresh_for_ra20M = RATE_ADAPTIVE_TH_LOW_20M + 5;
251 pra->low2high_rssi_thresh_for_ra40M = RATE_ADAPTIVE_TH_LOW_40M + 5;
252
253 pra->high_rssi_thresh_for_ra = RATE_ADAPTIVE_TH_HIGH + 5;
254 pra->low_rssi_thresh_for_ra20M = RATE_ADAPTIVE_TH_LOW_20M;
255 pra->low_rssi_thresh_for_ra40M = RATE_ADAPTIVE_TH_LOW_40M;
256
257 if (priv->customer_id == RT_CID_819X_NETCORE)
258 pra->ping_rssi_enable = 1;
259 else
260 pra->ping_rssi_enable = 0;
261 pra->ping_rssi_thresh_for_ra = 15;
262
263 pra->upper_rssi_threshold_ratr = 0x000fc000;
264 pra->middle_rssi_threshold_ratr = 0x000ff000;
265 pra->low_rssi_threshold_ratr = 0x000ff001;
266 pra->low_rssi_threshold_ratr_40M = 0x000ff005;
267 pra->low_rssi_threshold_ratr_20M = 0x000ff001;
268 pra->ping_rssi_ratr = 0x0000000d;
269 }
270
_rtl92e_dm_check_rate_adaptive(struct net_device * dev)271 static void _rtl92e_dm_check_rate_adaptive(struct net_device *dev)
272 {
273 struct r8192_priv *priv = rtllib_priv(dev);
274 struct rt_hi_throughput *ht_info = priv->rtllib->ht_info;
275 struct rate_adaptive *pra = &priv->rate_adaptive;
276 u32 current_ratr, target_ratr = 0;
277 u32 low_rssi_thresh_for_ra = 0, high_rssi_thresh_for_ra = 0;
278 bool bshort_gi_enabled = false;
279 static u8 ping_rssi_state;
280
281 if (!priv->up)
282 return;
283
284 if (priv->rtllib->mode != WIRELESS_MODE_N_24G)
285 return;
286
287 if (priv->rtllib->link_state == MAC80211_LINKED) {
288 bshort_gi_enabled = (ht_info->cur_tx_bw40mhz &&
289 ht_info->cur_short_gi_40mhz) ||
290 (!ht_info->cur_tx_bw40mhz &&
291 ht_info->cur_short_gi_20mhz);
292
293 pra->upper_rssi_threshold_ratr =
294 (pra->upper_rssi_threshold_ratr & (~BIT(31))) |
295 ((bshort_gi_enabled) ? BIT(31) : 0);
296
297 pra->middle_rssi_threshold_ratr =
298 (pra->middle_rssi_threshold_ratr & (~BIT(31))) |
299 ((bshort_gi_enabled) ? BIT(31) : 0);
300
301 if (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) {
302 pra->low_rssi_threshold_ratr =
303 (pra->low_rssi_threshold_ratr_40M & (~BIT(31))) |
304 ((bshort_gi_enabled) ? BIT(31) : 0);
305 } else {
306 pra->low_rssi_threshold_ratr =
307 (pra->low_rssi_threshold_ratr_20M & (~BIT(31))) |
308 ((bshort_gi_enabled) ? BIT(31) : 0);
309 }
310 pra->ping_rssi_ratr =
311 (pra->ping_rssi_ratr & (~BIT(31))) |
312 ((bshort_gi_enabled) ? BIT(31) : 0);
313
314 if (pra->ratr_state == DM_RATR_STA_HIGH) {
315 high_rssi_thresh_for_ra = pra->high2low_rssi_thresh_for_ra;
316 low_rssi_thresh_for_ra = (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) ?
317 (pra->low_rssi_thresh_for_ra40M) : (pra->low_rssi_thresh_for_ra20M);
318 } else if (pra->ratr_state == DM_RATR_STA_LOW) {
319 high_rssi_thresh_for_ra = pra->high_rssi_thresh_for_ra;
320 low_rssi_thresh_for_ra = (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) ?
321 (pra->low2high_rssi_thresh_for_ra40M) : (pra->low2high_rssi_thresh_for_ra20M);
322 } else {
323 high_rssi_thresh_for_ra = pra->high_rssi_thresh_for_ra;
324 low_rssi_thresh_for_ra = (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) ?
325 (pra->low_rssi_thresh_for_ra40M) : (pra->low_rssi_thresh_for_ra20M);
326 }
327
328 if (priv->undecorated_smoothed_pwdb >=
329 (long)high_rssi_thresh_for_ra) {
330 pra->ratr_state = DM_RATR_STA_HIGH;
331 target_ratr = pra->upper_rssi_threshold_ratr;
332 } else if (priv->undecorated_smoothed_pwdb >=
333 (long)low_rssi_thresh_for_ra) {
334 pra->ratr_state = DM_RATR_STA_MIDDLE;
335 target_ratr = pra->middle_rssi_threshold_ratr;
336 } else {
337 pra->ratr_state = DM_RATR_STA_LOW;
338 target_ratr = pra->low_rssi_threshold_ratr;
339 }
340
341 if (pra->ping_rssi_enable) {
342 if (priv->undecorated_smoothed_pwdb <
343 (long)(pra->ping_rssi_thresh_for_ra + 5)) {
344 if ((priv->undecorated_smoothed_pwdb <
345 (long)pra->ping_rssi_thresh_for_ra) ||
346 ping_rssi_state) {
347 pra->ratr_state = DM_RATR_STA_LOW;
348 target_ratr = pra->ping_rssi_ratr;
349 ping_rssi_state = 1;
350 }
351 } else {
352 ping_rssi_state = 0;
353 }
354 }
355
356 if (priv->rtllib->get_half_nmode_support_by_aps_handler(dev))
357 target_ratr &= 0xf00fffff;
358
359 current_ratr = rtl92e_readl(dev, RATR0);
360 if (target_ratr != current_ratr) {
361 u32 ratr_value;
362
363 ratr_value = target_ratr;
364 ratr_value &= ~(RATE_ALL_OFDM_2SS);
365 rtl92e_writel(dev, RATR0, ratr_value);
366 rtl92e_writeb(dev, UFWP, 1);
367 }
368
369 } else {
370 pra->ratr_state = DM_RATR_STA_MAX;
371 }
372 }
373
_rtl92e_dm_init_bandwidth_autoswitch(struct net_device * dev)374 static void _rtl92e_dm_init_bandwidth_autoswitch(struct net_device *dev)
375 {
376 struct r8192_priv *priv = rtllib_priv(dev);
377
378 priv->rtllib->bandwidth_auto_switch.threshold_20Mhzto40Mhz = BW_AUTO_SWITCH_LOW_HIGH;
379 priv->rtllib->bandwidth_auto_switch.threshold_40Mhzto20Mhz = BW_AUTO_SWITCH_HIGH_LOW;
380 priv->rtllib->bandwidth_auto_switch.forced_tx_20MHz = false;
381 priv->rtllib->bandwidth_auto_switch.bautoswitch_enable = false;
382 }
383
_rtl92e_dm_bandwidth_autoswitch(struct net_device * dev)384 static void _rtl92e_dm_bandwidth_autoswitch(struct net_device *dev)
385 {
386 struct r8192_priv *priv = rtllib_priv(dev);
387
388 if (priv->current_chnl_bw == HT_CHANNEL_WIDTH_20 ||
389 !priv->rtllib->bandwidth_auto_switch.bautoswitch_enable)
390 return;
391 if (!priv->rtllib->bandwidth_auto_switch.forced_tx_20MHz) {
392 if (priv->undecorated_smoothed_pwdb <=
393 priv->rtllib->bandwidth_auto_switch.threshold_40Mhzto20Mhz)
394 priv->rtllib->bandwidth_auto_switch.forced_tx_20MHz = true;
395 } else {
396 if (priv->undecorated_smoothed_pwdb >=
397 priv->rtllib->bandwidth_auto_switch.threshold_20Mhzto40Mhz)
398 priv->rtllib->bandwidth_auto_switch.forced_tx_20MHz = false;
399 }
400 }
401
402 static u32 OFDMSwingTable[OFDM_TABLE_LEN] = {
403 0x7f8001fe,
404 0x71c001c7,
405 0x65400195,
406 0x5a400169,
407 0x50800142,
408 0x47c0011f,
409 0x40000100,
410 0x390000e4,
411 0x32c000cb,
412 0x2d4000b5,
413 0x288000a2,
414 0x24000090,
415 0x20000080,
416 0x1c800072,
417 0x19800066,
418 0x26c0005b,
419 0x24400051,
420 0x12000048,
421 0x10000040
422 };
423
424 static u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_LEN][8] = {
425 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
426 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
427 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
428 {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
429 {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
430 {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
431 {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
432 {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
433 {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
434 {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
435 {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
436 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}
437 };
438
439 static u8 CCKSwingTable_Ch14[CCK_TABLE_LEN][8] = {
440 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
441 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
442 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
443 {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
444 {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
445 {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
446 {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
447 {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
448 {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
449 {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
450 {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
451 {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}
452 };
453
454 #define Pw_Track_Flag 0x11d
455 #define Tssi_Mea_Value 0x13c
456 #define Tssi_Report_Value1 0x134
457 #define Tssi_Report_Value2 0x13e
458 #define FW_Busy_Flag 0x13f
459
_rtl92e_dm_tx_update_tssi_weak_signal(struct net_device * dev)460 static void _rtl92e_dm_tx_update_tssi_weak_signal(struct net_device *dev)
461 {
462 struct r8192_priv *p = rtllib_priv(dev);
463
464 if (p->rfa_txpowertrackingindex > 0) {
465 p->rfa_txpowertrackingindex--;
466 if (p->rfa_txpowertrackingindex_real > 4) {
467 p->rfa_txpowertrackingindex_real--;
468 rtl92e_set_bb_reg(dev,
469 rOFDM0_XATxIQImbalance,
470 bMaskDWord,
471 dm_tx_bb_gain[p->rfa_txpowertrackingindex_real]);
472 }
473 } else {
474 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
475 bMaskDWord, dm_tx_bb_gain[4]);
476 }
477 }
478
_rtl92e_dm_tx_update_tssi_strong_signal(struct net_device * dev)479 static void _rtl92e_dm_tx_update_tssi_strong_signal(struct net_device *dev)
480 {
481 struct r8192_priv *p = rtllib_priv(dev);
482
483 if (p->rfa_txpowertrackingindex < (TX_BB_GAIN_TABLE_LEN - 1)) {
484 p->rfa_txpowertrackingindex++;
485 p->rfa_txpowertrackingindex_real++;
486 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
487 bMaskDWord,
488 dm_tx_bb_gain[p->rfa_txpowertrackingindex_real]);
489 } else {
490 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
491 bMaskDWord,
492 dm_tx_bb_gain[TX_BB_GAIN_TABLE_LEN - 1]);
493 }
494 }
495
_rtl92e_dm_tx_power_tracking_callback_tssi(struct net_device * dev)496 static void _rtl92e_dm_tx_power_tracking_callback_tssi(struct net_device *dev)
497 {
498 struct r8192_priv *priv = rtllib_priv(dev);
499 bool viviflag = false;
500 struct dcmd_txcmd tx_cmd;
501 int i = 0, j = 0, k = 0;
502 u8 tmp_report[5] = {0, 0, 0, 0, 0};
503 u8 Pwr_Flag;
504 u16 Avg_TSSI_Meas, tssi_13dBm, Avg_TSSI_Meas_from_driver = 0;
505 u32 delta = 0;
506
507 rtl92e_writeb(dev, Pw_Track_Flag, 0);
508 rtl92e_writeb(dev, FW_Busy_Flag, 0);
509 priv->rtllib->bdynamic_txpower_enable = false;
510
511 for (j = 0; j <= 30; j++) {
512 tx_cmd.op = TXCMD_SET_TX_PWR_TRACKING;
513 tx_cmd.length = 4;
514 tx_cmd.value = priv->pwr_track >> 24;
515 rtl92e_send_cmd_pkt(dev, DESC_PACKET_TYPE_NORMAL, (u8 *)&tx_cmd,
516 sizeof(struct dcmd_txcmd));
517 mdelay(1);
518 for (i = 0; i <= 30; i++) {
519 Pwr_Flag = rtl92e_readb(dev, Pw_Track_Flag);
520
521 if (Pwr_Flag == 0) {
522 mdelay(1);
523
524 if (priv->rtllib->rf_power_state != rf_on) {
525 rtl92e_writeb(dev, Pw_Track_Flag, 0);
526 rtl92e_writeb(dev, FW_Busy_Flag, 0);
527 return;
528 }
529
530 continue;
531 }
532
533 Avg_TSSI_Meas = rtl92e_readw(dev, Tssi_Mea_Value);
534
535 if (Avg_TSSI_Meas == 0) {
536 rtl92e_writeb(dev, Pw_Track_Flag, 0);
537 rtl92e_writeb(dev, FW_Busy_Flag, 0);
538 return;
539 }
540
541 for (k = 0; k < 5; k++) {
542 if (k != 4)
543 tmp_report[k] = rtl92e_readb(dev,
544 Tssi_Report_Value1 + k);
545 else
546 tmp_report[k] = rtl92e_readb(dev,
547 Tssi_Report_Value2);
548
549 if (tmp_report[k] <= 20) {
550 viviflag = true;
551 break;
552 }
553 }
554
555 if (viviflag) {
556 rtl92e_writeb(dev, Pw_Track_Flag, 0);
557 viviflag = false;
558 for (k = 0; k < 5; k++)
559 tmp_report[k] = 0;
560 break;
561 }
562
563 for (k = 0; k < 5; k++)
564 Avg_TSSI_Meas_from_driver += tmp_report[k];
565
566 Avg_TSSI_Meas_from_driver *= 100 / 5;
567 tssi_13dBm = priv->tssi_13dBm;
568
569 if (Avg_TSSI_Meas_from_driver > tssi_13dBm)
570 delta = Avg_TSSI_Meas_from_driver - tssi_13dBm;
571 else
572 delta = tssi_13dBm - Avg_TSSI_Meas_from_driver;
573
574 if (delta <= E_FOR_TX_POWER_TRACK) {
575 priv->rtllib->bdynamic_txpower_enable = true;
576 rtl92e_writeb(dev, Pw_Track_Flag, 0);
577 rtl92e_writeb(dev, FW_Busy_Flag, 0);
578 return;
579 }
580 if (Avg_TSSI_Meas_from_driver < tssi_13dBm - E_FOR_TX_POWER_TRACK)
581 _rtl92e_dm_tx_update_tssi_weak_signal(dev);
582 else
583 _rtl92e_dm_tx_update_tssi_strong_signal(dev);
584
585 priv->cck_present_attn_diff
586 = priv->rfa_txpowertrackingindex_real - priv->rfa_txpowertracking_default;
587
588 if (priv->current_chnl_bw == HT_CHANNEL_WIDTH_20)
589 priv->cck_present_attn =
590 priv->cck_present_attn_20m_def +
591 priv->cck_present_attn_diff;
592 else
593 priv->cck_present_attn =
594 priv->cck_present_attn_40m_def +
595 priv->cck_present_attn_diff;
596
597 if (priv->cck_present_attn > (CCK_TX_BB_GAIN_TABLE_LEN - 1))
598 priv->cck_present_attn = CCK_TX_BB_GAIN_TABLE_LEN - 1;
599 if (priv->cck_present_attn < 0)
600 priv->cck_present_attn = 0;
601
602 if (priv->cck_present_attn > -1 &&
603 priv->cck_present_attn < CCK_TX_BB_GAIN_TABLE_LEN) {
604 if (priv->rtllib->current_network.channel == 14 &&
605 !priv->bcck_in_ch14) {
606 priv->bcck_in_ch14 = true;
607 rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
608 } else if (priv->rtllib->current_network.channel != 14 && priv->bcck_in_ch14) {
609 priv->bcck_in_ch14 = false;
610 rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
611 } else {
612 rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
613 }
614 }
615
616 if (priv->cck_present_attn_diff <= -12 ||
617 priv->cck_present_attn_diff >= 24) {
618 priv->rtllib->bdynamic_txpower_enable = true;
619 rtl92e_writeb(dev, Pw_Track_Flag, 0);
620 rtl92e_writeb(dev, FW_Busy_Flag, 0);
621 return;
622 }
623
624 rtl92e_writeb(dev, Pw_Track_Flag, 0);
625 Avg_TSSI_Meas_from_driver = 0;
626 for (k = 0; k < 5; k++)
627 tmp_report[k] = 0;
628 break;
629 }
630 rtl92e_writeb(dev, FW_Busy_Flag, 0);
631 }
632 priv->rtllib->bdynamic_txpower_enable = true;
633 rtl92e_writeb(dev, Pw_Track_Flag, 0);
634 }
635
_rtl92e_dm_tx_power_tracking_cb_thermal(struct net_device * dev)636 static void _rtl92e_dm_tx_power_tracking_cb_thermal(struct net_device *dev)
637 {
638 #define ThermalMeterVal 9
639 struct r8192_priv *priv = rtllib_priv(dev);
640 u32 tmp_reg, tmp_cck;
641 u8 tmp_ofdm_index, tmp_cck_index, tmp_cck_20m_index, tmp_cck_40m_index, tmpval;
642 int i = 0, CCKSwingNeedUpdate = 0;
643
644 if (!priv->tx_pwr_tracking_init) {
645 tmp_reg = rtl92e_get_bb_reg(dev, rOFDM0_XATxIQImbalance,
646 bMaskDWord);
647 for (i = 0; i < OFDM_TABLE_LEN; i++) {
648 if (tmp_reg == OFDMSwingTable[i])
649 priv->ofdm_index[0] = i;
650 }
651
652 tmp_cck = rtl92e_get_bb_reg(dev, rCCK0_TxFilter1, bMaskByte2);
653 for (i = 0; i < CCK_TABLE_LEN; i++) {
654 if (tmp_cck == (u32)CCKSwingTable_Ch1_Ch13[i][0]) {
655 priv->cck_index = i;
656 break;
657 }
658 }
659 priv->tx_pwr_tracking_init = true;
660 return;
661 }
662
663 tmp_reg = rtl92e_get_rf_reg(dev, RF90_PATH_A, 0x12, 0x078);
664 if (tmp_reg < 3 || tmp_reg > 13)
665 return;
666 if (tmp_reg >= 12)
667 tmp_reg = 12;
668 priv->thermal_meter[0] = ThermalMeterVal;
669 priv->thermal_meter[1] = ThermalMeterVal;
670
671 if (priv->thermal_meter[0] >= (u8)tmp_reg) {
672 tmp_ofdm_index = 6 + (priv->thermal_meter[0] - (u8)tmp_reg);
673 tmp_cck_20m_index = tmp_ofdm_index;
674 tmp_cck_40m_index = tmp_cck_20m_index - 6;
675 if (tmp_ofdm_index >= OFDM_TABLE_LEN)
676 tmp_ofdm_index = OFDM_TABLE_LEN - 1;
677 if (tmp_cck_20m_index >= CCK_TABLE_LEN)
678 tmp_cck_20m_index = CCK_TABLE_LEN - 1;
679 if (tmp_cck_40m_index >= CCK_TABLE_LEN)
680 tmp_cck_40m_index = CCK_TABLE_LEN - 1;
681 } else {
682 tmpval = (u8)tmp_reg - priv->thermal_meter[0];
683 if (tmpval >= 6) {
684 tmp_ofdm_index = 0;
685 tmp_cck_20m_index = 0;
686 } else {
687 tmp_ofdm_index = 6 - tmpval;
688 tmp_cck_20m_index = 6 - tmpval;
689 }
690 tmp_cck_40m_index = 0;
691 }
692 if (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20)
693 tmp_cck_index = tmp_cck_40m_index;
694 else
695 tmp_cck_index = tmp_cck_20m_index;
696
697 priv->rec_cck_20m_idx = tmp_cck_20m_index;
698 priv->rec_cck_40m_idx = tmp_cck_40m_index;
699
700 if (priv->rtllib->current_network.channel == 14 &&
701 !priv->bcck_in_ch14) {
702 priv->bcck_in_ch14 = true;
703 CCKSwingNeedUpdate = 1;
704 } else if (priv->rtllib->current_network.channel != 14 &&
705 priv->bcck_in_ch14) {
706 priv->bcck_in_ch14 = false;
707 CCKSwingNeedUpdate = 1;
708 }
709
710 if (priv->cck_index != tmp_cck_index) {
711 priv->cck_index = tmp_cck_index;
712 CCKSwingNeedUpdate = 1;
713 }
714
715 if (CCKSwingNeedUpdate)
716 rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
717 if (priv->ofdm_index[0] != tmp_ofdm_index) {
718 priv->ofdm_index[0] = tmp_ofdm_index;
719 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance, bMaskDWord,
720 OFDMSwingTable[priv->ofdm_index[0]]);
721 }
722 priv->txpower_count = 0;
723 }
724
rtl92e_dm_txpower_tracking_wq(void * data)725 void rtl92e_dm_txpower_tracking_wq(void *data)
726 {
727 struct r8192_priv *priv = container_of_dwork_rsl(data,
728 struct r8192_priv, txpower_tracking_wq);
729 struct net_device *dev = priv->rtllib->dev;
730
731 if (priv->ic_cut >= IC_VersionCut_D)
732 _rtl92e_dm_tx_power_tracking_callback_tssi(dev);
733 else
734 _rtl92e_dm_tx_power_tracking_cb_thermal(dev);
735 }
736
_rtl92e_dm_initialize_tx_power_tracking_tssi(struct net_device * dev)737 static void _rtl92e_dm_initialize_tx_power_tracking_tssi(struct net_device *dev)
738 {
739 struct r8192_priv *priv = rtllib_priv(dev);
740
741 priv->btxpower_tracking = true;
742 priv->txpower_count = 0;
743 priv->tx_pwr_tracking_init = false;
744 }
745
_rtl92e_dm_init_tx_power_tracking_thermal(struct net_device * dev)746 static void _rtl92e_dm_init_tx_power_tracking_thermal(struct net_device *dev)
747 {
748 struct r8192_priv *priv = rtllib_priv(dev);
749
750 if (priv->rtllib->FwRWRF)
751 priv->btxpower_tracking = true;
752 else
753 priv->btxpower_tracking = false;
754 priv->txpower_count = 0;
755 priv->tx_pwr_tracking_init = false;
756 }
757
rtl92e_dm_init_txpower_tracking(struct net_device * dev)758 void rtl92e_dm_init_txpower_tracking(struct net_device *dev)
759 {
760 struct r8192_priv *priv = rtllib_priv(dev);
761
762 if (priv->ic_cut >= IC_VersionCut_D)
763 _rtl92e_dm_initialize_tx_power_tracking_tssi(dev);
764 else
765 _rtl92e_dm_init_tx_power_tracking_thermal(dev);
766 }
767
_rtl92e_dm_check_tx_power_tracking_tssi(struct net_device * dev)768 static void _rtl92e_dm_check_tx_power_tracking_tssi(struct net_device *dev)
769 {
770 struct r8192_priv *priv = rtllib_priv(dev);
771 static u32 tx_power_track_counter;
772
773 if (rtl92e_readb(dev, 0x11e) == 1)
774 return;
775 if (!priv->btxpower_tracking)
776 return;
777 tx_power_track_counter++;
778
779 if (tx_power_track_counter >= 180) {
780 schedule_delayed_work(&priv->txpower_tracking_wq, 0);
781 tx_power_track_counter = 0;
782 }
783 }
784
_rtl92e_dm_check_tx_power_tracking_thermal(struct net_device * dev)785 static void _rtl92e_dm_check_tx_power_tracking_thermal(struct net_device *dev)
786 {
787 struct r8192_priv *priv = rtllib_priv(dev);
788 static u8 TM_Trigger;
789 u8 TxPowerCheckCnt = 0;
790
791 TxPowerCheckCnt = 2;
792 if (!priv->btxpower_tracking)
793 return;
794
795 if (priv->txpower_count <= TxPowerCheckCnt) {
796 priv->txpower_count++;
797 return;
798 }
799
800 if (!TM_Trigger) {
801 rtl92e_set_rf_reg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
802 rtl92e_set_rf_reg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
803 rtl92e_set_rf_reg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
804 rtl92e_set_rf_reg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
805 TM_Trigger = 1;
806 return;
807 }
808 netdev_info(dev, "===============>Schedule TxPowerTrackingWorkItem\n");
809 schedule_delayed_work(&priv->txpower_tracking_wq, 0);
810 TM_Trigger = 0;
811 }
812
_rtl92e_dm_check_tx_power_tracking(struct net_device * dev)813 static void _rtl92e_dm_check_tx_power_tracking(struct net_device *dev)
814 {
815 struct r8192_priv *priv = rtllib_priv(dev);
816
817 if (priv->ic_cut >= IC_VersionCut_D)
818 _rtl92e_dm_check_tx_power_tracking_tssi(dev);
819 else
820 _rtl92e_dm_check_tx_power_tracking_thermal(dev);
821 }
822
_rtl92e_dm_cck_tx_power_adjust_tssi(struct net_device * dev,bool bInCH14)823 static void _rtl92e_dm_cck_tx_power_adjust_tssi(struct net_device *dev,
824 bool bInCH14)
825 {
826 u32 TempVal;
827 struct r8192_priv *priv = rtllib_priv(dev);
828 u8 attenuation = priv->cck_present_attn;
829
830 TempVal = 0;
831 if (!bInCH14) {
832 TempVal = (u32)(dm_cck_tx_bb_gain[attenuation][0] +
833 (dm_cck_tx_bb_gain[attenuation][1] << 8));
834
835 rtl92e_set_bb_reg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
836 TempVal = (u32)((dm_cck_tx_bb_gain[attenuation][2]) +
837 (dm_cck_tx_bb_gain[attenuation][3] << 8) +
838 (dm_cck_tx_bb_gain[attenuation][4] << 16) +
839 (dm_cck_tx_bb_gain[attenuation][5] << 24));
840 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
841 TempVal = (u32)(dm_cck_tx_bb_gain[attenuation][6] +
842 (dm_cck_tx_bb_gain[attenuation][7] << 8));
843
844 rtl92e_set_bb_reg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
845 } else {
846 TempVal = (u32)((dm_cck_tx_bb_gain_ch14[attenuation][0]) +
847 (dm_cck_tx_bb_gain_ch14[attenuation][1] << 8));
848
849 rtl92e_set_bb_reg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
850 TempVal = (u32)((dm_cck_tx_bb_gain_ch14[attenuation][2]) +
851 (dm_cck_tx_bb_gain_ch14[attenuation][3] << 8) +
852 (dm_cck_tx_bb_gain_ch14[attenuation][4] << 16) +
853 (dm_cck_tx_bb_gain_ch14[attenuation][5] << 24));
854 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
855 TempVal = (u32)((dm_cck_tx_bb_gain_ch14[attenuation][6]) +
856 (dm_cck_tx_bb_gain_ch14[attenuation][7] << 8));
857
858 rtl92e_set_bb_reg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
859 }
860 }
861
_rtl92e_dm_cck_tx_power_adjust_thermal_meter(struct net_device * dev,bool bInCH14)862 static void _rtl92e_dm_cck_tx_power_adjust_thermal_meter(struct net_device *dev,
863 bool bInCH14)
864 {
865 u32 TempVal;
866 struct r8192_priv *priv = rtllib_priv(dev);
867
868 TempVal = 0;
869 if (!bInCH14) {
870 TempVal = CCKSwingTable_Ch1_Ch13[priv->cck_index][0] +
871 (CCKSwingTable_Ch1_Ch13[priv->cck_index][1] << 8);
872 rtl92e_set_bb_reg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
873 TempVal = CCKSwingTable_Ch1_Ch13[priv->cck_index][2] +
874 (CCKSwingTable_Ch1_Ch13[priv->cck_index][3] << 8) +
875 (CCKSwingTable_Ch1_Ch13[priv->cck_index][4] << 16) +
876 (CCKSwingTable_Ch1_Ch13[priv->cck_index][5] << 24);
877 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
878 TempVal = CCKSwingTable_Ch1_Ch13[priv->cck_index][6] +
879 (CCKSwingTable_Ch1_Ch13[priv->cck_index][7] << 8);
880
881 rtl92e_set_bb_reg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
882 } else {
883 TempVal = CCKSwingTable_Ch14[priv->cck_index][0] +
884 (CCKSwingTable_Ch14[priv->cck_index][1] << 8);
885
886 rtl92e_set_bb_reg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
887 TempVal = CCKSwingTable_Ch14[priv->cck_index][2] +
888 (CCKSwingTable_Ch14[priv->cck_index][3] << 8) +
889 (CCKSwingTable_Ch14[priv->cck_index][4] << 16) +
890 (CCKSwingTable_Ch14[priv->cck_index][5] << 24);
891 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
892 TempVal = CCKSwingTable_Ch14[priv->cck_index][6] +
893 (CCKSwingTable_Ch14[priv->cck_index][7] << 8);
894
895 rtl92e_set_bb_reg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
896 }
897 }
898
rtl92e_dm_cck_txpower_adjust(struct net_device * dev,bool binch14)899 void rtl92e_dm_cck_txpower_adjust(struct net_device *dev, bool binch14)
900 {
901 struct r8192_priv *priv = rtllib_priv(dev);
902
903 if (priv->ic_cut >= IC_VersionCut_D)
904 _rtl92e_dm_cck_tx_power_adjust_tssi(dev, binch14);
905 else
906 _rtl92e_dm_cck_tx_power_adjust_thermal_meter(dev, binch14);
907 }
908
_rtl92e_dm_dig_init(struct net_device * dev)909 static void _rtl92e_dm_dig_init(struct net_device *dev)
910 {
911 struct r8192_priv *priv = rtllib_priv(dev);
912
913 dm_digtable.cur_sta_connect_state = DIG_STA_DISCONNECT;
914 dm_digtable.pre_sta_connect_state = DIG_STA_DISCONNECT;
915
916 dm_digtable.rssi_low_thresh = DM_DIG_THRESH_LOW;
917 dm_digtable.rssi_high_thresh = DM_DIG_THRESH_HIGH;
918
919 dm_digtable.rssi_high_power_lowthresh = DM_DIG_HIGH_PWR_THRESH_LOW;
920 dm_digtable.rssi_high_power_highthresh = DM_DIG_HIGH_PWR_THRESH_HIGH;
921
922 dm_digtable.rssi_val = 50;
923 dm_digtable.backoff_val = DM_DIG_BACKOFF;
924 dm_digtable.rx_gain_range_max = DM_DIG_MAX;
925 if (priv->customer_id == RT_CID_819X_NETCORE)
926 dm_digtable.rx_gain_range_min = DM_DIG_MIN_Netcore;
927 else
928 dm_digtable.rx_gain_range_min = DM_DIG_MIN;
929 }
930
931 /*-----------------------------------------------------------------------------
932 * Function: dm_CtrlInitGainBeforeConnectByRssiAndFalseAlarm()
933 *
934 * Overview: Driver monitor RSSI and False Alarm to change initial gain.
935 Only change initial gain during link in progress.
936 *
937 * Input: IN PADAPTER pAdapter
938 *
939 * Output: NONE
940 *
941 * Return: NONE
942 *
943 * Revised History:
944 * When Who Remark
945 * 03/04/2009 hpfan Create Version 0.
946 *
947 ******************************************************************************/
948
_rtl92e_dm_ctrl_initgain_byrssi(struct net_device * dev)949 static void _rtl92e_dm_ctrl_initgain_byrssi(struct net_device *dev)
950 {
951 struct r8192_priv *priv = rtllib_priv(dev);
952 u8 i;
953 static u8 fw_dig;
954
955 if (fw_dig <= 3) {
956 for (i = 0; i < 3; i++)
957 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8);
958 fw_dig++;
959 }
960
961 if (priv->rtllib->link_state == MAC80211_LINKED)
962 dm_digtable.cur_sta_connect_state = DIG_STA_CONNECT;
963 else
964 dm_digtable.cur_sta_connect_state = DIG_STA_DISCONNECT;
965
966 dm_digtable.rssi_val = priv->undecorated_smoothed_pwdb;
967 _rtl92e_dm_initial_gain(dev);
968 _rtl92e_dm_pd_th(dev);
969 _rtl92e_dm_cs_ratio(dev);
970 dm_digtable.pre_sta_connect_state = dm_digtable.cur_sta_connect_state;
971 }
972
_rtl92e_dm_initial_gain(struct net_device * dev)973 static void _rtl92e_dm_initial_gain(struct net_device *dev)
974 {
975 struct r8192_priv *priv = rtllib_priv(dev);
976 u8 initial_gain = 0;
977 static u8 initialized, force_write;
978
979 if (rtllib_act_scanning(priv->rtllib, true)) {
980 force_write = 1;
981 return;
982 }
983
984 if (dm_digtable.pre_sta_connect_state == dm_digtable.cur_sta_connect_state) {
985 if (dm_digtable.cur_sta_connect_state == DIG_STA_CONNECT) {
986 long gain_range = dm_digtable.rssi_val + 10 -
987 dm_digtable.backoff_val;
988 gain_range = clamp_t(long, gain_range,
989 dm_digtable.rx_gain_range_min,
990 dm_digtable.rx_gain_range_max);
991 dm_digtable.cur_ig_value = gain_range;
992 } else {
993 if (dm_digtable.cur_ig_value == 0)
994 dm_digtable.cur_ig_value = priv->def_initial_gain[0];
995 else
996 dm_digtable.cur_ig_value = dm_digtable.pre_ig_value;
997 }
998 } else {
999 dm_digtable.cur_ig_value = priv->def_initial_gain[0];
1000 dm_digtable.pre_ig_value = 0;
1001 }
1002
1003 if (dm_digtable.pre_ig_value != rtl92e_readb(dev, rOFDM0_XAAGCCore1))
1004 force_write = 1;
1005
1006 if ((dm_digtable.pre_ig_value != dm_digtable.cur_ig_value)
1007 || !initialized || force_write) {
1008 initial_gain = dm_digtable.cur_ig_value;
1009 rtl92e_writeb(dev, rOFDM0_XAAGCCore1, initial_gain);
1010 rtl92e_writeb(dev, rOFDM0_XBAGCCore1, initial_gain);
1011 rtl92e_writeb(dev, rOFDM0_XCAGCCore1, initial_gain);
1012 rtl92e_writeb(dev, rOFDM0_XDAGCCore1, initial_gain);
1013 dm_digtable.pre_ig_value = dm_digtable.cur_ig_value;
1014 initialized = 1;
1015 force_write = 0;
1016 }
1017 }
1018
_rtl92e_dm_pd_th(struct net_device * dev)1019 static void _rtl92e_dm_pd_th(struct net_device *dev)
1020 {
1021 struct r8192_priv *priv = rtllib_priv(dev);
1022 static u8 initialized, force_write;
1023
1024 if (dm_digtable.pre_sta_connect_state == dm_digtable.cur_sta_connect_state) {
1025 if (dm_digtable.cur_sta_connect_state == DIG_STA_CONNECT) {
1026 if (dm_digtable.rssi_val >=
1027 dm_digtable.rssi_high_power_highthresh)
1028 dm_digtable.curpd_thstate =
1029 DIG_PD_AT_HIGH_POWER;
1030 else if (dm_digtable.rssi_val <=
1031 dm_digtable.rssi_low_thresh)
1032 dm_digtable.curpd_thstate =
1033 DIG_PD_AT_LOW_POWER;
1034 else if ((dm_digtable.rssi_val >=
1035 dm_digtable.rssi_high_thresh) &&
1036 (dm_digtable.rssi_val <
1037 dm_digtable.rssi_high_power_lowthresh))
1038 dm_digtable.curpd_thstate =
1039 DIG_PD_AT_NORMAL_POWER;
1040 else
1041 dm_digtable.curpd_thstate =
1042 dm_digtable.prepd_thstate;
1043 } else {
1044 dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
1045 }
1046 } else {
1047 dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
1048 }
1049
1050 if ((dm_digtable.prepd_thstate != dm_digtable.curpd_thstate) ||
1051 (initialized <= 3) || force_write) {
1052 if (dm_digtable.curpd_thstate == DIG_PD_AT_LOW_POWER) {
1053 if (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20)
1054 rtl92e_writeb(dev, (rOFDM0_XATxAFE + 3), 0x00);
1055 else
1056 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x42);
1057 } else if (dm_digtable.curpd_thstate ==
1058 DIG_PD_AT_NORMAL_POWER) {
1059 if (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20)
1060 rtl92e_writeb(dev, (rOFDM0_XATxAFE + 3), 0x20);
1061 else
1062 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x44);
1063 } else if (dm_digtable.curpd_thstate == DIG_PD_AT_HIGH_POWER) {
1064 if (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20)
1065 rtl92e_writeb(dev, (rOFDM0_XATxAFE + 3), 0x10);
1066 else
1067 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x43);
1068 }
1069 dm_digtable.prepd_thstate = dm_digtable.curpd_thstate;
1070 if (initialized <= 3)
1071 initialized++;
1072 force_write = 0;
1073 }
1074 }
1075
_rtl92e_dm_cs_ratio(struct net_device * dev)1076 static void _rtl92e_dm_cs_ratio(struct net_device *dev)
1077 {
1078 static u8 initialized, force_write;
1079
1080 if (dm_digtable.pre_sta_connect_state == dm_digtable.cur_sta_connect_state) {
1081 if (dm_digtable.cur_sta_connect_state == DIG_STA_CONNECT) {
1082 if (dm_digtable.rssi_val <= dm_digtable.rssi_low_thresh)
1083 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
1084 else if (dm_digtable.rssi_val >= dm_digtable.rssi_high_thresh)
1085 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_HIGHER;
1086 else
1087 dm_digtable.curcs_ratio_state = dm_digtable.precs_ratio_state;
1088 } else {
1089 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
1090 }
1091 } else {
1092 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
1093 }
1094
1095 if ((dm_digtable.precs_ratio_state != dm_digtable.curcs_ratio_state) ||
1096 !initialized || force_write) {
1097 if (dm_digtable.curcs_ratio_state == DIG_CS_RATIO_LOWER)
1098 rtl92e_writeb(dev, 0xa0a, 0x08);
1099 else if (dm_digtable.curcs_ratio_state == DIG_CS_RATIO_HIGHER)
1100 rtl92e_writeb(dev, 0xa0a, 0xcd);
1101 dm_digtable.precs_ratio_state = dm_digtable.curcs_ratio_state;
1102 initialized = 1;
1103 force_write = 0;
1104 }
1105 }
1106
rtl92e_dm_init_edca_turbo(struct net_device * dev)1107 void rtl92e_dm_init_edca_turbo(struct net_device *dev)
1108 {
1109 struct r8192_priv *priv = rtllib_priv(dev);
1110
1111 priv->bcurrent_turbo_EDCA = false;
1112 priv->rtllib->bis_any_nonbepkts = false;
1113 priv->bis_cur_rdlstate = false;
1114 }
1115
_rtl92e_dm_check_edca_turbo(struct net_device * dev)1116 static void _rtl92e_dm_check_edca_turbo(struct net_device *dev)
1117 {
1118 struct r8192_priv *priv = rtllib_priv(dev);
1119 struct rt_hi_throughput *ht_info = priv->rtllib->ht_info;
1120
1121 static unsigned long lastTxOkCnt;
1122 static unsigned long lastRxOkCnt;
1123 unsigned long curTxOkCnt = 0;
1124 unsigned long curRxOkCnt = 0;
1125
1126 if (priv->rtllib->link_state != MAC80211_LINKED)
1127 goto dm_CheckEdcaTurbo_EXIT;
1128 if (priv->rtllib->ht_info->iot_action & HT_IOT_ACT_DISABLE_EDCA_TURBO)
1129 goto dm_CheckEdcaTurbo_EXIT;
1130
1131 if (!priv->rtllib->bis_any_nonbepkts) {
1132 curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
1133 curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
1134 if (ht_info->iot_action & HT_IOT_ACT_EDCA_BIAS_ON_RX) {
1135 if (curTxOkCnt > 4 * curRxOkCnt) {
1136 if (priv->bis_cur_rdlstate ||
1137 !priv->bcurrent_turbo_EDCA) {
1138 rtl92e_writel(dev, EDCAPARA_BE,
1139 edca_setting_UL[ht_info->iot_peer]);
1140 priv->bis_cur_rdlstate = false;
1141 }
1142 } else {
1143 if (!priv->bis_cur_rdlstate ||
1144 !priv->bcurrent_turbo_EDCA) {
1145 if (priv->rtllib->mode == WIRELESS_MODE_G)
1146 rtl92e_writel(dev, EDCAPARA_BE,
1147 edca_setting_DL_GMode[ht_info->iot_peer]);
1148 else
1149 rtl92e_writel(dev, EDCAPARA_BE,
1150 edca_setting_DL[ht_info->iot_peer]);
1151 priv->bis_cur_rdlstate = true;
1152 }
1153 }
1154 priv->bcurrent_turbo_EDCA = true;
1155 } else {
1156 if (curRxOkCnt > 4 * curTxOkCnt) {
1157 if (!priv->bis_cur_rdlstate ||
1158 !priv->bcurrent_turbo_EDCA) {
1159 if (priv->rtllib->mode == WIRELESS_MODE_G)
1160 rtl92e_writel(dev, EDCAPARA_BE,
1161 edca_setting_DL_GMode[ht_info->iot_peer]);
1162 else
1163 rtl92e_writel(dev, EDCAPARA_BE,
1164 edca_setting_DL[ht_info->iot_peer]);
1165 priv->bis_cur_rdlstate = true;
1166 }
1167 } else {
1168 if (priv->bis_cur_rdlstate ||
1169 !priv->bcurrent_turbo_EDCA) {
1170 rtl92e_writel(dev, EDCAPARA_BE,
1171 edca_setting_UL[ht_info->iot_peer]);
1172 priv->bis_cur_rdlstate = false;
1173 }
1174 }
1175
1176 priv->bcurrent_turbo_EDCA = true;
1177 }
1178 } else {
1179 if (priv->bcurrent_turbo_EDCA) {
1180 u8 tmp = AC0_BE;
1181
1182 priv->rtllib->set_hw_reg_handler(dev, HW_VAR_AC_PARAM,
1183 (u8 *)(&tmp));
1184 priv->bcurrent_turbo_EDCA = false;
1185 }
1186 }
1187
1188 dm_CheckEdcaTurbo_EXIT:
1189 priv->rtllib->bis_any_nonbepkts = false;
1190 lastTxOkCnt = priv->stats.txbytesunicast;
1191 lastRxOkCnt = priv->stats.rxbytesunicast;
1192 }
1193
_rtl92e_dm_init_cts_to_self(struct net_device * dev)1194 static void _rtl92e_dm_init_cts_to_self(struct net_device *dev)
1195 {
1196 struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
1197
1198 priv->rtllib->bCTSToSelfEnable = true;
1199 }
1200
_rtl92e_dm_cts_to_self(struct net_device * dev)1201 static void _rtl92e_dm_cts_to_self(struct net_device *dev)
1202 {
1203 struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
1204 struct rt_hi_throughput *ht_info = priv->rtllib->ht_info;
1205 static unsigned long lastTxOkCnt;
1206 static unsigned long lastRxOkCnt;
1207 unsigned long curTxOkCnt = 0;
1208 unsigned long curRxOkCnt = 0;
1209
1210 if (!priv->rtllib->bCTSToSelfEnable) {
1211 ht_info->iot_action &= ~HT_IOT_ACT_FORCED_CTS2SELF;
1212 return;
1213 }
1214 if (ht_info->iot_peer == HT_IOT_PEER_BROADCOM) {
1215 curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
1216 curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
1217 if (curRxOkCnt > 4 * curTxOkCnt)
1218 ht_info->iot_action &= ~HT_IOT_ACT_FORCED_CTS2SELF;
1219 else
1220 ht_info->iot_action |= HT_IOT_ACT_FORCED_CTS2SELF;
1221
1222 lastTxOkCnt = priv->stats.txbytesunicast;
1223 lastRxOkCnt = priv->stats.rxbytesunicast;
1224 }
1225 }
1226
_rtl92e_dm_check_rf_ctrl_gpio(void * data)1227 static void _rtl92e_dm_check_rf_ctrl_gpio(void *data)
1228 {
1229 struct r8192_priv *priv = container_of_dwork_rsl(data,
1230 struct r8192_priv, gpio_change_rf_wq);
1231 struct net_device *dev = priv->rtllib->dev;
1232 u8 tmp1byte;
1233 enum rt_rf_power_state rf_power_state_to_set;
1234 bool bActuallySet = false;
1235
1236 if ((priv->up_first_time == 1) || (priv->being_init_adapter))
1237 return;
1238
1239 if (priv->bfirst_after_down)
1240 return;
1241
1242 tmp1byte = rtl92e_readb(dev, GPI);
1243
1244 rf_power_state_to_set = (tmp1byte & BIT(1)) ? rf_on : rf_off;
1245
1246 if (priv->hw_radio_off && (rf_power_state_to_set == rf_on)) {
1247 netdev_info(dev, "gpiochangeRF - HW Radio ON\n");
1248 priv->hw_radio_off = false;
1249 bActuallySet = true;
1250 } else if (!priv->hw_radio_off && (rf_power_state_to_set == rf_off)) {
1251 netdev_info(dev, "gpiochangeRF - HW Radio OFF\n");
1252 priv->hw_radio_off = true;
1253 bActuallySet = true;
1254 }
1255
1256 if (bActuallySet) {
1257 mdelay(1000);
1258 priv->hw_rf_off_action = 1;
1259 rtl92e_set_rf_state(dev, rf_power_state_to_set, RF_CHANGE_BY_HW);
1260 }
1261 }
1262
rtl92e_dm_rf_pathcheck_wq(void * data)1263 void rtl92e_dm_rf_pathcheck_wq(void *data)
1264 {
1265 struct r8192_priv *priv = container_of_dwork_rsl(data,
1266 struct r8192_priv,
1267 rfpath_check_wq);
1268 struct net_device *dev = priv->rtllib->dev;
1269 u8 rfpath, i;
1270
1271 rfpath = rtl92e_readb(dev, 0xc04);
1272
1273 for (i = 0; i < RF90_PATH_MAX; i++) {
1274 if (rfpath & (0x01 << i))
1275 priv->brfpath_rxenable[i] = true;
1276 else
1277 priv->brfpath_rxenable[i] = false;
1278 }
1279 if (!dm_rx_path_sel_table.enable)
1280 return;
1281
1282 _rtl92e_dm_rx_path_sel_byrssi(dev);
1283 }
1284
_rtl92e_dm_init_rx_path_selection(struct net_device * dev)1285 static void _rtl92e_dm_init_rx_path_selection(struct net_device *dev)
1286 {
1287 u8 i;
1288 struct r8192_priv *priv = rtllib_priv(dev);
1289
1290 dm_rx_path_sel_table.enable = 1;
1291 dm_rx_path_sel_table.ss_th_low = RX_PATH_SEL_SS_TH_LOW;
1292 dm_rx_path_sel_table.diff_th = RX_PATH_SEL_DIFF_TH;
1293 if (priv->customer_id == RT_CID_819X_NETCORE)
1294 dm_rx_path_sel_table.cck_method = CCK_Rx_Version_2;
1295 else
1296 dm_rx_path_sel_table.cck_method = CCK_Rx_Version_1;
1297 dm_rx_path_sel_table.disabled_rf = 0;
1298 for (i = 0; i < 4; i++) {
1299 dm_rx_path_sel_table.rf_rssi[i] = 50;
1300 dm_rx_path_sel_table.cck_pwdb_sta[i] = -64;
1301 dm_rx_path_sel_table.rf_enable_rssi_th[i] = 100;
1302 }
1303 }
1304
1305 #define PWDB_IN_RANGE ((cur_cck_pwdb < tmp_cck_max_pwdb) && \
1306 (cur_cck_pwdb > tmp_cck_sec_pwdb))
1307
_rtl92e_dm_rx_path_sel_byrssi(struct net_device * dev)1308 static void _rtl92e_dm_rx_path_sel_byrssi(struct net_device *dev)
1309 {
1310 struct r8192_priv *priv = rtllib_priv(dev);
1311 u8 i, max_rssi_index = 0, min_rssi_index = 0;
1312 u8 sec_rssi_index = 0, rf_num = 0;
1313 u8 tmp_max_rssi = 0, tmp_min_rssi = 0, tmp_sec_rssi = 0;
1314 u8 cck_default_Rx = 0x2;
1315 u8 cck_optional_Rx = 0x3;
1316 long tmp_cck_max_pwdb = 0, tmp_cck_min_pwdb = 0, tmp_cck_sec_pwdb = 0;
1317 u8 cck_rx_ver2_max_index = 0;
1318 u8 cck_rx_ver2_sec_index = 0;
1319 u8 cur_rf_rssi;
1320 long cur_cck_pwdb;
1321 static u8 disabled_rf_cnt, cck_Rx_Path_initialized;
1322 u8 update_cck_rx_path;
1323
1324 if (!cck_Rx_Path_initialized) {
1325 dm_rx_path_sel_table.cck_rx_path = (rtl92e_readb(dev, 0xa07) & 0xf);
1326 cck_Rx_Path_initialized = 1;
1327 }
1328
1329 dm_rx_path_sel_table.disabled_rf = 0xf;
1330 dm_rx_path_sel_table.disabled_rf &= ~(rtl92e_readb(dev, 0xc04));
1331
1332 if (priv->rtllib->mode == WIRELESS_MODE_B)
1333 dm_rx_path_sel_table.cck_method = CCK_Rx_Version_2;
1334
1335 for (i = 0; i < RF90_PATH_MAX; i++) {
1336 dm_rx_path_sel_table.rf_rssi[i] = priv->stats.rx_rssi_percentage[i];
1337
1338 if (!priv->brfpath_rxenable[i])
1339 continue;
1340
1341 rf_num++;
1342 cur_rf_rssi = dm_rx_path_sel_table.rf_rssi[i];
1343
1344 if (rf_num == 1) {
1345 max_rssi_index = min_rssi_index = sec_rssi_index = i;
1346 tmp_max_rssi = tmp_min_rssi = tmp_sec_rssi = cur_rf_rssi;
1347 } else if (rf_num == 2) {
1348 if (cur_rf_rssi >= tmp_max_rssi) {
1349 tmp_max_rssi = cur_rf_rssi;
1350 max_rssi_index = i;
1351 } else {
1352 tmp_sec_rssi = tmp_min_rssi = cur_rf_rssi;
1353 sec_rssi_index = min_rssi_index = i;
1354 }
1355 } else {
1356 if (cur_rf_rssi > tmp_max_rssi) {
1357 tmp_sec_rssi = tmp_max_rssi;
1358 sec_rssi_index = max_rssi_index;
1359 tmp_max_rssi = cur_rf_rssi;
1360 max_rssi_index = i;
1361 } else if (cur_rf_rssi == tmp_max_rssi) {
1362 tmp_sec_rssi = cur_rf_rssi;
1363 sec_rssi_index = i;
1364 } else if ((cur_rf_rssi < tmp_max_rssi) &&
1365 (cur_rf_rssi > tmp_sec_rssi)) {
1366 tmp_sec_rssi = cur_rf_rssi;
1367 sec_rssi_index = i;
1368 } else if (cur_rf_rssi == tmp_sec_rssi) {
1369 if (tmp_sec_rssi == tmp_min_rssi) {
1370 tmp_sec_rssi = cur_rf_rssi;
1371 sec_rssi_index = i;
1372 }
1373 } else if ((cur_rf_rssi < tmp_sec_rssi) &&
1374 (cur_rf_rssi > tmp_min_rssi)) {
1375 ;
1376 } else if (cur_rf_rssi == tmp_min_rssi) {
1377 if (tmp_sec_rssi == tmp_min_rssi) {
1378 tmp_min_rssi = cur_rf_rssi;
1379 min_rssi_index = i;
1380 }
1381 } else if (cur_rf_rssi < tmp_min_rssi) {
1382 tmp_min_rssi = cur_rf_rssi;
1383 min_rssi_index = i;
1384 }
1385 }
1386 }
1387
1388 rf_num = 0;
1389 if (dm_rx_path_sel_table.cck_method == CCK_Rx_Version_2) {
1390 for (i = 0; i < RF90_PATH_MAX; i++) {
1391 if (!priv->brfpath_rxenable[i])
1392 continue;
1393
1394 rf_num++;
1395 cur_cck_pwdb = dm_rx_path_sel_table.cck_pwdb_sta[i];
1396
1397 if (rf_num == 1) {
1398 cck_rx_ver2_max_index = i;
1399 cck_rx_ver2_sec_index = i;
1400 tmp_cck_max_pwdb = cur_cck_pwdb;
1401 tmp_cck_min_pwdb = cur_cck_pwdb;
1402 tmp_cck_sec_pwdb = cur_cck_pwdb;
1403 } else if (rf_num == 2) {
1404 if (cur_cck_pwdb >= tmp_cck_max_pwdb) {
1405 tmp_cck_max_pwdb = cur_cck_pwdb;
1406 cck_rx_ver2_max_index = i;
1407 } else {
1408 tmp_cck_sec_pwdb = cur_cck_pwdb;
1409 tmp_cck_min_pwdb = cur_cck_pwdb;
1410 cck_rx_ver2_sec_index = i;
1411 }
1412 } else {
1413 if (cur_cck_pwdb > tmp_cck_max_pwdb) {
1414 tmp_cck_sec_pwdb = tmp_cck_max_pwdb;
1415 cck_rx_ver2_sec_index = cck_rx_ver2_max_index;
1416 tmp_cck_max_pwdb = cur_cck_pwdb;
1417 cck_rx_ver2_max_index = i;
1418 } else if (cur_cck_pwdb == tmp_cck_max_pwdb) {
1419 tmp_cck_sec_pwdb = cur_cck_pwdb;
1420 cck_rx_ver2_sec_index = i;
1421 } else if (PWDB_IN_RANGE) {
1422 tmp_cck_sec_pwdb = cur_cck_pwdb;
1423 cck_rx_ver2_sec_index = i;
1424 } else if (cur_cck_pwdb == tmp_cck_sec_pwdb) {
1425 if (tmp_cck_sec_pwdb == tmp_cck_min_pwdb) {
1426 tmp_cck_sec_pwdb = cur_cck_pwdb;
1427 cck_rx_ver2_sec_index = i;
1428 }
1429 } else if ((cur_cck_pwdb < tmp_cck_sec_pwdb) &&
1430 (cur_cck_pwdb > tmp_cck_min_pwdb)) {
1431 ;
1432 } else if (cur_cck_pwdb == tmp_cck_min_pwdb) {
1433 if (tmp_cck_sec_pwdb == tmp_cck_min_pwdb)
1434 tmp_cck_min_pwdb = cur_cck_pwdb;
1435 } else if (cur_cck_pwdb < tmp_cck_min_pwdb) {
1436 tmp_cck_min_pwdb = cur_cck_pwdb;
1437 }
1438 }
1439 }
1440 }
1441
1442 update_cck_rx_path = 0;
1443 if (dm_rx_path_sel_table.cck_method == CCK_Rx_Version_2) {
1444 cck_default_Rx = cck_rx_ver2_max_index;
1445 cck_optional_Rx = cck_rx_ver2_sec_index;
1446 if (tmp_cck_max_pwdb != -64)
1447 update_cck_rx_path = 1;
1448 }
1449
1450 if (tmp_min_rssi < dm_rx_path_sel_table.ss_th_low && disabled_rf_cnt < 2) {
1451 if ((tmp_max_rssi - tmp_min_rssi) >=
1452 dm_rx_path_sel_table.diff_th) {
1453 dm_rx_path_sel_table.rf_enable_rssi_th[min_rssi_index] =
1454 tmp_max_rssi + 5;
1455 rtl92e_set_bb_reg(dev, rOFDM0_TRxPathEnable,
1456 0x1 << min_rssi_index, 0x0);
1457 rtl92e_set_bb_reg(dev, rOFDM1_TRxPathEnable,
1458 0x1 << min_rssi_index, 0x0);
1459 disabled_rf_cnt++;
1460 }
1461 if (dm_rx_path_sel_table.cck_method == CCK_Rx_Version_1) {
1462 cck_default_Rx = max_rssi_index;
1463 cck_optional_Rx = sec_rssi_index;
1464 if (tmp_max_rssi)
1465 update_cck_rx_path = 1;
1466 }
1467 }
1468
1469 if (update_cck_rx_path) {
1470 dm_rx_path_sel_table.cck_rx_path = (cck_default_Rx << 2) |
1471 (cck_optional_Rx);
1472 rtl92e_set_bb_reg(dev, rCCK0_AFESetting, 0x0f000000,
1473 dm_rx_path_sel_table.cck_rx_path);
1474 }
1475
1476 if (dm_rx_path_sel_table.disabled_rf) {
1477 for (i = 0; i < 4; i++) {
1478 if ((dm_rx_path_sel_table.disabled_rf >> i) & 0x1) {
1479 if (tmp_max_rssi >=
1480 dm_rx_path_sel_table.rf_enable_rssi_th[i]) {
1481 rtl92e_set_bb_reg(dev,
1482 rOFDM0_TRxPathEnable,
1483 0x1 << i, 0x1);
1484 rtl92e_set_bb_reg(dev,
1485 rOFDM1_TRxPathEnable,
1486 0x1 << i, 0x1);
1487 dm_rx_path_sel_table.rf_enable_rssi_th[i] = 100;
1488 disabled_rf_cnt--;
1489 }
1490 }
1491 }
1492 }
1493 }
1494
_rtl92e_dm_check_rx_path_selection(struct net_device * dev)1495 static void _rtl92e_dm_check_rx_path_selection(struct net_device *dev)
1496 {
1497 struct r8192_priv *priv = rtllib_priv(dev);
1498
1499 schedule_delayed_work(&priv->rfpath_check_wq, 0);
1500 }
1501
_rtl92e_dm_init_fsync(struct net_device * dev)1502 static void _rtl92e_dm_init_fsync(struct net_device *dev)
1503 {
1504 struct r8192_priv *priv = rtllib_priv(dev);
1505
1506 priv->rtllib->fsync_time_interval = 500;
1507 priv->rtllib->fsync_rate_bitmap = 0x0f000800;
1508 priv->rtllib->fsync_rssi_threshold = 30;
1509 priv->rtllib->bfsync_enable = false;
1510 priv->rtllib->fsync_multiple_timeinterval = 3;
1511 priv->rtllib->fsync_firstdiff_ratethreshold = 100;
1512 priv->rtllib->fsync_seconddiff_ratethreshold = 200;
1513 priv->rtllib->fsync_state = DEFAULT_FSYNC;
1514
1515 timer_setup(&priv->fsync_timer, _rtl92e_dm_fsync_timer_callback, 0);
1516 }
1517
_rtl92e_dm_deinit_fsync(struct net_device * dev)1518 static void _rtl92e_dm_deinit_fsync(struct net_device *dev)
1519 {
1520 struct r8192_priv *priv = rtllib_priv(dev);
1521
1522 del_timer_sync(&priv->fsync_timer);
1523 }
1524
_rtl92e_dm_fsync_timer_callback(struct timer_list * t)1525 static void _rtl92e_dm_fsync_timer_callback(struct timer_list *t)
1526 {
1527 struct r8192_priv *priv = from_timer(priv, t, fsync_timer);
1528 struct net_device *dev = priv->rtllib->dev;
1529 u32 rate_index, rate_count = 0, rate_count_diff = 0;
1530 bool bSwitchFromCountDiff = false;
1531 bool bDoubleTimeInterval = false;
1532
1533 if (priv->rtllib->link_state == MAC80211_LINKED &&
1534 priv->rtllib->bfsync_enable &&
1535 (priv->rtllib->ht_info->iot_action & HT_IOT_ACT_CDD_FSYNC)) {
1536 u32 rate_bitmap;
1537
1538 for (rate_index = 0; rate_index <= 27; rate_index++) {
1539 rate_bitmap = 1 << rate_index;
1540 if (priv->rtllib->fsync_rate_bitmap & rate_bitmap)
1541 rate_count +=
1542 priv->stats.received_rate_histogram[1]
1543 [rate_index];
1544 }
1545
1546 if (rate_count < priv->rate_record)
1547 rate_count_diff = 0xffffffff - rate_count +
1548 priv->rate_record;
1549 else
1550 rate_count_diff = rate_count - priv->rate_record;
1551 if (rate_count_diff < priv->rate_count_diff_rec) {
1552 u32 DiffNum = priv->rate_count_diff_rec -
1553 rate_count_diff;
1554 if (DiffNum >=
1555 priv->rtllib->fsync_seconddiff_ratethreshold)
1556 priv->continue_diff_count++;
1557 else
1558 priv->continue_diff_count = 0;
1559
1560 if (priv->continue_diff_count >= 2) {
1561 bSwitchFromCountDiff = true;
1562 priv->continue_diff_count = 0;
1563 }
1564 } else {
1565 priv->continue_diff_count = 0;
1566 }
1567
1568 if (rate_count_diff <=
1569 priv->rtllib->fsync_firstdiff_ratethreshold) {
1570 bSwitchFromCountDiff = true;
1571 priv->continue_diff_count = 0;
1572 }
1573 priv->rate_record = rate_count;
1574 priv->rate_count_diff_rec = rate_count_diff;
1575 if (priv->undecorated_smoothed_pwdb >
1576 priv->rtllib->fsync_rssi_threshold &&
1577 bSwitchFromCountDiff) {
1578 bDoubleTimeInterval = true;
1579 priv->bswitch_fsync = !priv->bswitch_fsync;
1580 if (priv->bswitch_fsync) {
1581 rtl92e_writeb(dev, 0xC36, 0x1c);
1582 rtl92e_writeb(dev, 0xC3e, 0x90);
1583 } else {
1584 rtl92e_writeb(dev, 0xC36, 0x5c);
1585 rtl92e_writeb(dev, 0xC3e, 0x96);
1586 }
1587 } else if (priv->undecorated_smoothed_pwdb <=
1588 priv->rtllib->fsync_rssi_threshold) {
1589 if (priv->bswitch_fsync) {
1590 priv->bswitch_fsync = false;
1591 rtl92e_writeb(dev, 0xC36, 0x5c);
1592 rtl92e_writeb(dev, 0xC3e, 0x96);
1593 }
1594 }
1595 if (bDoubleTimeInterval) {
1596 if (timer_pending(&priv->fsync_timer))
1597 del_timer_sync(&priv->fsync_timer);
1598 priv->fsync_timer.expires = jiffies +
1599 msecs_to_jiffies(priv->rtllib->fsync_time_interval *
1600 priv->rtllib->fsync_multiple_timeinterval);
1601 add_timer(&priv->fsync_timer);
1602 } else {
1603 if (timer_pending(&priv->fsync_timer))
1604 del_timer_sync(&priv->fsync_timer);
1605 priv->fsync_timer.expires = jiffies +
1606 msecs_to_jiffies(priv->rtllib->fsync_time_interval);
1607 add_timer(&priv->fsync_timer);
1608 }
1609 } else {
1610 if (priv->bswitch_fsync) {
1611 priv->bswitch_fsync = false;
1612 rtl92e_writeb(dev, 0xC36, 0x5c);
1613 rtl92e_writeb(dev, 0xC3e, 0x96);
1614 }
1615 priv->continue_diff_count = 0;
1616 rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c52cd);
1617 }
1618 }
1619
_rtl92e_dm_start_hw_fsync(struct net_device * dev)1620 static void _rtl92e_dm_start_hw_fsync(struct net_device *dev)
1621 {
1622 u8 rf_timing = 0x77;
1623 struct r8192_priv *priv = rtllib_priv(dev);
1624
1625 rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c12cf);
1626 priv->rtllib->set_hw_reg_handler(dev, HW_VAR_RF_TIMING,
1627 (u8 *)(&rf_timing));
1628 rtl92e_writeb(dev, 0xc3b, 0x41);
1629 }
1630
_rtl92e_dm_end_hw_fsync(struct net_device * dev)1631 static void _rtl92e_dm_end_hw_fsync(struct net_device *dev)
1632 {
1633 u8 rf_timing = 0xaa;
1634 struct r8192_priv *priv = rtllib_priv(dev);
1635
1636 rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c52cd);
1637 priv->rtllib->set_hw_reg_handler(dev, HW_VAR_RF_TIMING, (u8 *)
1638 (&rf_timing));
1639 rtl92e_writeb(dev, 0xc3b, 0x49);
1640 }
1641
_rtl92e_dm_end_sw_fsync(struct net_device * dev)1642 static void _rtl92e_dm_end_sw_fsync(struct net_device *dev)
1643 {
1644 struct r8192_priv *priv = rtllib_priv(dev);
1645
1646 del_timer_sync(&(priv->fsync_timer));
1647
1648 if (priv->bswitch_fsync) {
1649 priv->bswitch_fsync = false;
1650
1651 rtl92e_writeb(dev, 0xC36, 0x5c);
1652
1653 rtl92e_writeb(dev, 0xC3e, 0x96);
1654 }
1655
1656 priv->continue_diff_count = 0;
1657 rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c52cd);
1658 }
1659
_rtl92e_dm_start_sw_fsync(struct net_device * dev)1660 static void _rtl92e_dm_start_sw_fsync(struct net_device *dev)
1661 {
1662 struct r8192_priv *priv = rtllib_priv(dev);
1663 u32 rate_index;
1664 u32 rate_bitmap;
1665
1666 priv->rate_record = 0;
1667 priv->continue_diff_count = 0;
1668 priv->rate_count_diff_rec = 0;
1669 priv->bswitch_fsync = false;
1670
1671 if (priv->rtllib->mode == WIRELESS_MODE_N_24G) {
1672 priv->rtllib->fsync_firstdiff_ratethreshold = 600;
1673 priv->rtllib->fsync_seconddiff_ratethreshold = 0xffff;
1674 } else {
1675 priv->rtllib->fsync_firstdiff_ratethreshold = 200;
1676 priv->rtllib->fsync_seconddiff_ratethreshold = 200;
1677 }
1678 for (rate_index = 0; rate_index <= 27; rate_index++) {
1679 rate_bitmap = 1 << rate_index;
1680 if (priv->rtllib->fsync_rate_bitmap & rate_bitmap)
1681 priv->rate_record +=
1682 priv->stats.received_rate_histogram[1]
1683 [rate_index];
1684 }
1685 if (timer_pending(&priv->fsync_timer))
1686 del_timer_sync(&priv->fsync_timer);
1687 priv->fsync_timer.expires = jiffies +
1688 msecs_to_jiffies(priv->rtllib->fsync_time_interval);
1689 add_timer(&priv->fsync_timer);
1690
1691 rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c12cd);
1692 }
1693
_rtl92e_dm_check_fsync(struct net_device * dev)1694 static void _rtl92e_dm_check_fsync(struct net_device *dev)
1695 {
1696 #define RegC38_Default 0
1697 #define RegC38_NonFsync_Other_AP 1
1698 #define RegC38_Fsync_AP_BCM 2
1699 struct r8192_priv *priv = rtllib_priv(dev);
1700 static u8 reg_c38_State = RegC38_Default;
1701
1702 if (priv->rtllib->link_state == MAC80211_LINKED &&
1703 priv->rtllib->ht_info->iot_peer == HT_IOT_PEER_BROADCOM) {
1704 if (priv->rtllib->bfsync_enable == 0) {
1705 switch (priv->rtllib->fsync_state) {
1706 case DEFAULT_FSYNC:
1707 _rtl92e_dm_start_hw_fsync(dev);
1708 priv->rtllib->fsync_state = HW_FSYNC;
1709 break;
1710 case SW_FSYNC:
1711 _rtl92e_dm_end_sw_fsync(dev);
1712 _rtl92e_dm_start_hw_fsync(dev);
1713 priv->rtllib->fsync_state = HW_FSYNC;
1714 break;
1715 default:
1716 break;
1717 }
1718 } else {
1719 switch (priv->rtllib->fsync_state) {
1720 case DEFAULT_FSYNC:
1721 _rtl92e_dm_start_sw_fsync(dev);
1722 priv->rtllib->fsync_state = SW_FSYNC;
1723 break;
1724 case HW_FSYNC:
1725 _rtl92e_dm_end_hw_fsync(dev);
1726 _rtl92e_dm_start_sw_fsync(dev);
1727 priv->rtllib->fsync_state = SW_FSYNC;
1728 break;
1729 default:
1730 break;
1731 }
1732 }
1733 if (reg_c38_State != RegC38_Fsync_AP_BCM) {
1734 rtl92e_writeb(dev, rOFDM0_RxDetector3, 0x95);
1735
1736 reg_c38_State = RegC38_Fsync_AP_BCM;
1737 }
1738 } else {
1739 switch (priv->rtllib->fsync_state) {
1740 case HW_FSYNC:
1741 _rtl92e_dm_end_hw_fsync(dev);
1742 priv->rtllib->fsync_state = DEFAULT_FSYNC;
1743 break;
1744 case SW_FSYNC:
1745 _rtl92e_dm_end_sw_fsync(dev);
1746 priv->rtllib->fsync_state = DEFAULT_FSYNC;
1747 break;
1748 default:
1749 break;
1750 }
1751
1752 if (priv->rtllib->link_state == MAC80211_LINKED) {
1753 if (priv->undecorated_smoothed_pwdb <=
1754 REG_C38_TH) {
1755 if (reg_c38_State !=
1756 RegC38_NonFsync_Other_AP) {
1757 rtl92e_writeb(dev,
1758 rOFDM0_RxDetector3,
1759 0x90);
1760
1761 reg_c38_State =
1762 RegC38_NonFsync_Other_AP;
1763 }
1764 } else if (priv->undecorated_smoothed_pwdb >=
1765 (REG_C38_TH + 5)) {
1766 if (reg_c38_State) {
1767 rtl92e_writeb(dev,
1768 rOFDM0_RxDetector3,
1769 priv->framesync);
1770 reg_c38_State = RegC38_Default;
1771 }
1772 }
1773 } else {
1774 if (reg_c38_State) {
1775 rtl92e_writeb(dev, rOFDM0_RxDetector3,
1776 priv->framesync);
1777 reg_c38_State = RegC38_Default;
1778 }
1779 }
1780 }
1781 }
1782
1783 /*---------------------------Define function prototype------------------------*/
_rtl92e_dm_init_dynamic_tx_power(struct net_device * dev)1784 static void _rtl92e_dm_init_dynamic_tx_power(struct net_device *dev)
1785 {
1786 struct r8192_priv *priv = rtllib_priv(dev);
1787
1788 priv->rtllib->bdynamic_txpower_enable = true;
1789 priv->last_dtp_flag_high = false;
1790 priv->last_dtp_flag_low = false;
1791 priv->dynamic_tx_high_pwr = false;
1792 priv->dynamic_tx_low_pwr = false;
1793 }
1794
_rtl92e_dm_dynamic_tx_power(struct net_device * dev)1795 static void _rtl92e_dm_dynamic_tx_power(struct net_device *dev)
1796 {
1797 struct r8192_priv *priv = rtllib_priv(dev);
1798 unsigned int txhipower_threshold = 0;
1799 unsigned int txlowpower_threshold = 0;
1800
1801 if (!priv->rtllib->bdynamic_txpower_enable) {
1802 priv->dynamic_tx_high_pwr = false;
1803 priv->dynamic_tx_low_pwr = false;
1804 return;
1805 }
1806 if ((priv->rtllib->ht_info->iot_peer == HT_IOT_PEER_ATHEROS) &&
1807 (priv->rtllib->mode == WIRELESS_MODE_G)) {
1808 txhipower_threshold = TX_POWER_ATHEROAP_THRESH_HIGH;
1809 txlowpower_threshold = TX_POWER_ATHEROAP_THRESH_LOW;
1810 } else {
1811 txhipower_threshold = TX_POWER_NEAR_FIELD_THRESH_HIGH;
1812 txlowpower_threshold = TX_POWER_NEAR_FIELD_THRESH_LOW;
1813 }
1814
1815 if (priv->rtllib->link_state == MAC80211_LINKED) {
1816 if (priv->undecorated_smoothed_pwdb >= txhipower_threshold) {
1817 priv->dynamic_tx_high_pwr = true;
1818 priv->dynamic_tx_low_pwr = false;
1819 } else {
1820 if (priv->undecorated_smoothed_pwdb <
1821 txlowpower_threshold && priv->dynamic_tx_high_pwr)
1822 priv->dynamic_tx_high_pwr = false;
1823 if (priv->undecorated_smoothed_pwdb < 35)
1824 priv->dynamic_tx_low_pwr = true;
1825 else if (priv->undecorated_smoothed_pwdb >= 40)
1826 priv->dynamic_tx_low_pwr = false;
1827 }
1828 } else {
1829 priv->dynamic_tx_high_pwr = false;
1830 priv->dynamic_tx_low_pwr = false;
1831 }
1832
1833 if ((priv->dynamic_tx_high_pwr != priv->last_dtp_flag_high) ||
1834 (priv->dynamic_tx_low_pwr != priv->last_dtp_flag_low)) {
1835 rtl92e_set_tx_power(dev, priv->rtllib->current_network.channel);
1836 }
1837 priv->last_dtp_flag_high = priv->dynamic_tx_high_pwr;
1838 priv->last_dtp_flag_low = priv->dynamic_tx_low_pwr;
1839 }
1840
_rtl92e_dm_check_txrateandretrycount(struct net_device * dev)1841 static void _rtl92e_dm_check_txrateandretrycount(struct net_device *dev)
1842 {
1843 struct r8192_priv *priv = rtllib_priv(dev);
1844 struct rtllib_device *ieee = priv->rtllib;
1845
1846 ieee->softmac_stats.CurrentShowTxate = rtl92e_readb(dev, CURRENT_TX_RATE_REG);
1847 ieee->softmac_stats.last_packet_rate = rtl92e_readb(dev, INITIAL_TX_RATE_REG);
1848 ieee->softmac_stats.txretrycount = rtl92e_readl(dev, TX_RETRY_COUNT_REG);
1849 }
1850
_rtl92e_dm_send_rssi_to_fw(struct net_device * dev)1851 static void _rtl92e_dm_send_rssi_to_fw(struct net_device *dev)
1852 {
1853 struct r8192_priv *priv = rtllib_priv(dev);
1854
1855 rtl92e_writeb(dev, DRIVER_RSSI, priv->undecorated_smoothed_pwdb);
1856 }
1857