1  /* SPDX-License-Identifier: GPL-2.0-only */
2  /*
3   *  linux/include/linux/mmc/card.h
4   *
5   *  Card driver specific definitions.
6   */
7  #ifndef LINUX_MMC_CARD_H
8  #define LINUX_MMC_CARD_H
9  
10  #include <linux/device.h>
11  #include <linux/mod_devicetable.h>
12  
13  struct mmc_cid {
14  	unsigned int		manfid;
15  	char			prod_name[8];
16  	unsigned char		prv;
17  	unsigned int		serial;
18  	unsigned short		oemid;
19  	unsigned short		year;
20  	unsigned char		hwrev;
21  	unsigned char		fwrev;
22  	unsigned char		month;
23  };
24  
25  struct mmc_csd {
26  	unsigned char		structure;
27  	unsigned char		mmca_vsn;
28  	unsigned short		cmdclass;
29  	unsigned short		taac_clks;
30  	unsigned int		taac_ns;
31  	unsigned int		c_size;
32  	unsigned int		r2w_factor;
33  	unsigned int		max_dtr;
34  	unsigned int		erase_size;		/* In sectors */
35  	unsigned int		wp_grp_size;
36  	unsigned int		read_blkbits;
37  	unsigned int		write_blkbits;
38  	unsigned int		capacity;
39  	unsigned int		read_partial:1,
40  				read_misalign:1,
41  				write_partial:1,
42  				write_misalign:1,
43  				dsr_imp:1;
44  };
45  
46  struct mmc_ext_csd {
47  	u8			rev;
48  	u8			erase_group_def;
49  	u8			sec_feature_support;
50  	u8			rel_sectors;
51  	u8			rel_param;
52  	bool			enhanced_rpmb_supported;
53  	u8			part_config;
54  	u8			cache_ctrl;
55  	u8			rst_n_function;
56  	unsigned int		part_time;		/* Units: ms */
57  	unsigned int		sa_timeout;		/* Units: 100ns */
58  	unsigned int		generic_cmd6_time;	/* Units: 10ms */
59  	unsigned int            power_off_longtime;     /* Units: ms */
60  	u8			power_off_notification;	/* state */
61  	unsigned int		hs_max_dtr;
62  	unsigned int		hs200_max_dtr;
63  #define MMC_HIGH_26_MAX_DTR	26000000
64  #define MMC_HIGH_52_MAX_DTR	52000000
65  #define MMC_HIGH_DDR_MAX_DTR	52000000
66  #define MMC_HS200_MAX_DTR	200000000
67  	unsigned int		sectors;
68  	unsigned int		hc_erase_size;		/* In sectors */
69  	unsigned int		hc_erase_timeout;	/* In milliseconds */
70  	unsigned int		sec_trim_mult;	/* Secure trim multiplier  */
71  	unsigned int		sec_erase_mult;	/* Secure erase multiplier */
72  	unsigned int		trim_timeout;		/* In milliseconds */
73  	bool			partition_setting_completed;	/* enable bit */
74  	unsigned long long	enhanced_area_offset;	/* Units: Byte */
75  	unsigned int		enhanced_area_size;	/* Units: KB */
76  	unsigned int		cache_size;		/* Units: KB */
77  	bool			hpi_en;			/* HPI enablebit */
78  	bool			hpi;			/* HPI support bit */
79  	unsigned int		hpi_cmd;		/* cmd used as HPI */
80  	bool			bkops;		/* background support bit */
81  	bool			man_bkops_en;	/* manual bkops enable bit */
82  	bool			auto_bkops_en;	/* auto bkops enable bit */
83  	unsigned int            data_sector_size;       /* 512 bytes or 4KB */
84  	unsigned int            data_tag_unit_size;     /* DATA TAG UNIT size */
85  	unsigned int		boot_ro_lock;		/* ro lock support */
86  	bool			boot_ro_lockable;
87  	bool			ffu_capable;	/* Firmware upgrade support */
88  	bool			cmdq_en;	/* Command Queue enabled */
89  	bool			cmdq_support;	/* Command Queue supported */
90  	unsigned int		cmdq_depth;	/* Command Queue depth */
91  #define MMC_FIRMWARE_LEN 8
92  	u8			fwrev[MMC_FIRMWARE_LEN];  /* FW version */
93  	u8			raw_exception_status;	/* 54 */
94  	u8			raw_partition_support;	/* 160 */
95  	u8			raw_rpmb_size_mult;	/* 168 */
96  	u8			raw_erased_mem_count;	/* 181 */
97  	u8			strobe_support;		/* 184 */
98  	u8			raw_ext_csd_structure;	/* 194 */
99  	u8			raw_card_type;		/* 196 */
100  	u8			raw_driver_strength;	/* 197 */
101  	u8			out_of_int_time;	/* 198 */
102  	u8			raw_pwr_cl_52_195;	/* 200 */
103  	u8			raw_pwr_cl_26_195;	/* 201 */
104  	u8			raw_pwr_cl_52_360;	/* 202 */
105  	u8			raw_pwr_cl_26_360;	/* 203 */
106  	u8			raw_s_a_timeout;	/* 217 */
107  	u8			raw_hc_erase_gap_size;	/* 221 */
108  	u8			raw_erase_timeout_mult;	/* 223 */
109  	u8			raw_hc_erase_grp_size;	/* 224 */
110  	u8			raw_boot_mult;		/* 226 */
111  	u8			raw_sec_trim_mult;	/* 229 */
112  	u8			raw_sec_erase_mult;	/* 230 */
113  	u8			raw_sec_feature_support;/* 231 */
114  	u8			raw_trim_mult;		/* 232 */
115  	u8			raw_pwr_cl_200_195;	/* 236 */
116  	u8			raw_pwr_cl_200_360;	/* 237 */
117  	u8			raw_pwr_cl_ddr_52_195;	/* 238 */
118  	u8			raw_pwr_cl_ddr_52_360;	/* 239 */
119  	u8			raw_pwr_cl_ddr_200_360;	/* 253 */
120  	u8			raw_bkops_status;	/* 246 */
121  	u8			raw_sectors[4];		/* 212 - 4 bytes */
122  	u8			pre_eol_info;		/* 267 */
123  	u8			device_life_time_est_typ_a;	/* 268 */
124  	u8			device_life_time_est_typ_b;	/* 269 */
125  
126  	unsigned int            feature_support;
127  #define MMC_DISCARD_FEATURE	BIT(0)                  /* CMD38 feature */
128  };
129  
130  struct sd_scr {
131  	unsigned char		sda_vsn;
132  	unsigned char		sda_spec3;
133  	unsigned char		sda_spec4;
134  	unsigned char		sda_specx;
135  	unsigned char		bus_widths;
136  #define SD_SCR_BUS_WIDTH_1	(1<<0)
137  #define SD_SCR_BUS_WIDTH_4	(1<<2)
138  	unsigned char		cmds;
139  #define SD_SCR_CMD20_SUPPORT   (1<<0)
140  #define SD_SCR_CMD23_SUPPORT   (1<<1)
141  #define SD_SCR_CMD48_SUPPORT   (1<<2)
142  #define SD_SCR_CMD58_SUPPORT   (1<<3)
143  };
144  
145  struct sd_ssr {
146  	unsigned int		au;			/* In sectors */
147  	unsigned int		erase_timeout;		/* In milliseconds */
148  	unsigned int		erase_offset;		/* In milliseconds */
149  };
150  
151  struct sd_switch_caps {
152  	unsigned int		hs_max_dtr;
153  	unsigned int		uhs_max_dtr;
154  #define HIGH_SPEED_MAX_DTR	50000000
155  #define UHS_SDR104_MAX_DTR	208000000
156  #define UHS_SDR50_MAX_DTR	100000000
157  #define UHS_DDR50_MAX_DTR	50000000
158  #define UHS_SDR25_MAX_DTR	UHS_DDR50_MAX_DTR
159  #define UHS_SDR12_MAX_DTR	25000000
160  #define DEFAULT_SPEED_MAX_DTR	UHS_SDR12_MAX_DTR
161  	unsigned int		sd3_bus_mode;
162  #define UHS_SDR12_BUS_SPEED	0
163  #define HIGH_SPEED_BUS_SPEED	1
164  #define UHS_SDR25_BUS_SPEED	1
165  #define UHS_SDR50_BUS_SPEED	2
166  #define UHS_SDR104_BUS_SPEED	3
167  #define UHS_DDR50_BUS_SPEED	4
168  
169  #define SD_MODE_HIGH_SPEED	(1 << HIGH_SPEED_BUS_SPEED)
170  #define SD_MODE_UHS_SDR12	(1 << UHS_SDR12_BUS_SPEED)
171  #define SD_MODE_UHS_SDR25	(1 << UHS_SDR25_BUS_SPEED)
172  #define SD_MODE_UHS_SDR50	(1 << UHS_SDR50_BUS_SPEED)
173  #define SD_MODE_UHS_SDR104	(1 << UHS_SDR104_BUS_SPEED)
174  #define SD_MODE_UHS_DDR50	(1 << UHS_DDR50_BUS_SPEED)
175  	unsigned int		sd3_drv_type;
176  #define SD_DRIVER_TYPE_B	0x01
177  #define SD_DRIVER_TYPE_A	0x02
178  #define SD_DRIVER_TYPE_C	0x04
179  #define SD_DRIVER_TYPE_D	0x08
180  	unsigned int		sd3_curr_limit;
181  #define SD_SET_CURRENT_LIMIT_200	0
182  #define SD_SET_CURRENT_LIMIT_400	1
183  #define SD_SET_CURRENT_LIMIT_600	2
184  #define SD_SET_CURRENT_LIMIT_800	3
185  #define SD_SET_CURRENT_NO_CHANGE	(-1)
186  
187  #define SD_MAX_CURRENT_200	(1 << SD_SET_CURRENT_LIMIT_200)
188  #define SD_MAX_CURRENT_400	(1 << SD_SET_CURRENT_LIMIT_400)
189  #define SD_MAX_CURRENT_600	(1 << SD_SET_CURRENT_LIMIT_600)
190  #define SD_MAX_CURRENT_800	(1 << SD_SET_CURRENT_LIMIT_800)
191  };
192  
193  struct sd_ext_reg {
194  	u8			fno;
195  	u8			page;
196  	u16			offset;
197  	u8			rev;
198  	u8			feature_enabled;
199  	u8			feature_support;
200  /* Power Management Function. */
201  #define SD_EXT_POWER_OFF_NOTIFY	(1<<0)
202  #define SD_EXT_POWER_SUSTENANCE	(1<<1)
203  #define SD_EXT_POWER_DOWN_MODE	(1<<2)
204  /* Performance Enhancement Function. */
205  #define SD_EXT_PERF_FX_EVENT	(1<<0)
206  #define SD_EXT_PERF_CARD_MAINT	(1<<1)
207  #define SD_EXT_PERF_HOST_MAINT	(1<<2)
208  #define SD_EXT_PERF_CACHE	(1<<3)
209  #define SD_EXT_PERF_CMD_QUEUE	(1<<4)
210  };
211  
212  struct sdio_cccr {
213  	unsigned int		sdio_vsn;
214  	unsigned int		sd_vsn;
215  	unsigned int		multi_block:1,
216  				low_speed:1,
217  				wide_bus:1,
218  				high_power:1,
219  				high_speed:1,
220  				disable_cd:1,
221  				enable_async_irq:1;
222  };
223  
224  struct sdio_cis {
225  	unsigned short		vendor;
226  	unsigned short		device;
227  	unsigned short		blksize;
228  	unsigned int		max_dtr;
229  };
230  
231  struct mmc_host;
232  struct sdio_func;
233  struct sdio_func_tuple;
234  struct mmc_queue_req;
235  
236  #define SDIO_MAX_FUNCS		7
237  
238  /* The number of MMC physical partitions.  These consist of:
239   * boot partitions (2), general purpose partitions (4) and
240   * RPMB partition (1) in MMC v4.4.
241   */
242  #define MMC_NUM_BOOT_PARTITION	2
243  #define MMC_NUM_GP_PARTITION	4
244  #define MMC_NUM_PHY_PARTITION	7
245  #define MAX_MMC_PART_NAME_LEN	20
246  
247  /*
248   * MMC Physical partitions
249   */
250  struct mmc_part {
251  	u64		size;	/* partition size (in bytes) */
252  	unsigned int	part_cfg;	/* partition type */
253  	char	name[MAX_MMC_PART_NAME_LEN];
254  	bool	force_ro;	/* to make boot parts RO by default */
255  	unsigned int	area_type;
256  #define MMC_BLK_DATA_AREA_MAIN	(1<<0)
257  #define MMC_BLK_DATA_AREA_BOOT	(1<<1)
258  #define MMC_BLK_DATA_AREA_GP	(1<<2)
259  #define MMC_BLK_DATA_AREA_RPMB	(1<<3)
260  };
261  
262  /*
263   * MMC device
264   */
265  struct mmc_card {
266  	struct mmc_host		*host;		/* the host this device belongs to */
267  	struct device		dev;		/* the device */
268  	u32			ocr;		/* the current OCR setting */
269  	unsigned int		rca;		/* relative card address of device */
270  	unsigned int		type;		/* card type */
271  #define MMC_TYPE_MMC		0		/* MMC card */
272  #define MMC_TYPE_SD		1		/* SD card */
273  #define MMC_TYPE_SDIO		2		/* SDIO card */
274  #define MMC_TYPE_SD_COMBO	3		/* SD combo (IO+mem) card */
275  	unsigned int		state;		/* (our) card state */
276  	unsigned int		quirks; 	/* card quirks */
277  	unsigned int		quirk_max_rate;	/* max rate set by quirks */
278  #define MMC_QUIRK_LENIENT_FN0	(1<<0)		/* allow SDIO FN0 writes outside of the VS CCCR range */
279  #define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1)	/* use func->cur_blksize */
280  						/* for byte mode */
281  #define MMC_QUIRK_NONSTD_SDIO	(1<<2)		/* non-standard SDIO card attached */
282  						/* (missing CIA registers) */
283  #define MMC_QUIRK_NONSTD_FUNC_IF (1<<4)		/* SDIO card has nonstd function interfaces */
284  #define MMC_QUIRK_DISABLE_CD	(1<<5)		/* disconnect CD/DAT[3] resistor */
285  #define MMC_QUIRK_INAND_CMD38	(1<<6)		/* iNAND devices have broken CMD38 */
286  #define MMC_QUIRK_BLK_NO_CMD23	(1<<7)		/* Avoid CMD23 for regular multiblock */
287  #define MMC_QUIRK_BROKEN_BYTE_MODE_512 (1<<8)	/* Avoid sending 512 bytes in */
288  						/* byte mode */
289  #define MMC_QUIRK_LONG_READ_TIME (1<<9)		/* Data read time > CSD says */
290  #define MMC_QUIRK_SEC_ERASE_TRIM_BROKEN (1<<10)	/* Skip secure for erase/trim */
291  #define MMC_QUIRK_BROKEN_IRQ_POLLING	(1<<11)	/* Polling SDIO_CCCR_INTx could create a fake interrupt */
292  #define MMC_QUIRK_TRIM_BROKEN	(1<<12)		/* Skip trim */
293  #define MMC_QUIRK_BROKEN_HPI	(1<<13)		/* Disable broken HPI support */
294  #define MMC_QUIRK_BROKEN_SD_DISCARD	(1<<14)	/* Disable broken SD discard support */
295  #define MMC_QUIRK_BROKEN_SD_CACHE	(1<<15)	/* Disable broken SD cache support */
296  #define MMC_QUIRK_BROKEN_CACHE_FLUSH	(1<<16)	/* Don't flush cache until the write has occurred */
297  
298  	bool			written_flag;	/* Indicates eMMC has been written since power on */
299  	bool			reenable_cmdq;	/* Re-enable Command Queue */
300  
301  	unsigned int		erase_size;	/* erase size in sectors */
302   	unsigned int		erase_shift;	/* if erase unit is power 2 */
303   	unsigned int		pref_erase;	/* in sectors */
304  	unsigned int		eg_boundary;	/* don't cross erase-group boundaries */
305  	unsigned int		erase_arg;	/* erase / trim / discard */
306   	u8			erased_byte;	/* value of erased bytes */
307  	unsigned int		wp_grp_size;	/* write group size in sectors */
308  
309  	u32			raw_cid[4];	/* raw card CID */
310  	u32			raw_csd[4];	/* raw card CSD */
311  	u32			raw_scr[2];	/* raw card SCR */
312  	u32			raw_ssr[16];	/* raw card SSR */
313  	struct mmc_cid		cid;		/* card identification */
314  	struct mmc_csd		csd;		/* card specific */
315  	struct mmc_ext_csd	ext_csd;	/* mmc v4 extended card specific */
316  	struct sd_scr		scr;		/* extra SD information */
317  	struct sd_ssr		ssr;		/* yet more SD information */
318  	struct sd_switch_caps	sw_caps;	/* switch (CMD6) caps */
319  	struct sd_ext_reg	ext_power;	/* SD extension reg for PM */
320  	struct sd_ext_reg	ext_perf;	/* SD extension reg for PERF */
321  
322  	unsigned int		sdio_funcs;	/* number of SDIO functions */
323  	atomic_t		sdio_funcs_probed; /* number of probed SDIO funcs */
324  	struct sdio_cccr	cccr;		/* common card info */
325  	struct sdio_cis		cis;		/* common tuple info */
326  	struct sdio_func	*sdio_func[SDIO_MAX_FUNCS]; /* SDIO functions (devices) */
327  	struct sdio_func	*sdio_single_irq; /* SDIO function when only one IRQ active */
328  	u8			major_rev;	/* major revision number */
329  	u8			minor_rev;	/* minor revision number */
330  	unsigned		num_info;	/* number of info strings */
331  	const char		**info;		/* info strings */
332  	struct sdio_func_tuple	*tuples;	/* unknown common tuples */
333  
334  	unsigned int		sd_bus_speed;	/* Bus Speed Mode set for the card */
335  	unsigned int		mmc_avail_type;	/* supported device type by both host and card */
336  	unsigned int		drive_strength;	/* for UHS-I, HS200 or HS400 */
337  
338  	struct dentry		*debugfs_root;
339  	struct mmc_part	part[MMC_NUM_PHY_PARTITION]; /* physical partitions */
340  	unsigned int    nr_parts;
341  
342  	struct workqueue_struct *complete_wq;	/* Private workqueue */
343  };
344  
mmc_large_sector(struct mmc_card * card)345  static inline bool mmc_large_sector(struct mmc_card *card)
346  {
347  	return card->ext_csd.data_sector_size == 4096;
348  }
349  
mmc_card_enable_async_irq(struct mmc_card * card)350  static inline int mmc_card_enable_async_irq(struct mmc_card *card)
351  {
352  	return card->cccr.enable_async_irq;
353  }
354  
355  bool mmc_card_is_blockaddr(struct mmc_card *card);
356  
357  #define mmc_card_mmc(c)		((c)->type == MMC_TYPE_MMC)
358  #define mmc_card_sd(c)		((c)->type == MMC_TYPE_SD)
359  #define mmc_card_sdio(c)	((c)->type == MMC_TYPE_SDIO)
360  #define mmc_card_sd_combo(c)	((c)->type == MMC_TYPE_SD_COMBO)
361  
362  #endif /* LINUX_MMC_CARD_H */
363