1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2014 The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef __MDP5_CFG_H__ 7 #define __MDP5_CFG_H__ 8 9 #include "msm_drv.h" 10 11 /* 12 * mdp5_cfg 13 * 14 * This module configures the dynamic offsets used by mdp5.xml.h 15 * (initialized in mdp5_cfg.c) 16 */ 17 extern const struct mdp5_cfg_hw *mdp5_cfg; 18 19 #define MAX_CTL 8 20 #define MAX_BASES 8 21 #define MAX_SMP_BLOCKS 44 22 #define MAX_CLIENTS 32 23 24 typedef DECLARE_BITMAP(mdp5_smp_state_t, MAX_SMP_BLOCKS); 25 26 #define MDP5_SUB_BLOCK_DEFINITION \ 27 unsigned int count; \ 28 uint32_t base[MAX_BASES] 29 30 struct mdp5_sub_block { 31 MDP5_SUB_BLOCK_DEFINITION; 32 }; 33 34 struct mdp5_lm_instance { 35 int id; 36 int pp; 37 int dspp; 38 uint32_t caps; 39 }; 40 41 struct mdp5_lm_block { 42 MDP5_SUB_BLOCK_DEFINITION; 43 struct mdp5_lm_instance instances[MAX_BASES]; 44 uint32_t nb_stages; /* number of stages per blender */ 45 uint32_t max_width; /* Maximum output resolution */ 46 uint32_t max_height; 47 }; 48 49 struct mdp5_pipe_block { 50 MDP5_SUB_BLOCK_DEFINITION; 51 uint32_t caps; /* pipe capabilities */ 52 }; 53 54 struct mdp5_ctl_block { 55 MDP5_SUB_BLOCK_DEFINITION; 56 uint32_t flush_hw_mask; /* FLUSH register's hardware mask */ 57 }; 58 59 struct mdp5_smp_block { 60 int mmb_count; /* number of SMP MMBs */ 61 int mmb_size; /* MMB: size in bytes */ 62 uint32_t clients[MAX_CLIENTS]; /* SMP port allocation /pipe */ 63 mdp5_smp_state_t reserved_state;/* SMP MMBs statically allocated */ 64 uint8_t reserved[MAX_CLIENTS]; /* # of MMBs allocated per client */ 65 }; 66 67 struct mdp5_mdp_block { 68 MDP5_SUB_BLOCK_DEFINITION; 69 uint32_t caps; /* MDP capabilities: MDP_CAP_xxx bits */ 70 }; 71 72 struct mdp5_wb_instance { 73 int id; 74 int lm; 75 }; 76 77 struct mdp5_wb_block { 78 MDP5_SUB_BLOCK_DEFINITION; 79 struct mdp5_wb_instance instances[MAX_BASES]; 80 }; 81 82 #define MDP5_INTF_NUM_MAX 5 83 84 struct mdp5_intf_block { 85 uint32_t base[MAX_BASES]; 86 u32 connect[MDP5_INTF_NUM_MAX]; /* array of enum mdp5_intf_type */ 87 }; 88 89 struct mdp5_perf_block { 90 u32 ab_inefficiency; 91 u32 ib_inefficiency; 92 u32 clk_inefficiency; 93 }; 94 95 struct mdp5_cfg_hw { 96 char *name; 97 98 struct mdp5_mdp_block mdp; 99 struct mdp5_smp_block smp; 100 struct mdp5_ctl_block ctl; 101 struct mdp5_pipe_block pipe_vig; 102 struct mdp5_pipe_block pipe_rgb; 103 struct mdp5_pipe_block pipe_dma; 104 struct mdp5_pipe_block pipe_cursor; 105 struct mdp5_lm_block lm; 106 struct mdp5_sub_block dspp; 107 struct mdp5_sub_block ad; 108 struct mdp5_sub_block pp; 109 struct mdp5_sub_block dsc; 110 struct mdp5_sub_block cdm; 111 struct mdp5_wb_block wb; 112 struct mdp5_intf_block intf; 113 struct mdp5_perf_block perf; 114 115 uint32_t max_clk; 116 }; 117 118 struct mdp5_cfg { 119 const struct mdp5_cfg_hw *hw; 120 }; 121 122 struct mdp5_kms; 123 struct mdp5_cfg_handler; 124 125 const struct mdp5_cfg_hw *mdp5_cfg_get_hw_config(struct mdp5_cfg_handler *cfg_hnd); 126 struct mdp5_cfg *mdp5_cfg_get_config(struct mdp5_cfg_handler *cfg_hnd); 127 int mdp5_cfg_get_hw_rev(struct mdp5_cfg_handler *cfg_hnd); 128 129 #define mdp5_cfg_intf_is_virtual(intf_type) ({ \ 130 typeof(intf_type) __val = (intf_type); \ 131 (__val) >= INTF_VIRTUAL ? true : false; }) 132 133 struct mdp5_cfg_handler *mdp5_cfg_init(struct mdp5_kms *mdp5_kms, 134 uint32_t major, uint32_t minor); 135 136 #endif /* __MDP5_CFG_H__ */ 137