1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2012 ARM Ltd. 4 */ 5 #ifndef __CLKSOURCE_ARM_ARCH_TIMER_H 6 #define __CLKSOURCE_ARM_ARCH_TIMER_H 7 8 #include <linux/bitops.h> 9 #include <linux/timecounter.h> 10 #include <linux/types.h> 11 12 #define ARCH_TIMER_TYPE_CP15 BIT(0) 13 #define ARCH_TIMER_TYPE_MEM BIT(1) 14 15 #define ARCH_TIMER_CTRL_ENABLE (1 << 0) 16 #define ARCH_TIMER_CTRL_IT_MASK (1 << 1) 17 #define ARCH_TIMER_CTRL_IT_STAT (1 << 2) 18 19 #define CNTHCTL_EL1PCTEN (1 << 0) 20 #define CNTHCTL_EL1PCEN (1 << 1) 21 #define CNTHCTL_EVNTEN (1 << 2) 22 #define CNTHCTL_EVNTDIR (1 << 3) 23 #define CNTHCTL_EVNTI (0xF << 4) 24 #define CNTHCTL_ECV (1 << 12) 25 26 enum arch_timer_reg { 27 ARCH_TIMER_REG_CTRL, 28 ARCH_TIMER_REG_CVAL, 29 }; 30 31 enum arch_timer_ppi_nr { 32 ARCH_TIMER_PHYS_SECURE_PPI, 33 ARCH_TIMER_PHYS_NONSECURE_PPI, 34 ARCH_TIMER_VIRT_PPI, 35 ARCH_TIMER_HYP_PPI, 36 ARCH_TIMER_HYP_VIRT_PPI, 37 ARCH_TIMER_MAX_TIMER_PPI 38 }; 39 40 enum arch_timer_spi_nr { 41 ARCH_TIMER_PHYS_SPI, 42 ARCH_TIMER_VIRT_SPI, 43 ARCH_TIMER_MAX_TIMER_SPI 44 }; 45 46 #define ARCH_TIMER_PHYS_ACCESS 0 47 #define ARCH_TIMER_VIRT_ACCESS 1 48 #define ARCH_TIMER_MEM_PHYS_ACCESS 2 49 #define ARCH_TIMER_MEM_VIRT_ACCESS 3 50 51 #define ARCH_TIMER_MEM_MAX_FRAMES 8 52 53 #define ARCH_TIMER_USR_PCT_ACCESS_EN (1 << 0) /* physical counter */ 54 #define ARCH_TIMER_USR_VCT_ACCESS_EN (1 << 1) /* virtual counter */ 55 #define ARCH_TIMER_VIRT_EVT_EN (1 << 2) 56 #define ARCH_TIMER_EVT_TRIGGER_SHIFT (4) 57 #define ARCH_TIMER_EVT_TRIGGER_MASK (0xF << ARCH_TIMER_EVT_TRIGGER_SHIFT) 58 #define ARCH_TIMER_USR_VT_ACCESS_EN (1 << 8) /* virtual timer registers */ 59 #define ARCH_TIMER_USR_PT_ACCESS_EN (1 << 9) /* physical timer registers */ 60 #define ARCH_TIMER_EVT_INTERVAL_SCALE (1 << 17) /* EVNTIS in the ARMv8 ARM */ 61 62 #define ARCH_TIMER_EVT_STREAM_PERIOD_US 100 63 #define ARCH_TIMER_EVT_STREAM_FREQ \ 64 (USEC_PER_SEC / ARCH_TIMER_EVT_STREAM_PERIOD_US) 65 66 struct arch_timer_kvm_info { 67 struct timecounter timecounter; 68 int virtual_irq; 69 int physical_irq; 70 }; 71 72 struct arch_timer_mem_frame { 73 bool valid; 74 phys_addr_t cntbase; 75 size_t size; 76 int phys_irq; 77 int virt_irq; 78 }; 79 80 struct arch_timer_mem { 81 phys_addr_t cntctlbase; 82 size_t size; 83 struct arch_timer_mem_frame frame[ARCH_TIMER_MEM_MAX_FRAMES]; 84 }; 85 86 #ifdef CONFIG_ARM_ARCH_TIMER 87 88 extern u32 arch_timer_get_rate(void); 89 extern u64 (*arch_timer_read_counter)(void); 90 extern struct arch_timer_kvm_info *arch_timer_get_kvm_info(void); 91 extern bool arch_timer_evtstrm_available(void); 92 93 #else 94 arch_timer_get_rate(void)95 static inline u32 arch_timer_get_rate(void) 96 { 97 return 0; 98 } 99 arch_timer_read_counter(void)100 static inline u64 arch_timer_read_counter(void) 101 { 102 return 0; 103 } 104 arch_timer_evtstrm_available(void)105 static inline bool arch_timer_evtstrm_available(void) 106 { 107 return false; 108 } 109 110 #endif 111 112 #endif 113