1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * phylink models the MAC to optional PHY connection, supporting
4  * technologies such as SFP cages where the PHY is hot-pluggable.
5  *
6  * Copyright (C) 2015 Russell King
7  */
8 #include <linux/acpi.h>
9 #include <linux/ethtool.h>
10 #include <linux/export.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/netdevice.h>
13 #include <linux/of.h>
14 #include <linux/of_mdio.h>
15 #include <linux/phy.h>
16 #include <linux/phy_fixed.h>
17 #include <linux/phylink.h>
18 #include <linux/rtnetlink.h>
19 #include <linux/spinlock.h>
20 #include <linux/timer.h>
21 #include <linux/workqueue.h>
22 
23 #include "sfp.h"
24 #include "swphy.h"
25 
26 #define SUPPORTED_INTERFACES \
27 	(SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
28 	 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
29 #define ADVERTISED_INTERFACES \
30 	(ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
31 	 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
32 
33 enum {
34 	PHYLINK_DISABLE_STOPPED,
35 	PHYLINK_DISABLE_LINK,
36 	PHYLINK_DISABLE_MAC_WOL,
37 
38 	PCS_STATE_DOWN = 0,
39 	PCS_STATE_STARTING,
40 	PCS_STATE_STARTED,
41 };
42 
43 /**
44  * struct phylink - internal data type for phylink
45  */
46 struct phylink {
47 	/* private: */
48 	struct net_device *netdev;
49 	const struct phylink_mac_ops *mac_ops;
50 	struct phylink_config *config;
51 	struct phylink_pcs *pcs;
52 	struct device *dev;
53 	unsigned int old_link_state:1;
54 
55 	unsigned long phylink_disable_state; /* bitmask of disables */
56 	struct phy_device *phydev;
57 	phy_interface_t link_interface;	/* PHY_INTERFACE_xxx */
58 	u8 cfg_link_an_mode;		/* MLO_AN_xxx */
59 	u8 cur_link_an_mode;
60 	u8 link_port;			/* The current non-phy ethtool port */
61 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
62 
63 	/* The link configuration settings */
64 	struct phylink_link_state link_config;
65 
66 	/* The current settings */
67 	phy_interface_t cur_interface;
68 
69 	struct gpio_desc *link_gpio;
70 	unsigned int link_irq;
71 	struct timer_list link_poll;
72 	void (*get_fixed_state)(struct net_device *dev,
73 				struct phylink_link_state *s);
74 
75 	struct mutex state_mutex;
76 	struct phylink_link_state phy_state;
77 	struct work_struct resolve;
78 	unsigned int pcs_neg_mode;
79 	unsigned int pcs_state;
80 
81 	bool link_failed;
82 	bool using_mac_select_pcs;
83 
84 	struct sfp_bus *sfp_bus;
85 	bool sfp_may_have_phy;
86 	DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
87 	__ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
88 	u8 sfp_port;
89 };
90 
91 #define phylink_printk(level, pl, fmt, ...) \
92 	do { \
93 		if ((pl)->config->type == PHYLINK_NETDEV) \
94 			netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
95 		else if ((pl)->config->type == PHYLINK_DEV) \
96 			dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
97 	} while (0)
98 
99 #define phylink_err(pl, fmt, ...) \
100 	phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
101 #define phylink_warn(pl, fmt, ...) \
102 	phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
103 #define phylink_info(pl, fmt, ...) \
104 	phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
105 #if defined(CONFIG_DYNAMIC_DEBUG)
106 #define phylink_dbg(pl, fmt, ...) \
107 do {									\
108 	if ((pl)->config->type == PHYLINK_NETDEV)			\
109 		netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__);		\
110 	else if ((pl)->config->type == PHYLINK_DEV)			\
111 		dev_dbg((pl)->dev, fmt, ##__VA_ARGS__);			\
112 } while (0)
113 #elif defined(DEBUG)
114 #define phylink_dbg(pl, fmt, ...)					\
115 	phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
116 #else
117 #define phylink_dbg(pl, fmt, ...)					\
118 ({									\
119 	if (0)								\
120 		phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__);	\
121 })
122 #endif
123 
124 static const phy_interface_t phylink_sfp_interface_preference[] = {
125 	PHY_INTERFACE_MODE_25GBASER,
126 	PHY_INTERFACE_MODE_USXGMII,
127 	PHY_INTERFACE_MODE_10GBASER,
128 	PHY_INTERFACE_MODE_5GBASER,
129 	PHY_INTERFACE_MODE_2500BASEX,
130 	PHY_INTERFACE_MODE_SGMII,
131 	PHY_INTERFACE_MODE_1000BASEX,
132 	PHY_INTERFACE_MODE_100BASEX,
133 };
134 
135 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
136 
137 /**
138  * phylink_set_port_modes() - set the port type modes in the ethtool mask
139  * @mask: ethtool link mode mask
140  *
141  * Sets all the port type modes in the ethtool mask.  MAC drivers should
142  * use this in their 'validate' callback.
143  */
phylink_set_port_modes(unsigned long * mask)144 void phylink_set_port_modes(unsigned long *mask)
145 {
146 	phylink_set(mask, TP);
147 	phylink_set(mask, AUI);
148 	phylink_set(mask, MII);
149 	phylink_set(mask, FIBRE);
150 	phylink_set(mask, BNC);
151 	phylink_set(mask, Backplane);
152 }
153 EXPORT_SYMBOL_GPL(phylink_set_port_modes);
154 
phylink_is_empty_linkmode(const unsigned long * linkmode)155 static int phylink_is_empty_linkmode(const unsigned long *linkmode)
156 {
157 	__ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
158 
159 	phylink_set_port_modes(tmp);
160 	phylink_set(tmp, Autoneg);
161 	phylink_set(tmp, Pause);
162 	phylink_set(tmp, Asym_Pause);
163 
164 	return linkmode_subset(linkmode, tmp);
165 }
166 
phylink_an_mode_str(unsigned int mode)167 static const char *phylink_an_mode_str(unsigned int mode)
168 {
169 	static const char *modestr[] = {
170 		[MLO_AN_PHY] = "phy",
171 		[MLO_AN_FIXED] = "fixed",
172 		[MLO_AN_INBAND] = "inband",
173 	};
174 
175 	return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
176 }
177 
phylink_interface_signal_rate(phy_interface_t interface)178 static unsigned int phylink_interface_signal_rate(phy_interface_t interface)
179 {
180 	switch (interface) {
181 	case PHY_INTERFACE_MODE_SGMII:
182 	case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */
183 		return 1250;
184 	case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */
185 		return 3125;
186 	case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */
187 		return 5156;
188 	case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */
189 		return 10313;
190 	default:
191 		return 0;
192 	}
193 }
194 
195 /**
196  * phylink_interface_max_speed() - get the maximum speed of a phy interface
197  * @interface: phy interface mode defined by &typedef phy_interface_t
198  *
199  * Determine the maximum speed of a phy interface. This is intended to help
200  * determine the correct speed to pass to the MAC when the phy is performing
201  * rate matching.
202  *
203  * Return: The maximum speed of @interface
204  */
phylink_interface_max_speed(phy_interface_t interface)205 static int phylink_interface_max_speed(phy_interface_t interface)
206 {
207 	switch (interface) {
208 	case PHY_INTERFACE_MODE_100BASEX:
209 	case PHY_INTERFACE_MODE_REVRMII:
210 	case PHY_INTERFACE_MODE_RMII:
211 	case PHY_INTERFACE_MODE_SMII:
212 	case PHY_INTERFACE_MODE_REVMII:
213 	case PHY_INTERFACE_MODE_MII:
214 		return SPEED_100;
215 
216 	case PHY_INTERFACE_MODE_TBI:
217 	case PHY_INTERFACE_MODE_MOCA:
218 	case PHY_INTERFACE_MODE_RTBI:
219 	case PHY_INTERFACE_MODE_1000BASEX:
220 	case PHY_INTERFACE_MODE_1000BASEKX:
221 	case PHY_INTERFACE_MODE_TRGMII:
222 	case PHY_INTERFACE_MODE_RGMII_TXID:
223 	case PHY_INTERFACE_MODE_RGMII_RXID:
224 	case PHY_INTERFACE_MODE_RGMII_ID:
225 	case PHY_INTERFACE_MODE_RGMII:
226 	case PHY_INTERFACE_MODE_PSGMII:
227 	case PHY_INTERFACE_MODE_QSGMII:
228 	case PHY_INTERFACE_MODE_QUSGMII:
229 	case PHY_INTERFACE_MODE_SGMII:
230 	case PHY_INTERFACE_MODE_GMII:
231 		return SPEED_1000;
232 
233 	case PHY_INTERFACE_MODE_2500BASEX:
234 	case PHY_INTERFACE_MODE_10G_QXGMII:
235 		return SPEED_2500;
236 
237 	case PHY_INTERFACE_MODE_5GBASER:
238 		return SPEED_5000;
239 
240 	case PHY_INTERFACE_MODE_XGMII:
241 	case PHY_INTERFACE_MODE_RXAUI:
242 	case PHY_INTERFACE_MODE_XAUI:
243 	case PHY_INTERFACE_MODE_10GBASER:
244 	case PHY_INTERFACE_MODE_10GKR:
245 	case PHY_INTERFACE_MODE_USXGMII:
246 		return SPEED_10000;
247 
248 	case PHY_INTERFACE_MODE_25GBASER:
249 		return SPEED_25000;
250 
251 	case PHY_INTERFACE_MODE_XLGMII:
252 		return SPEED_40000;
253 
254 	case PHY_INTERFACE_MODE_INTERNAL:
255 	case PHY_INTERFACE_MODE_NA:
256 	case PHY_INTERFACE_MODE_MAX:
257 		/* No idea! Garbage in, unknown out */
258 		return SPEED_UNKNOWN;
259 	}
260 
261 	/* If we get here, someone forgot to add an interface mode above */
262 	WARN_ON_ONCE(1);
263 	return SPEED_UNKNOWN;
264 }
265 
266 /**
267  * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
268  * @linkmodes: ethtool linkmode mask (must be already initialised)
269  * @caps: bitmask of MAC capabilities
270  *
271  * Set all possible pause, speed and duplex linkmodes in @linkmodes that are
272  * supported by the @caps. @linkmodes must have been initialised previously.
273  */
phylink_caps_to_linkmodes(unsigned long * linkmodes,unsigned long caps)274 static void phylink_caps_to_linkmodes(unsigned long *linkmodes,
275 				      unsigned long caps)
276 {
277 	if (caps & MAC_SYM_PAUSE)
278 		__set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
279 
280 	if (caps & MAC_ASYM_PAUSE)
281 		__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
282 
283 	if (caps & MAC_10HD) {
284 		__set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
285 		__set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes);
286 		__set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes);
287 	}
288 
289 	if (caps & MAC_10FD) {
290 		__set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
291 		__set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes);
292 		__set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes);
293 	}
294 
295 	if (caps & MAC_100HD) {
296 		__set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
297 		__set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
298 	}
299 
300 	if (caps & MAC_100FD) {
301 		__set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
302 		__set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
303 		__set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
304 	}
305 
306 	if (caps & MAC_1000HD)
307 		__set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
308 
309 	if (caps & MAC_1000FD) {
310 		__set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
311 		__set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes);
312 		__set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
313 		__set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
314 	}
315 
316 	if (caps & MAC_2500FD) {
317 		__set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
318 		__set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
319 	}
320 
321 	if (caps & MAC_5000FD)
322 		__set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
323 
324 	if (caps & MAC_10000FD) {
325 		__set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
326 		__set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
327 		__set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
328 		__set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
329 		__set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
330 		__set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
331 		__set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
332 		__set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
333 		__set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
334 	}
335 
336 	if (caps & MAC_25000FD) {
337 		__set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
338 		__set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
339 		__set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
340 	}
341 
342 	if (caps & MAC_40000FD) {
343 		__set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
344 		__set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
345 		__set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
346 		__set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
347 	}
348 
349 	if (caps & MAC_50000FD) {
350 		__set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
351 		__set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
352 		__set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
353 		__set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
354 		__set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
355 		__set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
356 		__set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
357 			  linkmodes);
358 		__set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
359 	}
360 
361 	if (caps & MAC_56000FD) {
362 		__set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
363 		__set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
364 		__set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
365 		__set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
366 	}
367 
368 	if (caps & MAC_100000FD) {
369 		__set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
370 		__set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
371 		__set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
372 		__set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
373 			  linkmodes);
374 		__set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
375 		__set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
376 		__set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
377 		__set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
378 			  linkmodes);
379 		__set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
380 		__set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
381 		__set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
382 		__set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
383 			  linkmodes);
384 		__set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
385 		__set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
386 	}
387 
388 	if (caps & MAC_200000FD) {
389 		__set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
390 		__set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
391 		__set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
392 			  linkmodes);
393 		__set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
394 		__set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
395 		__set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
396 		__set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
397 		__set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
398 			  linkmodes);
399 		__set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
400 		__set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
401 	}
402 
403 	if (caps & MAC_400000FD) {
404 		__set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
405 		__set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
406 		__set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
407 			  linkmodes);
408 		__set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
409 		__set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
410 		__set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
411 		__set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
412 		__set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
413 			  linkmodes);
414 		__set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
415 		__set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
416 	}
417 }
418 
419 static struct {
420 	unsigned long mask;
421 	int speed;
422 	unsigned int duplex;
423 } phylink_caps_params[] = {
424 	{ MAC_400000FD, SPEED_400000, DUPLEX_FULL },
425 	{ MAC_200000FD, SPEED_200000, DUPLEX_FULL },
426 	{ MAC_100000FD, SPEED_100000, DUPLEX_FULL },
427 	{ MAC_56000FD,  SPEED_56000,  DUPLEX_FULL },
428 	{ MAC_50000FD,  SPEED_50000,  DUPLEX_FULL },
429 	{ MAC_40000FD,  SPEED_40000,  DUPLEX_FULL },
430 	{ MAC_25000FD,  SPEED_25000,  DUPLEX_FULL },
431 	{ MAC_20000FD,  SPEED_20000,  DUPLEX_FULL },
432 	{ MAC_10000FD,  SPEED_10000,  DUPLEX_FULL },
433 	{ MAC_5000FD,   SPEED_5000,   DUPLEX_FULL },
434 	{ MAC_2500FD,   SPEED_2500,   DUPLEX_FULL },
435 	{ MAC_1000FD,   SPEED_1000,   DUPLEX_FULL },
436 	{ MAC_1000HD,   SPEED_1000,   DUPLEX_HALF },
437 	{ MAC_100FD,    SPEED_100,    DUPLEX_FULL },
438 	{ MAC_100HD,    SPEED_100,    DUPLEX_HALF },
439 	{ MAC_10FD,     SPEED_10,     DUPLEX_FULL },
440 	{ MAC_10HD,     SPEED_10,     DUPLEX_HALF },
441 };
442 
443 /**
444  * phylink_limit_mac_speed - limit the phylink_config to a maximum speed
445  * @config: pointer to a &struct phylink_config
446  * @max_speed: maximum speed
447  *
448  * Mask off MAC capabilities for speeds higher than the @max_speed parameter.
449  * Any further motifications of config.mac_capabilities will override this.
450  */
phylink_limit_mac_speed(struct phylink_config * config,u32 max_speed)451 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed)
452 {
453 	int i;
454 
455 	for (i = 0; i < ARRAY_SIZE(phylink_caps_params) &&
456 		    phylink_caps_params[i].speed > max_speed; i++)
457 		config->mac_capabilities &= ~phylink_caps_params[i].mask;
458 }
459 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed);
460 
461 /**
462  * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
463  * @speed: the speed to search for
464  * @duplex: the duplex to search for
465  *
466  * Find the mac capability for a given speed and duplex.
467  *
468  * Return: A mask with the mac capability patching @speed and @duplex, or 0 if
469  *         there were no matches.
470  */
phylink_cap_from_speed_duplex(int speed,unsigned int duplex)471 static unsigned long phylink_cap_from_speed_duplex(int speed,
472 						   unsigned int duplex)
473 {
474 	int i;
475 
476 	for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
477 		if (speed == phylink_caps_params[i].speed &&
478 		    duplex == phylink_caps_params[i].duplex)
479 			return phylink_caps_params[i].mask;
480 	}
481 
482 	return 0;
483 }
484 
485 /**
486  * phylink_get_capabilities() - get capabilities for a given MAC
487  * @interface: phy interface mode defined by &typedef phy_interface_t
488  * @mac_capabilities: bitmask of MAC capabilities
489  * @rate_matching: type of rate matching being performed
490  *
491  * Get the MAC capabilities that are supported by the @interface mode and
492  * @mac_capabilities.
493  */
phylink_get_capabilities(phy_interface_t interface,unsigned long mac_capabilities,int rate_matching)494 static unsigned long phylink_get_capabilities(phy_interface_t interface,
495 					      unsigned long mac_capabilities,
496 					      int rate_matching)
497 {
498 	int max_speed = phylink_interface_max_speed(interface);
499 	unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
500 	unsigned long matched_caps = 0;
501 
502 	switch (interface) {
503 	case PHY_INTERFACE_MODE_USXGMII:
504 		caps |= MAC_10000FD | MAC_5000FD;
505 		fallthrough;
506 
507 	case PHY_INTERFACE_MODE_10G_QXGMII:
508 		caps |= MAC_2500FD;
509 		fallthrough;
510 
511 	case PHY_INTERFACE_MODE_RGMII_TXID:
512 	case PHY_INTERFACE_MODE_RGMII_RXID:
513 	case PHY_INTERFACE_MODE_RGMII_ID:
514 	case PHY_INTERFACE_MODE_RGMII:
515 	case PHY_INTERFACE_MODE_PSGMII:
516 	case PHY_INTERFACE_MODE_QSGMII:
517 	case PHY_INTERFACE_MODE_QUSGMII:
518 	case PHY_INTERFACE_MODE_SGMII:
519 	case PHY_INTERFACE_MODE_GMII:
520 		caps |= MAC_1000HD | MAC_1000FD;
521 		fallthrough;
522 
523 	case PHY_INTERFACE_MODE_REVRMII:
524 	case PHY_INTERFACE_MODE_RMII:
525 	case PHY_INTERFACE_MODE_SMII:
526 	case PHY_INTERFACE_MODE_REVMII:
527 	case PHY_INTERFACE_MODE_MII:
528 		caps |= MAC_10HD | MAC_10FD;
529 		fallthrough;
530 
531 	case PHY_INTERFACE_MODE_100BASEX:
532 		caps |= MAC_100HD | MAC_100FD;
533 		break;
534 
535 	case PHY_INTERFACE_MODE_TBI:
536 	case PHY_INTERFACE_MODE_MOCA:
537 	case PHY_INTERFACE_MODE_RTBI:
538 	case PHY_INTERFACE_MODE_1000BASEX:
539 		caps |= MAC_1000HD;
540 		fallthrough;
541 	case PHY_INTERFACE_MODE_1000BASEKX:
542 	case PHY_INTERFACE_MODE_TRGMII:
543 		caps |= MAC_1000FD;
544 		break;
545 
546 	case PHY_INTERFACE_MODE_2500BASEX:
547 		caps |= MAC_2500FD;
548 		break;
549 
550 	case PHY_INTERFACE_MODE_5GBASER:
551 		caps |= MAC_5000FD;
552 		break;
553 
554 	case PHY_INTERFACE_MODE_XGMII:
555 	case PHY_INTERFACE_MODE_RXAUI:
556 	case PHY_INTERFACE_MODE_XAUI:
557 	case PHY_INTERFACE_MODE_10GBASER:
558 	case PHY_INTERFACE_MODE_10GKR:
559 		caps |= MAC_10000FD;
560 		break;
561 
562 	case PHY_INTERFACE_MODE_25GBASER:
563 		caps |= MAC_25000FD;
564 		break;
565 
566 	case PHY_INTERFACE_MODE_XLGMII:
567 		caps |= MAC_40000FD;
568 		break;
569 
570 	case PHY_INTERFACE_MODE_INTERNAL:
571 		caps |= ~0;
572 		break;
573 
574 	case PHY_INTERFACE_MODE_NA:
575 	case PHY_INTERFACE_MODE_MAX:
576 		break;
577 	}
578 
579 	switch (rate_matching) {
580 	case RATE_MATCH_OPEN_LOOP:
581 		/* TODO */
582 		fallthrough;
583 	case RATE_MATCH_NONE:
584 		matched_caps = 0;
585 		break;
586 	case RATE_MATCH_PAUSE: {
587 		/* The MAC must support asymmetric pause towards the local
588 		 * device for this. We could allow just symmetric pause, but
589 		 * then we might have to renegotiate if the link partner
590 		 * doesn't support pause. This is because there's no way to
591 		 * accept pause frames without transmitting them if we only
592 		 * support symmetric pause.
593 		 */
594 		if (!(mac_capabilities & MAC_SYM_PAUSE) ||
595 		    !(mac_capabilities & MAC_ASYM_PAUSE))
596 			break;
597 
598 		/* We can't adapt if the MAC doesn't support the interface's
599 		 * max speed at full duplex.
600 		 */
601 		if (mac_capabilities &
602 		    phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) {
603 			/* Although a duplex-matching phy might exist, we
604 			 * conservatively remove these modes because the MAC
605 			 * will not be aware of the half-duplex nature of the
606 			 * link.
607 			 */
608 			matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
609 			matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD);
610 		}
611 		break;
612 	}
613 	case RATE_MATCH_CRS:
614 		/* The MAC must support half duplex at the interface's max
615 		 * speed.
616 		 */
617 		if (mac_capabilities &
618 		    phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) {
619 			matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
620 			matched_caps &= mac_capabilities;
621 		}
622 		break;
623 	}
624 
625 	return (caps & mac_capabilities) | matched_caps;
626 }
627 
628 /**
629  * phylink_validate_mask_caps() - Restrict link modes based on caps
630  * @supported: ethtool bitmask for supported link modes.
631  * @state: pointer to a &struct phylink_link_state.
632  * @mac_capabilities: bitmask of MAC capabilities
633  *
634  * Calculate the supported link modes based on @mac_capabilities, and restrict
635  * @supported and @state based on that. Use this function if your capabiliies
636  * aren't constant, such as if they vary depending on the interface.
637  */
phylink_validate_mask_caps(unsigned long * supported,struct phylink_link_state * state,unsigned long mac_capabilities)638 static void phylink_validate_mask_caps(unsigned long *supported,
639 				       struct phylink_link_state *state,
640 				       unsigned long mac_capabilities)
641 {
642 	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
643 	unsigned long caps;
644 
645 	phylink_set_port_modes(mask);
646 	phylink_set(mask, Autoneg);
647 	caps = phylink_get_capabilities(state->interface, mac_capabilities,
648 					state->rate_matching);
649 	phylink_caps_to_linkmodes(mask, caps);
650 
651 	linkmode_and(supported, supported, mask);
652 	linkmode_and(state->advertising, state->advertising, mask);
653 }
654 
phylink_validate_mac_and_pcs(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)655 static int phylink_validate_mac_and_pcs(struct phylink *pl,
656 					unsigned long *supported,
657 					struct phylink_link_state *state)
658 {
659 	unsigned long capabilities;
660 	struct phylink_pcs *pcs;
661 	int ret;
662 
663 	/* Get the PCS for this interface mode */
664 	if (pl->using_mac_select_pcs) {
665 		pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
666 		if (IS_ERR(pcs))
667 			return PTR_ERR(pcs);
668 	} else {
669 		pcs = pl->pcs;
670 	}
671 
672 	if (pcs) {
673 		/* The PCS, if present, must be setup before phylink_create()
674 		 * has been called. If the ops is not initialised, print an
675 		 * error and backtrace rather than oopsing the kernel.
676 		 */
677 		if (!pcs->ops) {
678 			phylink_err(pl, "interface %s: uninitialised PCS\n",
679 				    phy_modes(state->interface));
680 			dump_stack();
681 			return -EINVAL;
682 		}
683 
684 		/* Validate the link parameters with the PCS */
685 		if (pcs->ops->pcs_validate) {
686 			ret = pcs->ops->pcs_validate(pcs, supported, state);
687 			if (ret < 0 || phylink_is_empty_linkmode(supported))
688 				return -EINVAL;
689 
690 			/* Ensure the advertising mask is a subset of the
691 			 * supported mask.
692 			 */
693 			linkmode_and(state->advertising, state->advertising,
694 				     supported);
695 		}
696 	}
697 
698 	/* Then validate the link parameters with the MAC */
699 	if (pl->mac_ops->mac_get_caps)
700 		capabilities = pl->mac_ops->mac_get_caps(pl->config,
701 							 state->interface);
702 	else
703 		capabilities = pl->config->mac_capabilities;
704 
705 	phylink_validate_mask_caps(supported, state, capabilities);
706 
707 	return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
708 }
709 
phylink_validate_one(struct phylink * pl,struct phy_device * phy,const unsigned long * supported,const struct phylink_link_state * state,phy_interface_t interface,unsigned long * accum_supported,unsigned long * accum_advertising)710 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy,
711 				 const unsigned long *supported,
712 				 const struct phylink_link_state *state,
713 				 phy_interface_t interface,
714 				 unsigned long *accum_supported,
715 				 unsigned long *accum_advertising)
716 {
717 	__ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported);
718 	struct phylink_link_state tmp_state;
719 
720 	linkmode_copy(tmp_supported, supported);
721 
722 	tmp_state = *state;
723 	tmp_state.interface = interface;
724 
725 	if (phy)
726 		tmp_state.rate_matching = phy_get_rate_matching(phy, interface);
727 
728 	if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) {
729 		phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n",
730 			    interface, phy_modes(interface),
731 			    phy_rate_matching_to_str(tmp_state.rate_matching),
732 			    __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported);
733 
734 		linkmode_or(accum_supported, accum_supported, tmp_supported);
735 		linkmode_or(accum_advertising, accum_advertising,
736 			    tmp_state.advertising);
737 	}
738 }
739 
phylink_validate_mask(struct phylink * pl,struct phy_device * phy,unsigned long * supported,struct phylink_link_state * state,const unsigned long * interfaces)740 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy,
741 				 unsigned long *supported,
742 				 struct phylink_link_state *state,
743 				 const unsigned long *interfaces)
744 {
745 	__ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
746 	__ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
747 	int interface;
748 
749 	for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX)
750 		phylink_validate_one(pl, phy, supported, state, interface,
751 				     all_s, all_adv);
752 
753 	linkmode_copy(supported, all_s);
754 	linkmode_copy(state->advertising, all_adv);
755 
756 	return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
757 }
758 
phylink_validate(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)759 static int phylink_validate(struct phylink *pl, unsigned long *supported,
760 			    struct phylink_link_state *state)
761 {
762 	const unsigned long *interfaces = pl->config->supported_interfaces;
763 
764 	if (state->interface == PHY_INTERFACE_MODE_NA)
765 		return phylink_validate_mask(pl, NULL, supported, state,
766 					     interfaces);
767 
768 	if (!test_bit(state->interface, interfaces))
769 		return -EINVAL;
770 
771 	return phylink_validate_mac_and_pcs(pl, supported, state);
772 }
773 
phylink_parse_fixedlink(struct phylink * pl,const struct fwnode_handle * fwnode)774 static int phylink_parse_fixedlink(struct phylink *pl,
775 				   const struct fwnode_handle *fwnode)
776 {
777 	struct fwnode_handle *fixed_node;
778 	bool pause, asym_pause, autoneg;
779 	const struct phy_setting *s;
780 	struct gpio_desc *desc;
781 	u32 speed;
782 	int ret;
783 
784 	fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
785 	if (fixed_node) {
786 		ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
787 
788 		pl->link_config.speed = speed;
789 		pl->link_config.duplex = DUPLEX_HALF;
790 
791 		if (fwnode_property_read_bool(fixed_node, "full-duplex"))
792 			pl->link_config.duplex = DUPLEX_FULL;
793 
794 		/* We treat the "pause" and "asym-pause" terminology as
795 		 * defining the link partner's ability.
796 		 */
797 		if (fwnode_property_read_bool(fixed_node, "pause"))
798 			__set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
799 				  pl->link_config.lp_advertising);
800 		if (fwnode_property_read_bool(fixed_node, "asym-pause"))
801 			__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
802 				  pl->link_config.lp_advertising);
803 
804 		if (ret == 0) {
805 			desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
806 						      GPIOD_IN, "?");
807 
808 			if (!IS_ERR(desc))
809 				pl->link_gpio = desc;
810 			else if (desc == ERR_PTR(-EPROBE_DEFER))
811 				ret = -EPROBE_DEFER;
812 		}
813 		fwnode_handle_put(fixed_node);
814 
815 		if (ret)
816 			return ret;
817 	} else {
818 		u32 prop[5];
819 
820 		ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
821 						     NULL, 0);
822 		if (ret != ARRAY_SIZE(prop)) {
823 			phylink_err(pl, "broken fixed-link?\n");
824 			return -EINVAL;
825 		}
826 
827 		ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
828 						     prop, ARRAY_SIZE(prop));
829 		if (!ret) {
830 			pl->link_config.duplex = prop[1] ?
831 						DUPLEX_FULL : DUPLEX_HALF;
832 			pl->link_config.speed = prop[2];
833 			if (prop[3])
834 				__set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
835 					  pl->link_config.lp_advertising);
836 			if (prop[4])
837 				__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
838 					  pl->link_config.lp_advertising);
839 		}
840 	}
841 
842 	if (pl->link_config.speed > SPEED_1000 &&
843 	    pl->link_config.duplex != DUPLEX_FULL)
844 		phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
845 			     pl->link_config.speed);
846 
847 	linkmode_fill(pl->supported);
848 	linkmode_copy(pl->link_config.advertising, pl->supported);
849 	phylink_validate(pl, pl->supported, &pl->link_config);
850 
851 	pause = phylink_test(pl->supported, Pause);
852 	asym_pause = phylink_test(pl->supported, Asym_Pause);
853 	autoneg = phylink_test(pl->supported, Autoneg);
854 	s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
855 			       pl->supported, true);
856 	linkmode_zero(pl->supported);
857 	phylink_set(pl->supported, MII);
858 
859 	if (pause)
860 		phylink_set(pl->supported, Pause);
861 
862 	if (asym_pause)
863 		phylink_set(pl->supported, Asym_Pause);
864 
865 	if (autoneg)
866 		phylink_set(pl->supported, Autoneg);
867 
868 	if (s) {
869 		__set_bit(s->bit, pl->supported);
870 		__set_bit(s->bit, pl->link_config.lp_advertising);
871 	} else {
872 		phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
873 			     pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
874 			     pl->link_config.speed);
875 	}
876 
877 	linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
878 		     pl->supported);
879 
880 	pl->link_config.link = 1;
881 	pl->link_config.an_complete = 1;
882 
883 	return 0;
884 }
885 
phylink_parse_mode(struct phylink * pl,const struct fwnode_handle * fwnode)886 static int phylink_parse_mode(struct phylink *pl,
887 			      const struct fwnode_handle *fwnode)
888 {
889 	struct fwnode_handle *dn;
890 	const char *managed;
891 	unsigned long caps;
892 
893 	if (pl->config->default_an_inband)
894 		pl->cfg_link_an_mode = MLO_AN_INBAND;
895 
896 	dn = fwnode_get_named_child_node(fwnode, "fixed-link");
897 	if (dn || fwnode_property_present(fwnode, "fixed-link"))
898 		pl->cfg_link_an_mode = MLO_AN_FIXED;
899 	fwnode_handle_put(dn);
900 
901 	if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
902 	     strcmp(managed, "in-band-status") == 0)) {
903 		if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
904 			phylink_err(pl,
905 				    "can't use both fixed-link and in-band-status\n");
906 			return -EINVAL;
907 		}
908 
909 		pl->cfg_link_an_mode = MLO_AN_INBAND;
910 	}
911 
912 	if (pl->cfg_link_an_mode == MLO_AN_INBAND) {
913 		linkmode_zero(pl->supported);
914 		phylink_set(pl->supported, MII);
915 		phylink_set(pl->supported, Autoneg);
916 		phylink_set(pl->supported, Asym_Pause);
917 		phylink_set(pl->supported, Pause);
918 
919 		switch (pl->link_config.interface) {
920 		case PHY_INTERFACE_MODE_SGMII:
921 		case PHY_INTERFACE_MODE_PSGMII:
922 		case PHY_INTERFACE_MODE_QSGMII:
923 		case PHY_INTERFACE_MODE_QUSGMII:
924 		case PHY_INTERFACE_MODE_RGMII:
925 		case PHY_INTERFACE_MODE_RGMII_ID:
926 		case PHY_INTERFACE_MODE_RGMII_RXID:
927 		case PHY_INTERFACE_MODE_RGMII_TXID:
928 		case PHY_INTERFACE_MODE_RTBI:
929 		case PHY_INTERFACE_MODE_1000BASEX:
930 		case PHY_INTERFACE_MODE_2500BASEX:
931 		case PHY_INTERFACE_MODE_5GBASER:
932 		case PHY_INTERFACE_MODE_25GBASER:
933 		case PHY_INTERFACE_MODE_USXGMII:
934 		case PHY_INTERFACE_MODE_10G_QXGMII:
935 		case PHY_INTERFACE_MODE_10GKR:
936 		case PHY_INTERFACE_MODE_10GBASER:
937 		case PHY_INTERFACE_MODE_XLGMII:
938 			caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE);
939 			caps = phylink_get_capabilities(pl->link_config.interface, caps,
940 							RATE_MATCH_NONE);
941 			phylink_caps_to_linkmodes(pl->supported, caps);
942 			break;
943 
944 		default:
945 			phylink_err(pl,
946 				    "incorrect link mode %s for in-band status\n",
947 				    phy_modes(pl->link_config.interface));
948 			return -EINVAL;
949 		}
950 
951 		linkmode_copy(pl->link_config.advertising, pl->supported);
952 
953 		if (phylink_validate(pl, pl->supported, &pl->link_config)) {
954 			phylink_err(pl,
955 				    "failed to validate link configuration for in-band status\n");
956 			return -EINVAL;
957 		}
958 	}
959 
960 	return 0;
961 }
962 
phylink_apply_manual_flow(struct phylink * pl,struct phylink_link_state * state)963 static void phylink_apply_manual_flow(struct phylink *pl,
964 				      struct phylink_link_state *state)
965 {
966 	/* If autoneg is disabled, pause AN is also disabled */
967 	if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
968 			       state->advertising))
969 		state->pause &= ~MLO_PAUSE_AN;
970 
971 	/* Manual configuration of pause modes */
972 	if (!(pl->link_config.pause & MLO_PAUSE_AN))
973 		state->pause = pl->link_config.pause;
974 }
975 
phylink_resolve_an_pause(struct phylink_link_state * state)976 static void phylink_resolve_an_pause(struct phylink_link_state *state)
977 {
978 	bool tx_pause, rx_pause;
979 
980 	if (state->duplex == DUPLEX_FULL) {
981 		linkmode_resolve_pause(state->advertising,
982 				       state->lp_advertising,
983 				       &tx_pause, &rx_pause);
984 		if (tx_pause)
985 			state->pause |= MLO_PAUSE_TX;
986 		if (rx_pause)
987 			state->pause |= MLO_PAUSE_RX;
988 	}
989 }
990 
phylink_pcs_pre_config(struct phylink_pcs * pcs,phy_interface_t interface)991 static void phylink_pcs_pre_config(struct phylink_pcs *pcs,
992 				   phy_interface_t interface)
993 {
994 	if (pcs && pcs->ops->pcs_pre_config)
995 		pcs->ops->pcs_pre_config(pcs, interface);
996 }
997 
phylink_pcs_post_config(struct phylink_pcs * pcs,phy_interface_t interface)998 static int phylink_pcs_post_config(struct phylink_pcs *pcs,
999 				   phy_interface_t interface)
1000 {
1001 	int err = 0;
1002 
1003 	if (pcs && pcs->ops->pcs_post_config)
1004 		err = pcs->ops->pcs_post_config(pcs, interface);
1005 
1006 	return err;
1007 }
1008 
phylink_pcs_disable(struct phylink_pcs * pcs)1009 static void phylink_pcs_disable(struct phylink_pcs *pcs)
1010 {
1011 	if (pcs && pcs->ops->pcs_disable)
1012 		pcs->ops->pcs_disable(pcs);
1013 }
1014 
phylink_pcs_enable(struct phylink_pcs * pcs)1015 static int phylink_pcs_enable(struct phylink_pcs *pcs)
1016 {
1017 	int err = 0;
1018 
1019 	if (pcs && pcs->ops->pcs_enable)
1020 		err = pcs->ops->pcs_enable(pcs);
1021 
1022 	return err;
1023 }
1024 
phylink_pcs_config(struct phylink_pcs * pcs,unsigned int neg_mode,const struct phylink_link_state * state,bool permit_pause_to_mac)1025 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
1026 			      const struct phylink_link_state *state,
1027 			      bool permit_pause_to_mac)
1028 {
1029 	if (!pcs)
1030 		return 0;
1031 
1032 	return pcs->ops->pcs_config(pcs, neg_mode, state->interface,
1033 				    state->advertising, permit_pause_to_mac);
1034 }
1035 
phylink_pcs_link_up(struct phylink_pcs * pcs,unsigned int neg_mode,phy_interface_t interface,int speed,int duplex)1036 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,
1037 				phy_interface_t interface, int speed,
1038 				int duplex)
1039 {
1040 	if (pcs && pcs->ops->pcs_link_up)
1041 		pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex);
1042 }
1043 
phylink_pcs_poll_stop(struct phylink * pl)1044 static void phylink_pcs_poll_stop(struct phylink *pl)
1045 {
1046 	if (pl->cfg_link_an_mode == MLO_AN_INBAND)
1047 		del_timer(&pl->link_poll);
1048 }
1049 
phylink_pcs_poll_start(struct phylink * pl)1050 static void phylink_pcs_poll_start(struct phylink *pl)
1051 {
1052 	if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
1053 		mod_timer(&pl->link_poll, jiffies + HZ);
1054 }
1055 
phylink_pcs_pre_init(struct phylink * pl,struct phylink_pcs * pcs)1056 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs)
1057 {
1058 	int ret = 0;
1059 
1060 	/* Signal to PCS driver that MAC requires RX clock for init */
1061 	if (pl->config->mac_requires_rxc)
1062 		pcs->rxc_always_on = true;
1063 
1064 	if (pcs->ops->pcs_pre_init)
1065 		ret = pcs->ops->pcs_pre_init(pcs);
1066 
1067 	return ret;
1068 }
1069 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init);
1070 
phylink_mac_config(struct phylink * pl,const struct phylink_link_state * state)1071 static void phylink_mac_config(struct phylink *pl,
1072 			       const struct phylink_link_state *state)
1073 {
1074 	struct phylink_link_state st = *state;
1075 
1076 	/* Stop drivers incorrectly using these */
1077 	linkmode_zero(st.lp_advertising);
1078 	st.speed = SPEED_UNKNOWN;
1079 	st.duplex = DUPLEX_UNKNOWN;
1080 	st.an_complete = false;
1081 	st.link = false;
1082 
1083 	phylink_dbg(pl,
1084 		    "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n",
1085 		    __func__, phylink_an_mode_str(pl->cur_link_an_mode),
1086 		    phy_modes(st.interface),
1087 		    phy_rate_matching_to_str(st.rate_matching),
1088 		    __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising,
1089 		    st.pause);
1090 
1091 	pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, &st);
1092 }
1093 
phylink_pcs_an_restart(struct phylink * pl)1094 static void phylink_pcs_an_restart(struct phylink *pl)
1095 {
1096 	if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1097 					 pl->link_config.advertising) &&
1098 	    phy_interface_mode_is_8023z(pl->link_config.interface) &&
1099 	    phylink_autoneg_inband(pl->cur_link_an_mode))
1100 		pl->pcs->ops->pcs_an_restart(pl->pcs);
1101 }
1102 
1103 /**
1104  * phylink_pcs_neg_mode() - helper to determine PCS inband mode
1105  * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND.
1106  * @interface: interface mode to be used
1107  * @advertising: adertisement ethtool link mode mask
1108  *
1109  * Determines the negotiation mode to be used by the PCS, and returns
1110  * one of:
1111  *
1112  * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband
1113  * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY)
1114  *   will be used.
1115  * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg
1116  *   disabled
1117  * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled
1118  *
1119  * Note: this is for cases where the PCS itself is involved in negotiation
1120  * (e.g. Clause 37, SGMII and similar) not Clause 73.
1121  */
phylink_pcs_neg_mode(unsigned int mode,phy_interface_t interface,const unsigned long * advertising)1122 static unsigned int phylink_pcs_neg_mode(unsigned int mode,
1123 					 phy_interface_t interface,
1124 					 const unsigned long *advertising)
1125 {
1126 	unsigned int neg_mode;
1127 
1128 	switch (interface) {
1129 	case PHY_INTERFACE_MODE_SGMII:
1130 	case PHY_INTERFACE_MODE_QSGMII:
1131 	case PHY_INTERFACE_MODE_QUSGMII:
1132 	case PHY_INTERFACE_MODE_USXGMII:
1133 	case PHY_INTERFACE_MODE_10G_QXGMII:
1134 		/* These protocols are designed for use with a PHY which
1135 		 * communicates its negotiation result back to the MAC via
1136 		 * inband communication. Note: there exist PHYs that run
1137 		 * with SGMII but do not send the inband data.
1138 		 */
1139 		if (!phylink_autoneg_inband(mode))
1140 			neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1141 		else
1142 			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1143 		break;
1144 
1145 	case PHY_INTERFACE_MODE_1000BASEX:
1146 	case PHY_INTERFACE_MODE_2500BASEX:
1147 		/* 1000base-X is designed for use media-side for Fibre
1148 		 * connections, and thus the Autoneg bit needs to be
1149 		 * taken into account. We also do this for 2500base-X
1150 		 * as well, but drivers may not support this, so may
1151 		 * need to override this.
1152 		 */
1153 		if (!phylink_autoneg_inband(mode))
1154 			neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1155 		else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1156 					   advertising))
1157 			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1158 		else
1159 			neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
1160 		break;
1161 
1162 	default:
1163 		neg_mode = PHYLINK_PCS_NEG_NONE;
1164 		break;
1165 	}
1166 
1167 	return neg_mode;
1168 }
1169 
phylink_major_config(struct phylink * pl,bool restart,const struct phylink_link_state * state)1170 static void phylink_major_config(struct phylink *pl, bool restart,
1171 				  const struct phylink_link_state *state)
1172 {
1173 	struct phylink_pcs *pcs = NULL;
1174 	bool pcs_changed = false;
1175 	unsigned int rate_kbd;
1176 	unsigned int neg_mode;
1177 	int err;
1178 
1179 	phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
1180 
1181 	pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
1182 						state->interface,
1183 						state->advertising);
1184 
1185 	if (pl->using_mac_select_pcs) {
1186 		pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
1187 		if (IS_ERR(pcs)) {
1188 			phylink_err(pl,
1189 				    "mac_select_pcs unexpectedly failed: %pe\n",
1190 				    pcs);
1191 			return;
1192 		}
1193 
1194 		pcs_changed = pcs && pl->pcs != pcs;
1195 	}
1196 
1197 	phylink_pcs_poll_stop(pl);
1198 
1199 	if (pl->mac_ops->mac_prepare) {
1200 		err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
1201 					       state->interface);
1202 		if (err < 0) {
1203 			phylink_err(pl, "mac_prepare failed: %pe\n",
1204 				    ERR_PTR(err));
1205 			return;
1206 		}
1207 	}
1208 
1209 	/* If we have a new PCS, switch to the new PCS after preparing the MAC
1210 	 * for the change.
1211 	 */
1212 	if (pcs_changed) {
1213 		phylink_pcs_disable(pl->pcs);
1214 
1215 		if (pl->pcs)
1216 			pl->pcs->phylink = NULL;
1217 
1218 		pcs->phylink = pl;
1219 
1220 		pl->pcs = pcs;
1221 	}
1222 
1223 	if (pl->pcs)
1224 		phylink_pcs_pre_config(pl->pcs, state->interface);
1225 
1226 	phylink_mac_config(pl, state);
1227 
1228 	if (pl->pcs)
1229 		phylink_pcs_post_config(pl->pcs, state->interface);
1230 
1231 	if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed)
1232 		phylink_pcs_enable(pl->pcs);
1233 
1234 	neg_mode = pl->cur_link_an_mode;
1235 	if (pl->pcs && pl->pcs->neg_mode)
1236 		neg_mode = pl->pcs_neg_mode;
1237 
1238 	err = phylink_pcs_config(pl->pcs, neg_mode, state,
1239 				 !!(pl->link_config.pause & MLO_PAUSE_AN));
1240 	if (err < 0)
1241 		phylink_err(pl, "pcs_config failed: %pe\n",
1242 			    ERR_PTR(err));
1243 	else if (err > 0)
1244 		restart = true;
1245 
1246 	if (restart)
1247 		phylink_pcs_an_restart(pl);
1248 
1249 	if (pl->mac_ops->mac_finish) {
1250 		err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
1251 					      state->interface);
1252 		if (err < 0)
1253 			phylink_err(pl, "mac_finish failed: %pe\n",
1254 				    ERR_PTR(err));
1255 	}
1256 
1257 	if (pl->sfp_bus) {
1258 		rate_kbd = phylink_interface_signal_rate(state->interface);
1259 		if (rate_kbd)
1260 			sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd);
1261 	}
1262 
1263 	phylink_pcs_poll_start(pl);
1264 }
1265 
1266 /*
1267  * Reconfigure for a change of inband advertisement.
1268  * If we have a separate PCS, we only need to call its pcs_config() method,
1269  * and then restart AN if it indicates something changed. Otherwise, we do
1270  * the full MAC reconfiguration.
1271  */
phylink_change_inband_advert(struct phylink * pl)1272 static int phylink_change_inband_advert(struct phylink *pl)
1273 {
1274 	unsigned int neg_mode;
1275 	int ret;
1276 
1277 	if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1278 		return 0;
1279 
1280 	phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
1281 		    phylink_an_mode_str(pl->cur_link_an_mode),
1282 		    phy_modes(pl->link_config.interface),
1283 		    __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
1284 		    pl->link_config.pause);
1285 
1286 	/* Recompute the PCS neg mode */
1287 	pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
1288 					pl->link_config.interface,
1289 					pl->link_config.advertising);
1290 
1291 	neg_mode = pl->cur_link_an_mode;
1292 	if (pl->pcs->neg_mode)
1293 		neg_mode = pl->pcs_neg_mode;
1294 
1295 	/* Modern PCS-based method; update the advert at the PCS, and
1296 	 * restart negotiation if the pcs_config() helper indicates that
1297 	 * the programmed advertisement has changed.
1298 	 */
1299 	ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config,
1300 				 !!(pl->link_config.pause & MLO_PAUSE_AN));
1301 	if (ret < 0)
1302 		return ret;
1303 
1304 	if (ret > 0)
1305 		phylink_pcs_an_restart(pl);
1306 
1307 	return 0;
1308 }
1309 
phylink_mac_pcs_get_state(struct phylink * pl,struct phylink_link_state * state)1310 static void phylink_mac_pcs_get_state(struct phylink *pl,
1311 				      struct phylink_link_state *state)
1312 {
1313 	linkmode_copy(state->advertising, pl->link_config.advertising);
1314 	linkmode_zero(state->lp_advertising);
1315 	state->interface = pl->link_config.interface;
1316 	state->rate_matching = pl->link_config.rate_matching;
1317 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1318 			      state->advertising)) {
1319 		state->speed = SPEED_UNKNOWN;
1320 		state->duplex = DUPLEX_UNKNOWN;
1321 		state->pause = MLO_PAUSE_NONE;
1322 	} else {
1323 		state->speed =  pl->link_config.speed;
1324 		state->duplex = pl->link_config.duplex;
1325 		state->pause = pl->link_config.pause;
1326 	}
1327 	state->an_complete = 0;
1328 	state->link = 1;
1329 
1330 	if (pl->pcs)
1331 		pl->pcs->ops->pcs_get_state(pl->pcs, state);
1332 	else
1333 		state->link = 0;
1334 }
1335 
1336 /* The fixed state is... fixed except for the link state,
1337  * which may be determined by a GPIO or a callback.
1338  */
phylink_get_fixed_state(struct phylink * pl,struct phylink_link_state * state)1339 static void phylink_get_fixed_state(struct phylink *pl,
1340 				    struct phylink_link_state *state)
1341 {
1342 	*state = pl->link_config;
1343 	if (pl->config->get_fixed_state)
1344 		pl->config->get_fixed_state(pl->config, state);
1345 	else if (pl->link_gpio)
1346 		state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
1347 
1348 	state->pause = MLO_PAUSE_NONE;
1349 	phylink_resolve_an_pause(state);
1350 }
1351 
phylink_mac_initial_config(struct phylink * pl,bool force_restart)1352 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1353 {
1354 	struct phylink_link_state link_state;
1355 
1356 	switch (pl->cur_link_an_mode) {
1357 	case MLO_AN_PHY:
1358 		link_state = pl->phy_state;
1359 		break;
1360 
1361 	case MLO_AN_FIXED:
1362 		phylink_get_fixed_state(pl, &link_state);
1363 		break;
1364 
1365 	case MLO_AN_INBAND:
1366 		link_state = pl->link_config;
1367 		if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
1368 			link_state.pause = MLO_PAUSE_NONE;
1369 		break;
1370 
1371 	default: /* can't happen */
1372 		return;
1373 	}
1374 
1375 	link_state.link = false;
1376 
1377 	phylink_apply_manual_flow(pl, &link_state);
1378 	phylink_major_config(pl, force_restart, &link_state);
1379 }
1380 
phylink_pause_to_str(int pause)1381 static const char *phylink_pause_to_str(int pause)
1382 {
1383 	switch (pause & MLO_PAUSE_TXRX_MASK) {
1384 	case MLO_PAUSE_TX | MLO_PAUSE_RX:
1385 		return "rx/tx";
1386 	case MLO_PAUSE_TX:
1387 		return "tx";
1388 	case MLO_PAUSE_RX:
1389 		return "rx";
1390 	default:
1391 		return "off";
1392 	}
1393 }
1394 
phylink_link_up(struct phylink * pl,struct phylink_link_state link_state)1395 static void phylink_link_up(struct phylink *pl,
1396 			    struct phylink_link_state link_state)
1397 {
1398 	struct net_device *ndev = pl->netdev;
1399 	unsigned int neg_mode;
1400 	int speed, duplex;
1401 	bool rx_pause;
1402 
1403 	speed = link_state.speed;
1404 	duplex = link_state.duplex;
1405 	rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
1406 
1407 	switch (link_state.rate_matching) {
1408 	case RATE_MATCH_PAUSE:
1409 		/* The PHY is doing rate matchion from the media rate (in
1410 		 * the link_state) to the interface speed, and will send
1411 		 * pause frames to the MAC to limit its transmission speed.
1412 		 */
1413 		speed = phylink_interface_max_speed(link_state.interface);
1414 		duplex = DUPLEX_FULL;
1415 		rx_pause = true;
1416 		break;
1417 
1418 	case RATE_MATCH_CRS:
1419 		/* The PHY is doing rate matchion from the media rate (in
1420 		 * the link_state) to the interface speed, and will cause
1421 		 * collisions to the MAC to limit its transmission speed.
1422 		 */
1423 		speed = phylink_interface_max_speed(link_state.interface);
1424 		duplex = DUPLEX_HALF;
1425 		break;
1426 	}
1427 
1428 	pl->cur_interface = link_state.interface;
1429 
1430 	neg_mode = pl->cur_link_an_mode;
1431 	if (pl->pcs && pl->pcs->neg_mode)
1432 		neg_mode = pl->pcs_neg_mode;
1433 
1434 	phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed,
1435 			    duplex);
1436 
1437 	pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode,
1438 				 pl->cur_interface, speed, duplex,
1439 				 !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
1440 
1441 	if (ndev)
1442 		netif_carrier_on(ndev);
1443 
1444 	phylink_info(pl,
1445 		     "Link is Up - %s/%s - flow control %s\n",
1446 		     phy_speed_to_str(link_state.speed),
1447 		     phy_duplex_to_str(link_state.duplex),
1448 		     phylink_pause_to_str(link_state.pause));
1449 }
1450 
phylink_link_down(struct phylink * pl)1451 static void phylink_link_down(struct phylink *pl)
1452 {
1453 	struct net_device *ndev = pl->netdev;
1454 
1455 	if (ndev)
1456 		netif_carrier_off(ndev);
1457 	pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
1458 				   pl->cur_interface);
1459 	phylink_info(pl, "Link is Down\n");
1460 }
1461 
phylink_resolve(struct work_struct * w)1462 static void phylink_resolve(struct work_struct *w)
1463 {
1464 	struct phylink *pl = container_of(w, struct phylink, resolve);
1465 	struct phylink_link_state link_state;
1466 	struct net_device *ndev = pl->netdev;
1467 	bool mac_config = false;
1468 	bool retrigger = false;
1469 	bool cur_link_state;
1470 
1471 	mutex_lock(&pl->state_mutex);
1472 	if (pl->netdev)
1473 		cur_link_state = netif_carrier_ok(ndev);
1474 	else
1475 		cur_link_state = pl->old_link_state;
1476 
1477 	if (pl->phylink_disable_state) {
1478 		pl->link_failed = false;
1479 		link_state.link = false;
1480 	} else if (pl->link_failed) {
1481 		link_state.link = false;
1482 		retrigger = true;
1483 	} else {
1484 		switch (pl->cur_link_an_mode) {
1485 		case MLO_AN_PHY:
1486 			link_state = pl->phy_state;
1487 			phylink_apply_manual_flow(pl, &link_state);
1488 			mac_config = link_state.link;
1489 			break;
1490 
1491 		case MLO_AN_FIXED:
1492 			phylink_get_fixed_state(pl, &link_state);
1493 			mac_config = link_state.link;
1494 			break;
1495 
1496 		case MLO_AN_INBAND:
1497 			phylink_mac_pcs_get_state(pl, &link_state);
1498 
1499 			/* The PCS may have a latching link-fail indicator.
1500 			 * If the link was up, bring the link down and
1501 			 * re-trigger the resolve. Otherwise, re-read the
1502 			 * PCS state to get the current status of the link.
1503 			 */
1504 			if (!link_state.link) {
1505 				if (cur_link_state)
1506 					retrigger = true;
1507 				else
1508 					phylink_mac_pcs_get_state(pl,
1509 								  &link_state);
1510 			}
1511 
1512 			/* If we have a phy, the "up" state is the union of
1513 			 * both the PHY and the MAC
1514 			 */
1515 			if (pl->phydev)
1516 				link_state.link &= pl->phy_state.link;
1517 
1518 			/* Only update if the PHY link is up */
1519 			if (pl->phydev && pl->phy_state.link) {
1520 				/* If the interface has changed, force a
1521 				 * link down event if the link isn't already
1522 				 * down, and re-resolve.
1523 				 */
1524 				if (link_state.interface !=
1525 				    pl->phy_state.interface) {
1526 					retrigger = true;
1527 					link_state.link = false;
1528 				}
1529 				link_state.interface = pl->phy_state.interface;
1530 
1531 				/* If we are doing rate matching, then the
1532 				 * link speed/duplex comes from the PHY
1533 				 */
1534 				if (pl->phy_state.rate_matching) {
1535 					link_state.rate_matching =
1536 						pl->phy_state.rate_matching;
1537 					link_state.speed = pl->phy_state.speed;
1538 					link_state.duplex =
1539 						pl->phy_state.duplex;
1540 				}
1541 
1542 				/* If we have a PHY, we need to update with
1543 				 * the PHY flow control bits.
1544 				 */
1545 				link_state.pause = pl->phy_state.pause;
1546 				mac_config = true;
1547 			}
1548 			phylink_apply_manual_flow(pl, &link_state);
1549 			break;
1550 		}
1551 	}
1552 
1553 	if (mac_config) {
1554 		if (link_state.interface != pl->link_config.interface) {
1555 			/* The interface has changed, force the link down and
1556 			 * then reconfigure.
1557 			 */
1558 			if (cur_link_state) {
1559 				phylink_link_down(pl);
1560 				cur_link_state = false;
1561 			}
1562 			phylink_major_config(pl, false, &link_state);
1563 			pl->link_config.interface = link_state.interface;
1564 		}
1565 	}
1566 
1567 	if (link_state.link != cur_link_state) {
1568 		pl->old_link_state = link_state.link;
1569 		if (!link_state.link)
1570 			phylink_link_down(pl);
1571 		else
1572 			phylink_link_up(pl, link_state);
1573 	}
1574 	if (!link_state.link && retrigger) {
1575 		pl->link_failed = false;
1576 		queue_work(system_power_efficient_wq, &pl->resolve);
1577 	}
1578 	mutex_unlock(&pl->state_mutex);
1579 }
1580 
phylink_run_resolve(struct phylink * pl)1581 static void phylink_run_resolve(struct phylink *pl)
1582 {
1583 	if (!pl->phylink_disable_state)
1584 		queue_work(system_power_efficient_wq, &pl->resolve);
1585 }
1586 
phylink_run_resolve_and_disable(struct phylink * pl,int bit)1587 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1588 {
1589 	unsigned long state = pl->phylink_disable_state;
1590 
1591 	set_bit(bit, &pl->phylink_disable_state);
1592 	if (state == 0) {
1593 		queue_work(system_power_efficient_wq, &pl->resolve);
1594 		flush_work(&pl->resolve);
1595 	}
1596 }
1597 
phylink_enable_and_run_resolve(struct phylink * pl,int bit)1598 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1599 {
1600 	clear_bit(bit, &pl->phylink_disable_state);
1601 	phylink_run_resolve(pl);
1602 }
1603 
phylink_fixed_poll(struct timer_list * t)1604 static void phylink_fixed_poll(struct timer_list *t)
1605 {
1606 	struct phylink *pl = container_of(t, struct phylink, link_poll);
1607 
1608 	mod_timer(t, jiffies + HZ);
1609 
1610 	phylink_run_resolve(pl);
1611 }
1612 
1613 static const struct sfp_upstream_ops sfp_phylink_ops;
1614 
phylink_register_sfp(struct phylink * pl,const struct fwnode_handle * fwnode)1615 static int phylink_register_sfp(struct phylink *pl,
1616 				const struct fwnode_handle *fwnode)
1617 {
1618 	struct sfp_bus *bus;
1619 	int ret;
1620 
1621 	if (!fwnode)
1622 		return 0;
1623 
1624 	bus = sfp_bus_find_fwnode(fwnode);
1625 	if (IS_ERR(bus)) {
1626 		phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1627 		return PTR_ERR(bus);
1628 	}
1629 
1630 	pl->sfp_bus = bus;
1631 
1632 	ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1633 	sfp_bus_put(bus);
1634 
1635 	return ret;
1636 }
1637 
1638 /**
1639  * phylink_set_fixed_link() - set the fixed link
1640  * @pl: a pointer to a &struct phylink returned from phylink_create()
1641  * @state: a pointer to a struct phylink_link_state.
1642  *
1643  * This function is used when the link parameters are known and do not change,
1644  * making it suitable for certain types of network connections.
1645  *
1646  * Returns: zero on success or negative error code.
1647  */
phylink_set_fixed_link(struct phylink * pl,const struct phylink_link_state * state)1648 int phylink_set_fixed_link(struct phylink *pl,
1649 			   const struct phylink_link_state *state)
1650 {
1651 	const struct phy_setting *s;
1652 	unsigned long *adv;
1653 
1654 	if (pl->cfg_link_an_mode != MLO_AN_PHY || !state ||
1655 	    !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1656 		return -EINVAL;
1657 
1658 	s = phy_lookup_setting(state->speed, state->duplex,
1659 			       pl->supported, true);
1660 	if (!s)
1661 		return -EINVAL;
1662 
1663 	adv = pl->link_config.advertising;
1664 	linkmode_zero(adv);
1665 	linkmode_set_bit(s->bit, adv);
1666 	linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv);
1667 
1668 	pl->link_config.speed = state->speed;
1669 	pl->link_config.duplex = state->duplex;
1670 	pl->link_config.link = 1;
1671 	pl->link_config.an_complete = 1;
1672 
1673 	pl->cfg_link_an_mode = MLO_AN_FIXED;
1674 	pl->cur_link_an_mode = pl->cfg_link_an_mode;
1675 
1676 	return 0;
1677 }
1678 EXPORT_SYMBOL_GPL(phylink_set_fixed_link);
1679 
1680 /**
1681  * phylink_create() - create a phylink instance
1682  * @config: a pointer to the target &struct phylink_config
1683  * @fwnode: a pointer to a &struct fwnode_handle describing the network
1684  *	interface
1685  * @iface: the desired link mode defined by &typedef phy_interface_t
1686  * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1687  *
1688  * Create a new phylink instance, and parse the link parameters found in @np.
1689  * This will parse in-band modes, fixed-link or SFP configuration.
1690  *
1691  * Note: the rtnl lock must not be held when calling this function.
1692  *
1693  * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1694  * must use IS_ERR() to check for errors from this function.
1695  */
phylink_create(struct phylink_config * config,const struct fwnode_handle * fwnode,phy_interface_t iface,const struct phylink_mac_ops * mac_ops)1696 struct phylink *phylink_create(struct phylink_config *config,
1697 			       const struct fwnode_handle *fwnode,
1698 			       phy_interface_t iface,
1699 			       const struct phylink_mac_ops *mac_ops)
1700 {
1701 	bool using_mac_select_pcs = false;
1702 	struct phylink *pl;
1703 	int ret;
1704 
1705 	/* Validate the supplied configuration */
1706 	if (phy_interface_empty(config->supported_interfaces)) {
1707 		dev_err(config->dev,
1708 			"phylink: error: empty supported_interfaces\n");
1709 		return ERR_PTR(-EINVAL);
1710 	}
1711 
1712 	if (mac_ops->mac_select_pcs &&
1713 	    mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) !=
1714 	      ERR_PTR(-EOPNOTSUPP))
1715 		using_mac_select_pcs = true;
1716 
1717 	pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1718 	if (!pl)
1719 		return ERR_PTR(-ENOMEM);
1720 
1721 	mutex_init(&pl->state_mutex);
1722 	INIT_WORK(&pl->resolve, phylink_resolve);
1723 
1724 	pl->config = config;
1725 	if (config->type == PHYLINK_NETDEV) {
1726 		pl->netdev = to_net_dev(config->dev);
1727 		netif_carrier_off(pl->netdev);
1728 	} else if (config->type == PHYLINK_DEV) {
1729 		pl->dev = config->dev;
1730 	} else {
1731 		kfree(pl);
1732 		return ERR_PTR(-EINVAL);
1733 	}
1734 
1735 	pl->using_mac_select_pcs = using_mac_select_pcs;
1736 	pl->phy_state.interface = iface;
1737 	pl->link_interface = iface;
1738 	if (iface == PHY_INTERFACE_MODE_MOCA)
1739 		pl->link_port = PORT_BNC;
1740 	else
1741 		pl->link_port = PORT_MII;
1742 	pl->link_config.interface = iface;
1743 	pl->link_config.pause = MLO_PAUSE_AN;
1744 	pl->link_config.speed = SPEED_UNKNOWN;
1745 	pl->link_config.duplex = DUPLEX_UNKNOWN;
1746 	pl->pcs_state = PCS_STATE_DOWN;
1747 	pl->mac_ops = mac_ops;
1748 	__set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1749 	timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1750 
1751 	linkmode_fill(pl->supported);
1752 	linkmode_copy(pl->link_config.advertising, pl->supported);
1753 	phylink_validate(pl, pl->supported, &pl->link_config);
1754 
1755 	ret = phylink_parse_mode(pl, fwnode);
1756 	if (ret < 0) {
1757 		kfree(pl);
1758 		return ERR_PTR(ret);
1759 	}
1760 
1761 	if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1762 		ret = phylink_parse_fixedlink(pl, fwnode);
1763 		if (ret < 0) {
1764 			kfree(pl);
1765 			return ERR_PTR(ret);
1766 		}
1767 	}
1768 
1769 	pl->cur_link_an_mode = pl->cfg_link_an_mode;
1770 
1771 	ret = phylink_register_sfp(pl, fwnode);
1772 	if (ret < 0) {
1773 		kfree(pl);
1774 		return ERR_PTR(ret);
1775 	}
1776 
1777 	return pl;
1778 }
1779 EXPORT_SYMBOL_GPL(phylink_create);
1780 
1781 /**
1782  * phylink_destroy() - cleanup and destroy the phylink instance
1783  * @pl: a pointer to a &struct phylink returned from phylink_create()
1784  *
1785  * Destroy a phylink instance. Any PHY that has been attached must have been
1786  * cleaned up via phylink_disconnect_phy() prior to calling this function.
1787  *
1788  * Note: the rtnl lock must not be held when calling this function.
1789  */
phylink_destroy(struct phylink * pl)1790 void phylink_destroy(struct phylink *pl)
1791 {
1792 	sfp_bus_del_upstream(pl->sfp_bus);
1793 	if (pl->link_gpio)
1794 		gpiod_put(pl->link_gpio);
1795 
1796 	cancel_work_sync(&pl->resolve);
1797 	kfree(pl);
1798 }
1799 EXPORT_SYMBOL_GPL(phylink_destroy);
1800 
1801 /**
1802  * phylink_expects_phy() - Determine if phylink expects a phy to be attached
1803  * @pl: a pointer to a &struct phylink returned from phylink_create()
1804  *
1805  * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X,
1806  * no PHY is needed.
1807  *
1808  * Returns true if phylink will be expecting a PHY.
1809  */
phylink_expects_phy(struct phylink * pl)1810 bool phylink_expects_phy(struct phylink *pl)
1811 {
1812 	if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1813 	    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1814 	     phy_interface_mode_is_8023z(pl->link_config.interface)))
1815 		return false;
1816 	return true;
1817 }
1818 EXPORT_SYMBOL_GPL(phylink_expects_phy);
1819 
phylink_phy_change(struct phy_device * phydev,bool up)1820 static void phylink_phy_change(struct phy_device *phydev, bool up)
1821 {
1822 	struct phylink *pl = phydev->phylink;
1823 	bool tx_pause, rx_pause;
1824 
1825 	phy_get_pause(phydev, &tx_pause, &rx_pause);
1826 
1827 	mutex_lock(&pl->state_mutex);
1828 	pl->phy_state.speed = phydev->speed;
1829 	pl->phy_state.duplex = phydev->duplex;
1830 	pl->phy_state.rate_matching = phydev->rate_matching;
1831 	pl->phy_state.pause = MLO_PAUSE_NONE;
1832 	if (tx_pause)
1833 		pl->phy_state.pause |= MLO_PAUSE_TX;
1834 	if (rx_pause)
1835 		pl->phy_state.pause |= MLO_PAUSE_RX;
1836 	pl->phy_state.interface = phydev->interface;
1837 	pl->phy_state.link = up;
1838 	if (!up)
1839 		pl->link_failed = true;
1840 	mutex_unlock(&pl->state_mutex);
1841 
1842 	phylink_run_resolve(pl);
1843 
1844 	phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down",
1845 		    phy_modes(phydev->interface),
1846 		    phy_speed_to_str(phydev->speed),
1847 		    phy_duplex_to_str(phydev->duplex),
1848 		    phy_rate_matching_to_str(phydev->rate_matching),
1849 		    phylink_pause_to_str(pl->phy_state.pause));
1850 }
1851 
phylink_validate_phy(struct phylink * pl,struct phy_device * phy,unsigned long * supported,struct phylink_link_state * state)1852 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy,
1853 				unsigned long *supported,
1854 				struct phylink_link_state *state)
1855 {
1856 	DECLARE_PHY_INTERFACE_MASK(interfaces);
1857 
1858 	/* If the PHY provides a bitmap of the interfaces it will be using
1859 	 * depending on the negotiated media speeds, use this to validate
1860 	 * which ethtool link modes can be used.
1861 	 */
1862 	if (!phy_interface_empty(phy->possible_interfaces)) {
1863 		/* We only care about the union of the PHY's interfaces and
1864 		 * those which the host supports.
1865 		 */
1866 		phy_interface_and(interfaces, phy->possible_interfaces,
1867 				  pl->config->supported_interfaces);
1868 
1869 		if (phy_interface_empty(interfaces)) {
1870 			phylink_err(pl, "PHY has no common interfaces\n");
1871 			return -EINVAL;
1872 		}
1873 
1874 		if (phy_on_sfp(phy)) {
1875 			/* If the PHY is on a SFP, limit the interfaces to
1876 			 * those that can be used with a SFP module.
1877 			 */
1878 			phy_interface_and(interfaces, interfaces,
1879 					  phylink_sfp_interfaces);
1880 
1881 			if (phy_interface_empty(interfaces)) {
1882 				phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n");
1883 				return -EINVAL;
1884 			}
1885 		}
1886 
1887 		phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n",
1888 			    phydev_name(phy),
1889 			    (int)PHY_INTERFACE_MODE_MAX,
1890 			    phy->possible_interfaces,
1891 			    (int)PHY_INTERFACE_MODE_MAX, interfaces);
1892 
1893 		return phylink_validate_mask(pl, phy, supported, state,
1894 					     interfaces);
1895 	}
1896 
1897 	phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n",
1898 		    phydev_name(phy));
1899 
1900 	/* Check whether we would use rate matching for the proposed interface
1901 	 * mode.
1902 	 */
1903 	state->rate_matching = phy_get_rate_matching(phy, state->interface);
1904 
1905 	/* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
1906 	 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
1907 	 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
1908 	 * their Serdes is either unnecessary or not reasonable.
1909 	 *
1910 	 * For these which switch interface modes, we really need to know which
1911 	 * interface modes the PHY supports to properly work out which ethtool
1912 	 * linkmodes can be supported. For now, as a work-around, we validate
1913 	 * against all interface modes, which may lead to more ethtool link
1914 	 * modes being advertised than are actually supported.
1915 	 */
1916 	if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE &&
1917 	    state->interface != PHY_INTERFACE_MODE_RXAUI &&
1918 	    state->interface != PHY_INTERFACE_MODE_XAUI &&
1919 	    state->interface != PHY_INTERFACE_MODE_USXGMII)
1920 		state->interface = PHY_INTERFACE_MODE_NA;
1921 
1922 	return phylink_validate(pl, supported, state);
1923 }
1924 
phylink_bringup_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)1925 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
1926 			       phy_interface_t interface)
1927 {
1928 	struct phylink_link_state config;
1929 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
1930 	char *irq_str;
1931 	int ret;
1932 
1933 	/*
1934 	 * This is the new way of dealing with flow control for PHYs,
1935 	 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
1936 	 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
1937 	 * using our validate call to the MAC, we rely upon the MAC
1938 	 * clearing the bits from both supported and advertising fields.
1939 	 */
1940 	phy_support_asym_pause(phy);
1941 
1942 	memset(&config, 0, sizeof(config));
1943 	linkmode_copy(supported, phy->supported);
1944 	linkmode_copy(config.advertising, phy->advertising);
1945 	config.interface = interface;
1946 
1947 	ret = phylink_validate_phy(pl, phy, supported, &config);
1948 	if (ret) {
1949 		phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
1950 			     phy_modes(config.interface),
1951 			     __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
1952 			     __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
1953 			     ERR_PTR(ret));
1954 		return ret;
1955 	}
1956 
1957 	phy->phylink = pl;
1958 	phy->phy_link_change = phylink_phy_change;
1959 
1960 	irq_str = phy_attached_info_irq(phy);
1961 	phylink_info(pl,
1962 		     "PHY [%s] driver [%s] (irq=%s)\n",
1963 		     dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
1964 	kfree(irq_str);
1965 
1966 	mutex_lock(&phy->lock);
1967 	mutex_lock(&pl->state_mutex);
1968 	pl->phydev = phy;
1969 	pl->phy_state.interface = interface;
1970 	pl->phy_state.pause = MLO_PAUSE_NONE;
1971 	pl->phy_state.speed = SPEED_UNKNOWN;
1972 	pl->phy_state.duplex = DUPLEX_UNKNOWN;
1973 	pl->phy_state.rate_matching = RATE_MATCH_NONE;
1974 	linkmode_copy(pl->supported, supported);
1975 	linkmode_copy(pl->link_config.advertising, config.advertising);
1976 
1977 	/* Restrict the phy advertisement according to the MAC support. */
1978 	linkmode_copy(phy->advertising, config.advertising);
1979 	mutex_unlock(&pl->state_mutex);
1980 	mutex_unlock(&phy->lock);
1981 
1982 	phylink_dbg(pl,
1983 		    "phy: %s setting supported %*pb advertising %*pb\n",
1984 		    phy_modes(interface),
1985 		    __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
1986 		    __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
1987 
1988 	if (phy_interrupt_is_valid(phy))
1989 		phy_request_interrupt(phy);
1990 
1991 	if (pl->config->mac_managed_pm)
1992 		phy->mac_managed_pm = true;
1993 
1994 	return 0;
1995 }
1996 
phylink_attach_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)1997 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
1998 			      phy_interface_t interface)
1999 {
2000 	u32 flags = 0;
2001 
2002 	if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
2003 		    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
2004 		     phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
2005 		return -EINVAL;
2006 
2007 	if (pl->phydev)
2008 		return -EBUSY;
2009 
2010 	if (pl->config->mac_requires_rxc)
2011 		flags |= PHY_F_RXC_ALWAYS_ON;
2012 
2013 	return phy_attach_direct(pl->netdev, phy, flags, interface);
2014 }
2015 
2016 /**
2017  * phylink_connect_phy() - connect a PHY to the phylink instance
2018  * @pl: a pointer to a &struct phylink returned from phylink_create()
2019  * @phy: a pointer to a &struct phy_device.
2020  *
2021  * Connect @phy to the phylink instance specified by @pl by calling
2022  * phy_attach_direct(). Configure the @phy according to the MAC driver's
2023  * capabilities, start the PHYLIB state machine and enable any interrupts
2024  * that the PHY supports.
2025  *
2026  * This updates the phylink's ethtool supported and advertising link mode
2027  * masks.
2028  *
2029  * Returns 0 on success or a negative errno.
2030  */
phylink_connect_phy(struct phylink * pl,struct phy_device * phy)2031 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
2032 {
2033 	int ret;
2034 
2035 	/* Use PHY device/driver interface */
2036 	if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2037 		pl->link_interface = phy->interface;
2038 		pl->link_config.interface = pl->link_interface;
2039 	}
2040 
2041 	ret = phylink_attach_phy(pl, phy, pl->link_interface);
2042 	if (ret < 0)
2043 		return ret;
2044 
2045 	ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
2046 	if (ret)
2047 		phy_detach(phy);
2048 
2049 	return ret;
2050 }
2051 EXPORT_SYMBOL_GPL(phylink_connect_phy);
2052 
2053 /**
2054  * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
2055  * @pl: a pointer to a &struct phylink returned from phylink_create()
2056  * @dn: a pointer to a &struct device_node.
2057  * @flags: PHY-specific flags to communicate to the PHY device driver
2058  *
2059  * Connect the phy specified in the device node @dn to the phylink instance
2060  * specified by @pl. Actions specified in phylink_connect_phy() will be
2061  * performed.
2062  *
2063  * Returns 0 on success or a negative errno.
2064  */
phylink_of_phy_connect(struct phylink * pl,struct device_node * dn,u32 flags)2065 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
2066 			   u32 flags)
2067 {
2068 	return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
2069 }
2070 EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
2071 
2072 /**
2073  * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
2074  * @pl: a pointer to a &struct phylink returned from phylink_create()
2075  * @fwnode: a pointer to a &struct fwnode_handle.
2076  * @flags: PHY-specific flags to communicate to the PHY device driver
2077  *
2078  * Connect the phy specified @fwnode to the phylink instance specified
2079  * by @pl.
2080  *
2081  * Returns 0 on success or a negative errno.
2082  */
phylink_fwnode_phy_connect(struct phylink * pl,const struct fwnode_handle * fwnode,u32 flags)2083 int phylink_fwnode_phy_connect(struct phylink *pl,
2084 			       const struct fwnode_handle *fwnode,
2085 			       u32 flags)
2086 {
2087 	struct fwnode_handle *phy_fwnode;
2088 	struct phy_device *phy_dev;
2089 	int ret;
2090 
2091 	/* Fixed links and 802.3z are handled without needing a PHY */
2092 	if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
2093 	    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
2094 	     phy_interface_mode_is_8023z(pl->link_interface)))
2095 		return 0;
2096 
2097 	phy_fwnode = fwnode_get_phy_node(fwnode);
2098 	if (IS_ERR(phy_fwnode)) {
2099 		if (pl->cfg_link_an_mode == MLO_AN_PHY)
2100 			return -ENODEV;
2101 		return 0;
2102 	}
2103 
2104 	phy_dev = fwnode_phy_find_device(phy_fwnode);
2105 	/* We're done with the phy_node handle */
2106 	fwnode_handle_put(phy_fwnode);
2107 	if (!phy_dev)
2108 		return -ENODEV;
2109 
2110 	/* Use PHY device/driver interface */
2111 	if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2112 		pl->link_interface = phy_dev->interface;
2113 		pl->link_config.interface = pl->link_interface;
2114 	}
2115 
2116 	if (pl->config->mac_requires_rxc)
2117 		flags |= PHY_F_RXC_ALWAYS_ON;
2118 
2119 	ret = phy_attach_direct(pl->netdev, phy_dev, flags,
2120 				pl->link_interface);
2121 	phy_device_free(phy_dev);
2122 	if (ret)
2123 		return ret;
2124 
2125 	ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
2126 	if (ret)
2127 		phy_detach(phy_dev);
2128 
2129 	return ret;
2130 }
2131 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
2132 
2133 /**
2134  * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
2135  *   instance.
2136  * @pl: a pointer to a &struct phylink returned from phylink_create()
2137  *
2138  * Disconnect any current PHY from the phylink instance described by @pl.
2139  */
phylink_disconnect_phy(struct phylink * pl)2140 void phylink_disconnect_phy(struct phylink *pl)
2141 {
2142 	struct phy_device *phy;
2143 
2144 	ASSERT_RTNL();
2145 
2146 	phy = pl->phydev;
2147 	if (phy) {
2148 		mutex_lock(&phy->lock);
2149 		mutex_lock(&pl->state_mutex);
2150 		pl->phydev = NULL;
2151 		mutex_unlock(&pl->state_mutex);
2152 		mutex_unlock(&phy->lock);
2153 		flush_work(&pl->resolve);
2154 
2155 		phy_disconnect(phy);
2156 	}
2157 }
2158 EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
2159 
phylink_link_changed(struct phylink * pl,bool up,const char * what)2160 static void phylink_link_changed(struct phylink *pl, bool up, const char *what)
2161 {
2162 	if (!up)
2163 		pl->link_failed = true;
2164 	phylink_run_resolve(pl);
2165 	phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down");
2166 }
2167 
2168 /**
2169  * phylink_mac_change() - notify phylink of a change in MAC state
2170  * @pl: a pointer to a &struct phylink returned from phylink_create()
2171  * @up: indicates whether the link is currently up.
2172  *
2173  * The MAC driver should call this driver when the state of its link
2174  * changes (eg, link failure, new negotiation results, etc.)
2175  */
phylink_mac_change(struct phylink * pl,bool up)2176 void phylink_mac_change(struct phylink *pl, bool up)
2177 {
2178 	phylink_link_changed(pl, up, "mac");
2179 }
2180 EXPORT_SYMBOL_GPL(phylink_mac_change);
2181 
2182 /**
2183  * phylink_pcs_change() - notify phylink of a change to PCS link state
2184  * @pcs: pointer to &struct phylink_pcs
2185  * @up: indicates whether the link is currently up.
2186  *
2187  * The PCS driver should call this when the state of its link changes
2188  * (e.g. link failure, new negotiation results, etc.) Note: it should
2189  * not determine "up" by reading the BMSR. If in doubt about the link
2190  * state at interrupt time, then pass true if pcs_get_state() returns
2191  * the latched link-down state, otherwise pass false.
2192  */
phylink_pcs_change(struct phylink_pcs * pcs,bool up)2193 void phylink_pcs_change(struct phylink_pcs *pcs, bool up)
2194 {
2195 	struct phylink *pl = pcs->phylink;
2196 
2197 	if (pl)
2198 		phylink_link_changed(pl, up, "pcs");
2199 }
2200 EXPORT_SYMBOL_GPL(phylink_pcs_change);
2201 
phylink_link_handler(int irq,void * data)2202 static irqreturn_t phylink_link_handler(int irq, void *data)
2203 {
2204 	struct phylink *pl = data;
2205 
2206 	phylink_run_resolve(pl);
2207 
2208 	return IRQ_HANDLED;
2209 }
2210 
2211 /**
2212  * phylink_start() - start a phylink instance
2213  * @pl: a pointer to a &struct phylink returned from phylink_create()
2214  *
2215  * Start the phylink instance specified by @pl, configuring the MAC for the
2216  * desired link mode(s) and negotiation style. This should be called from the
2217  * network device driver's &struct net_device_ops ndo_open() method.
2218  */
phylink_start(struct phylink * pl)2219 void phylink_start(struct phylink *pl)
2220 {
2221 	bool poll = false;
2222 
2223 	ASSERT_RTNL();
2224 
2225 	phylink_info(pl, "configuring for %s/%s link mode\n",
2226 		     phylink_an_mode_str(pl->cur_link_an_mode),
2227 		     phy_modes(pl->link_config.interface));
2228 
2229 	/* Always set the carrier off */
2230 	if (pl->netdev)
2231 		netif_carrier_off(pl->netdev);
2232 
2233 	pl->pcs_state = PCS_STATE_STARTING;
2234 
2235 	/* Apply the link configuration to the MAC when starting. This allows
2236 	 * a fixed-link to start with the correct parameters, and also
2237 	 * ensures that we set the appropriate advertisement for Serdes links.
2238 	 *
2239 	 * Restart autonegotiation if using 802.3z to ensure that the link
2240 	 * parameters are properly negotiated.  This is necessary for DSA
2241 	 * switches using 802.3z negotiation to ensure they see our modes.
2242 	 */
2243 	phylink_mac_initial_config(pl, true);
2244 
2245 	pl->pcs_state = PCS_STATE_STARTED;
2246 
2247 	phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
2248 
2249 	if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
2250 		int irq = gpiod_to_irq(pl->link_gpio);
2251 
2252 		if (irq > 0) {
2253 			if (!request_irq(irq, phylink_link_handler,
2254 					 IRQF_TRIGGER_RISING |
2255 					 IRQF_TRIGGER_FALLING,
2256 					 "netdev link", pl))
2257 				pl->link_irq = irq;
2258 			else
2259 				irq = 0;
2260 		}
2261 		if (irq <= 0)
2262 			poll = true;
2263 	}
2264 
2265 	if (pl->cfg_link_an_mode == MLO_AN_FIXED)
2266 		poll |= pl->config->poll_fixed_state;
2267 
2268 	if (poll)
2269 		mod_timer(&pl->link_poll, jiffies + HZ);
2270 	if (pl->phydev)
2271 		phy_start(pl->phydev);
2272 	if (pl->sfp_bus)
2273 		sfp_upstream_start(pl->sfp_bus);
2274 }
2275 EXPORT_SYMBOL_GPL(phylink_start);
2276 
2277 /**
2278  * phylink_stop() - stop a phylink instance
2279  * @pl: a pointer to a &struct phylink returned from phylink_create()
2280  *
2281  * Stop the phylink instance specified by @pl. This should be called from the
2282  * network device driver's &struct net_device_ops ndo_stop() method.  The
2283  * network device's carrier state should not be changed prior to calling this
2284  * function.
2285  *
2286  * This will synchronously bring down the link if the link is not already
2287  * down (in other words, it will trigger a mac_link_down() method call.)
2288  */
phylink_stop(struct phylink * pl)2289 void phylink_stop(struct phylink *pl)
2290 {
2291 	ASSERT_RTNL();
2292 
2293 	if (pl->sfp_bus)
2294 		sfp_upstream_stop(pl->sfp_bus);
2295 	if (pl->phydev)
2296 		phy_stop(pl->phydev);
2297 	del_timer_sync(&pl->link_poll);
2298 	if (pl->link_irq) {
2299 		free_irq(pl->link_irq, pl);
2300 		pl->link_irq = 0;
2301 	}
2302 
2303 	phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
2304 
2305 	pl->pcs_state = PCS_STATE_DOWN;
2306 
2307 	phylink_pcs_disable(pl->pcs);
2308 }
2309 EXPORT_SYMBOL_GPL(phylink_stop);
2310 
2311 /**
2312  * phylink_suspend() - handle a network device suspend event
2313  * @pl: a pointer to a &struct phylink returned from phylink_create()
2314  * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
2315  *
2316  * Handle a network device suspend event. There are several cases:
2317  *
2318  * - If Wake-on-Lan is not active, we can bring down the link between
2319  *   the MAC and PHY by calling phylink_stop().
2320  * - If Wake-on-Lan is active, and being handled only by the PHY, we
2321  *   can also bring down the link between the MAC and PHY.
2322  * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
2323  *   still needs to receive packets, so we can not bring the link down.
2324  */
phylink_suspend(struct phylink * pl,bool mac_wol)2325 void phylink_suspend(struct phylink *pl, bool mac_wol)
2326 {
2327 	ASSERT_RTNL();
2328 
2329 	if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) {
2330 		/* Wake-on-Lan enabled, MAC handling */
2331 		mutex_lock(&pl->state_mutex);
2332 
2333 		/* Stop the resolver bringing the link up */
2334 		__set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
2335 
2336 		/* Disable the carrier, to prevent transmit timeouts,
2337 		 * but one would hope all packets have been sent. This
2338 		 * also means phylink_resolve() will do nothing.
2339 		 */
2340 		if (pl->netdev)
2341 			netif_carrier_off(pl->netdev);
2342 		else
2343 			pl->old_link_state = false;
2344 
2345 		/* We do not call mac_link_down() here as we want the
2346 		 * link to remain up to receive the WoL packets.
2347 		 */
2348 		mutex_unlock(&pl->state_mutex);
2349 	} else {
2350 		phylink_stop(pl);
2351 	}
2352 }
2353 EXPORT_SYMBOL_GPL(phylink_suspend);
2354 
2355 /**
2356  * phylink_resume() - handle a network device resume event
2357  * @pl: a pointer to a &struct phylink returned from phylink_create()
2358  *
2359  * Undo the effects of phylink_suspend(), returning the link to an
2360  * operational state.
2361  */
phylink_resume(struct phylink * pl)2362 void phylink_resume(struct phylink *pl)
2363 {
2364 	ASSERT_RTNL();
2365 
2366 	if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
2367 		/* Wake-on-Lan enabled, MAC handling */
2368 
2369 		/* Call mac_link_down() so we keep the overall state balanced.
2370 		 * Do this under the state_mutex lock for consistency. This
2371 		 * will cause a "Link Down" message to be printed during
2372 		 * resume, which is harmless - the true link state will be
2373 		 * printed when we run a resolve.
2374 		 */
2375 		mutex_lock(&pl->state_mutex);
2376 		phylink_link_down(pl);
2377 		mutex_unlock(&pl->state_mutex);
2378 
2379 		/* Re-apply the link parameters so that all the settings get
2380 		 * restored to the MAC.
2381 		 */
2382 		phylink_mac_initial_config(pl, true);
2383 
2384 		/* Re-enable and re-resolve the link parameters */
2385 		phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
2386 	} else {
2387 		phylink_start(pl);
2388 	}
2389 }
2390 EXPORT_SYMBOL_GPL(phylink_resume);
2391 
2392 /**
2393  * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
2394  * @pl: a pointer to a &struct phylink returned from phylink_create()
2395  * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
2396  *
2397  * Read the wake on lan parameters from the PHY attached to the phylink
2398  * instance specified by @pl. If no PHY is currently attached, report no
2399  * support for wake on lan.
2400  */
phylink_ethtool_get_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2401 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2402 {
2403 	ASSERT_RTNL();
2404 
2405 	wol->supported = 0;
2406 	wol->wolopts = 0;
2407 
2408 	if (pl->phydev)
2409 		phy_ethtool_get_wol(pl->phydev, wol);
2410 }
2411 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
2412 
2413 /**
2414  * phylink_ethtool_set_wol() - set wake on lan parameters
2415  * @pl: a pointer to a &struct phylink returned from phylink_create()
2416  * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
2417  *
2418  * Set the wake on lan parameters for the PHY attached to the phylink
2419  * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
2420  * error.
2421  *
2422  * Returns zero on success or negative errno code.
2423  */
phylink_ethtool_set_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2424 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2425 {
2426 	int ret = -EOPNOTSUPP;
2427 
2428 	ASSERT_RTNL();
2429 
2430 	if (pl->phydev)
2431 		ret = phy_ethtool_set_wol(pl->phydev, wol);
2432 
2433 	return ret;
2434 }
2435 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
2436 
phylink_merge_link_mode(unsigned long * dst,const unsigned long * b)2437 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
2438 {
2439 	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
2440 
2441 	linkmode_zero(mask);
2442 	phylink_set_port_modes(mask);
2443 
2444 	linkmode_and(dst, dst, mask);
2445 	linkmode_or(dst, dst, b);
2446 }
2447 
phylink_get_ksettings(const struct phylink_link_state * state,struct ethtool_link_ksettings * kset)2448 static void phylink_get_ksettings(const struct phylink_link_state *state,
2449 				  struct ethtool_link_ksettings *kset)
2450 {
2451 	phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
2452 	linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
2453 	if (kset->base.rate_matching == RATE_MATCH_NONE) {
2454 		kset->base.speed = state->speed;
2455 		kset->base.duplex = state->duplex;
2456 	}
2457 	kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2458 					       state->advertising) ?
2459 				AUTONEG_ENABLE : AUTONEG_DISABLE;
2460 }
2461 
2462 /**
2463  * phylink_ethtool_ksettings_get() - get the current link settings
2464  * @pl: a pointer to a &struct phylink returned from phylink_create()
2465  * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
2466  *
2467  * Read the current link settings for the phylink instance specified by @pl.
2468  * This will be the link settings read from the MAC, PHY or fixed link
2469  * settings depending on the current negotiation mode.
2470  */
phylink_ethtool_ksettings_get(struct phylink * pl,struct ethtool_link_ksettings * kset)2471 int phylink_ethtool_ksettings_get(struct phylink *pl,
2472 				  struct ethtool_link_ksettings *kset)
2473 {
2474 	struct phylink_link_state link_state;
2475 
2476 	ASSERT_RTNL();
2477 
2478 	if (pl->phydev)
2479 		phy_ethtool_ksettings_get(pl->phydev, kset);
2480 	else
2481 		kset->base.port = pl->link_port;
2482 
2483 	linkmode_copy(kset->link_modes.supported, pl->supported);
2484 
2485 	switch (pl->cur_link_an_mode) {
2486 	case MLO_AN_FIXED:
2487 		/* We are using fixed settings. Report these as the
2488 		 * current link settings - and note that these also
2489 		 * represent the supported speeds/duplex/pause modes.
2490 		 */
2491 		phylink_get_fixed_state(pl, &link_state);
2492 		phylink_get_ksettings(&link_state, kset);
2493 		break;
2494 
2495 	case MLO_AN_INBAND:
2496 		/* If there is a phy attached, then use the reported
2497 		 * settings from the phy with no modification.
2498 		 */
2499 		if (pl->phydev)
2500 			break;
2501 
2502 		phylink_mac_pcs_get_state(pl, &link_state);
2503 
2504 		/* The MAC is reporting the link results from its own PCS
2505 		 * layer via in-band status. Report these as the current
2506 		 * link settings.
2507 		 */
2508 		phylink_get_ksettings(&link_state, kset);
2509 		break;
2510 	}
2511 
2512 	return 0;
2513 }
2514 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
2515 
2516 /**
2517  * phylink_ethtool_ksettings_set() - set the link settings
2518  * @pl: a pointer to a &struct phylink returned from phylink_create()
2519  * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
2520  */
phylink_ethtool_ksettings_set(struct phylink * pl,const struct ethtool_link_ksettings * kset)2521 int phylink_ethtool_ksettings_set(struct phylink *pl,
2522 				  const struct ethtool_link_ksettings *kset)
2523 {
2524 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2525 	struct phylink_link_state config;
2526 	const struct phy_setting *s;
2527 
2528 	ASSERT_RTNL();
2529 
2530 	if (pl->phydev) {
2531 		struct ethtool_link_ksettings phy_kset = *kset;
2532 
2533 		linkmode_and(phy_kset.link_modes.advertising,
2534 			     phy_kset.link_modes.advertising,
2535 			     pl->supported);
2536 
2537 		/* We can rely on phylib for this update; we also do not need
2538 		 * to update the pl->link_config settings:
2539 		 * - the configuration returned via ksettings_get() will come
2540 		 *   from phylib whenever a PHY is present.
2541 		 * - link_config.interface will be updated by the PHY calling
2542 		 *   back via phylink_phy_change() and a subsequent resolve.
2543 		 * - initial link configuration for PHY mode comes from the
2544 		 *   last phy state updated via phylink_phy_change().
2545 		 * - other configuration changes (e.g. pause modes) are
2546 		 *   performed directly via phylib.
2547 		 * - if in in-band mode with a PHY, the link configuration
2548 		 *   is passed on the link from the PHY, and all of
2549 		 *   link_config.{speed,duplex,an_enabled,pause} are not used.
2550 		 * - the only possible use would be link_config.advertising
2551 		 *   pause modes when in 1000base-X mode with a PHY, but in
2552 		 *   the presence of a PHY, this should not be changed as that
2553 		 *   should be determined from the media side advertisement.
2554 		 */
2555 		return phy_ethtool_ksettings_set(pl->phydev, &phy_kset);
2556 	}
2557 
2558 	config = pl->link_config;
2559 	/* Mask out unsupported advertisements */
2560 	linkmode_and(config.advertising, kset->link_modes.advertising,
2561 		     pl->supported);
2562 
2563 	/* FIXME: should we reject autoneg if phy/mac does not support it? */
2564 	switch (kset->base.autoneg) {
2565 	case AUTONEG_DISABLE:
2566 		/* Autonegotiation disabled, select a suitable speed and
2567 		 * duplex.
2568 		 */
2569 		s = phy_lookup_setting(kset->base.speed, kset->base.duplex,
2570 				       pl->supported, false);
2571 		if (!s)
2572 			return -EINVAL;
2573 
2574 		/* If we have a fixed link, refuse to change link parameters.
2575 		 * If the link parameters match, accept them but do nothing.
2576 		 */
2577 		if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2578 			if (s->speed != pl->link_config.speed ||
2579 			    s->duplex != pl->link_config.duplex)
2580 				return -EINVAL;
2581 			return 0;
2582 		}
2583 
2584 		config.speed = s->speed;
2585 		config.duplex = s->duplex;
2586 		break;
2587 
2588 	case AUTONEG_ENABLE:
2589 		/* If we have a fixed link, allow autonegotiation (since that
2590 		 * is our default case) but do not allow the advertisement to
2591 		 * be changed. If the advertisement matches, simply return.
2592 		 */
2593 		if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2594 			if (!linkmode_equal(config.advertising,
2595 					    pl->link_config.advertising))
2596 				return -EINVAL;
2597 			return 0;
2598 		}
2599 
2600 		config.speed = SPEED_UNKNOWN;
2601 		config.duplex = DUPLEX_UNKNOWN;
2602 		break;
2603 
2604 	default:
2605 		return -EINVAL;
2606 	}
2607 
2608 	/* We have ruled out the case with a PHY attached, and the
2609 	 * fixed-link cases.  All that is left are in-band links.
2610 	 */
2611 	linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
2612 			 kset->base.autoneg == AUTONEG_ENABLE);
2613 
2614 	/* If this link is with an SFP, ensure that changes to advertised modes
2615 	 * also cause the associated interface to be selected such that the
2616 	 * link can be configured correctly.
2617 	 */
2618 	if (pl->sfp_bus) {
2619 		config.interface = sfp_select_interface(pl->sfp_bus,
2620 							config.advertising);
2621 		if (config.interface == PHY_INTERFACE_MODE_NA) {
2622 			phylink_err(pl,
2623 				    "selection of interface failed, advertisement %*pb\n",
2624 				    __ETHTOOL_LINK_MODE_MASK_NBITS,
2625 				    config.advertising);
2626 			return -EINVAL;
2627 		}
2628 
2629 		/* Revalidate with the selected interface */
2630 		linkmode_copy(support, pl->supported);
2631 		if (phylink_validate(pl, support, &config)) {
2632 			phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
2633 				    phylink_an_mode_str(pl->cur_link_an_mode),
2634 				    phy_modes(config.interface),
2635 				    __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2636 			return -EINVAL;
2637 		}
2638 	} else {
2639 		/* Validate without changing the current supported mask. */
2640 		linkmode_copy(support, pl->supported);
2641 		if (phylink_validate(pl, support, &config))
2642 			return -EINVAL;
2643 	}
2644 
2645 	/* If autonegotiation is enabled, we must have an advertisement */
2646 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2647 			      config.advertising) &&
2648 	    phylink_is_empty_linkmode(config.advertising))
2649 		return -EINVAL;
2650 
2651 	mutex_lock(&pl->state_mutex);
2652 	pl->link_config.speed = config.speed;
2653 	pl->link_config.duplex = config.duplex;
2654 
2655 	if (pl->link_config.interface != config.interface) {
2656 		/* The interface changed, e.g. 1000base-X <-> 2500base-X */
2657 		/* We need to force the link down, then change the interface */
2658 		if (pl->old_link_state) {
2659 			phylink_link_down(pl);
2660 			pl->old_link_state = false;
2661 		}
2662 		if (!test_bit(PHYLINK_DISABLE_STOPPED,
2663 			      &pl->phylink_disable_state))
2664 			phylink_major_config(pl, false, &config);
2665 		pl->link_config.interface = config.interface;
2666 		linkmode_copy(pl->link_config.advertising, config.advertising);
2667 	} else if (!linkmode_equal(pl->link_config.advertising,
2668 				   config.advertising)) {
2669 		linkmode_copy(pl->link_config.advertising, config.advertising);
2670 		phylink_change_inband_advert(pl);
2671 	}
2672 	mutex_unlock(&pl->state_mutex);
2673 
2674 	return 0;
2675 }
2676 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
2677 
2678 /**
2679  * phylink_ethtool_nway_reset() - restart negotiation
2680  * @pl: a pointer to a &struct phylink returned from phylink_create()
2681  *
2682  * Restart negotiation for the phylink instance specified by @pl. This will
2683  * cause any attached phy to restart negotiation with the link partner, and
2684  * if the MAC is in a BaseX mode, the MAC will also be requested to restart
2685  * negotiation.
2686  *
2687  * Returns zero on success, or negative error code.
2688  */
phylink_ethtool_nway_reset(struct phylink * pl)2689 int phylink_ethtool_nway_reset(struct phylink *pl)
2690 {
2691 	int ret = 0;
2692 
2693 	ASSERT_RTNL();
2694 
2695 	if (pl->phydev)
2696 		ret = phy_restart_aneg(pl->phydev);
2697 	phylink_pcs_an_restart(pl);
2698 
2699 	return ret;
2700 }
2701 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
2702 
2703 /**
2704  * phylink_ethtool_get_pauseparam() - get the current pause parameters
2705  * @pl: a pointer to a &struct phylink returned from phylink_create()
2706  * @pause: a pointer to a &struct ethtool_pauseparam
2707  */
phylink_ethtool_get_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)2708 void phylink_ethtool_get_pauseparam(struct phylink *pl,
2709 				    struct ethtool_pauseparam *pause)
2710 {
2711 	ASSERT_RTNL();
2712 
2713 	pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
2714 	pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
2715 	pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
2716 }
2717 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
2718 
2719 /**
2720  * phylink_ethtool_set_pauseparam() - set the current pause parameters
2721  * @pl: a pointer to a &struct phylink returned from phylink_create()
2722  * @pause: a pointer to a &struct ethtool_pauseparam
2723  */
phylink_ethtool_set_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)2724 int phylink_ethtool_set_pauseparam(struct phylink *pl,
2725 				   struct ethtool_pauseparam *pause)
2726 {
2727 	struct phylink_link_state *config = &pl->link_config;
2728 	bool manual_changed;
2729 	int pause_state;
2730 
2731 	ASSERT_RTNL();
2732 
2733 	if (pl->cur_link_an_mode == MLO_AN_FIXED)
2734 		return -EOPNOTSUPP;
2735 
2736 	if (!phylink_test(pl->supported, Pause) &&
2737 	    !phylink_test(pl->supported, Asym_Pause))
2738 		return -EOPNOTSUPP;
2739 
2740 	if (!phylink_test(pl->supported, Asym_Pause) &&
2741 	    pause->rx_pause != pause->tx_pause)
2742 		return -EINVAL;
2743 
2744 	pause_state = 0;
2745 	if (pause->autoneg)
2746 		pause_state |= MLO_PAUSE_AN;
2747 	if (pause->rx_pause)
2748 		pause_state |= MLO_PAUSE_RX;
2749 	if (pause->tx_pause)
2750 		pause_state |= MLO_PAUSE_TX;
2751 
2752 	mutex_lock(&pl->state_mutex);
2753 	/*
2754 	 * See the comments for linkmode_set_pause(), wrt the deficiencies
2755 	 * with the current implementation.  A solution to this issue would
2756 	 * be:
2757 	 * ethtool  Local device
2758 	 *  rx  tx  Pause AsymDir
2759 	 *  0   0   0     0
2760 	 *  1   0   1     1
2761 	 *  0   1   0     1
2762 	 *  1   1   1     1
2763 	 * and then use the ethtool rx/tx enablement status to mask the
2764 	 * rx/tx pause resolution.
2765 	 */
2766 	linkmode_set_pause(config->advertising, pause->tx_pause,
2767 			   pause->rx_pause);
2768 
2769 	manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
2770 			 (!(pause_state & MLO_PAUSE_AN) &&
2771 			   (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
2772 
2773 	config->pause = pause_state;
2774 
2775 	/* Update our in-band advertisement, triggering a renegotiation if
2776 	 * the advertisement changed.
2777 	 */
2778 	if (!pl->phydev)
2779 		phylink_change_inband_advert(pl);
2780 
2781 	mutex_unlock(&pl->state_mutex);
2782 
2783 	/* If we have a PHY, a change of the pause frame advertisement will
2784 	 * cause phylib to renegotiate (if AN is enabled) which will in turn
2785 	 * call our phylink_phy_change() and trigger a resolve.  Note that
2786 	 * we can't hold our state mutex while calling phy_set_asym_pause().
2787 	 */
2788 	if (pl->phydev)
2789 		phy_set_asym_pause(pl->phydev, pause->rx_pause,
2790 				   pause->tx_pause);
2791 
2792 	/* If the manual pause settings changed, make sure we trigger a
2793 	 * resolve to update their state; we can not guarantee that the
2794 	 * link will cycle.
2795 	 */
2796 	if (manual_changed) {
2797 		pl->link_failed = true;
2798 		phylink_run_resolve(pl);
2799 	}
2800 
2801 	return 0;
2802 }
2803 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
2804 
2805 /**
2806  * phylink_get_eee_err() - read the energy efficient ethernet error
2807  *   counter
2808  * @pl: a pointer to a &struct phylink returned from phylink_create().
2809  *
2810  * Read the Energy Efficient Ethernet error counter from the PHY associated
2811  * with the phylink instance specified by @pl.
2812  *
2813  * Returns positive error counter value, or negative error code.
2814  */
phylink_get_eee_err(struct phylink * pl)2815 int phylink_get_eee_err(struct phylink *pl)
2816 {
2817 	int ret = 0;
2818 
2819 	ASSERT_RTNL();
2820 
2821 	if (pl->phydev)
2822 		ret = phy_get_eee_err(pl->phydev);
2823 
2824 	return ret;
2825 }
2826 EXPORT_SYMBOL_GPL(phylink_get_eee_err);
2827 
2828 /**
2829  * phylink_init_eee() - init and check the EEE features
2830  * @pl: a pointer to a &struct phylink returned from phylink_create()
2831  * @clk_stop_enable: allow PHY to stop receive clock
2832  *
2833  * Must be called either with RTNL held or within mac_link_up()
2834  */
phylink_init_eee(struct phylink * pl,bool clk_stop_enable)2835 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
2836 {
2837 	int ret = -EOPNOTSUPP;
2838 
2839 	if (pl->phydev)
2840 		ret = phy_init_eee(pl->phydev, clk_stop_enable);
2841 
2842 	return ret;
2843 }
2844 EXPORT_SYMBOL_GPL(phylink_init_eee);
2845 
2846 /**
2847  * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
2848  * @pl: a pointer to a &struct phylink returned from phylink_create()
2849  * @eee: a pointer to a &struct ethtool_keee for the read parameters
2850  */
phylink_ethtool_get_eee(struct phylink * pl,struct ethtool_keee * eee)2851 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee)
2852 {
2853 	int ret = -EOPNOTSUPP;
2854 
2855 	ASSERT_RTNL();
2856 
2857 	if (pl->phydev)
2858 		ret = phy_ethtool_get_eee(pl->phydev, eee);
2859 
2860 	return ret;
2861 }
2862 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
2863 
2864 /**
2865  * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
2866  * @pl: a pointer to a &struct phylink returned from phylink_create()
2867  * @eee: a pointer to a &struct ethtool_keee for the desired parameters
2868  */
phylink_ethtool_set_eee(struct phylink * pl,struct ethtool_keee * eee)2869 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee)
2870 {
2871 	int ret = -EOPNOTSUPP;
2872 
2873 	ASSERT_RTNL();
2874 
2875 	if (pl->phydev)
2876 		ret = phy_ethtool_set_eee(pl->phydev, eee);
2877 
2878 	return ret;
2879 }
2880 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
2881 
2882 /* This emulates MII registers for a fixed-mode phy operating as per the
2883  * passed in state. "aneg" defines if we report negotiation is possible.
2884  *
2885  * FIXME: should deal with negotiation state too.
2886  */
phylink_mii_emul_read(unsigned int reg,struct phylink_link_state * state)2887 static int phylink_mii_emul_read(unsigned int reg,
2888 				 struct phylink_link_state *state)
2889 {
2890 	struct fixed_phy_status fs;
2891 	unsigned long *lpa = state->lp_advertising;
2892 	int val;
2893 
2894 	fs.link = state->link;
2895 	fs.speed = state->speed;
2896 	fs.duplex = state->duplex;
2897 	fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
2898 	fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
2899 
2900 	val = swphy_read_reg(reg, &fs);
2901 	if (reg == MII_BMSR) {
2902 		if (!state->an_complete)
2903 			val &= ~BMSR_ANEGCOMPLETE;
2904 	}
2905 	return val;
2906 }
2907 
phylink_phy_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)2908 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
2909 			    unsigned int reg)
2910 {
2911 	struct phy_device *phydev = pl->phydev;
2912 	int prtad, devad;
2913 
2914 	if (mdio_phy_id_is_c45(phy_id)) {
2915 		prtad = mdio_phy_id_prtad(phy_id);
2916 		devad = mdio_phy_id_devad(phy_id);
2917 		return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2918 					reg);
2919 	}
2920 
2921 	if (phydev->is_c45) {
2922 		switch (reg) {
2923 		case MII_BMCR:
2924 		case MII_BMSR:
2925 		case MII_PHYSID1:
2926 		case MII_PHYSID2:
2927 			devad = __ffs(phydev->c45_ids.mmds_present);
2928 			break;
2929 		case MII_ADVERTISE:
2930 		case MII_LPA:
2931 			if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2932 				return -EINVAL;
2933 			devad = MDIO_MMD_AN;
2934 			if (reg == MII_ADVERTISE)
2935 				reg = MDIO_AN_ADVERTISE;
2936 			else
2937 				reg = MDIO_AN_LPA;
2938 			break;
2939 		default:
2940 			return -EINVAL;
2941 		}
2942 		prtad = phy_id;
2943 		return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2944 					reg);
2945 	}
2946 
2947 	return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
2948 }
2949 
phylink_phy_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)2950 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
2951 			     unsigned int reg, unsigned int val)
2952 {
2953 	struct phy_device *phydev = pl->phydev;
2954 	int prtad, devad;
2955 
2956 	if (mdio_phy_id_is_c45(phy_id)) {
2957 		prtad = mdio_phy_id_prtad(phy_id);
2958 		devad = mdio_phy_id_devad(phy_id);
2959 		return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
2960 					 reg, val);
2961 	}
2962 
2963 	if (phydev->is_c45) {
2964 		switch (reg) {
2965 		case MII_BMCR:
2966 		case MII_BMSR:
2967 		case MII_PHYSID1:
2968 		case MII_PHYSID2:
2969 			devad = __ffs(phydev->c45_ids.mmds_present);
2970 			break;
2971 		case MII_ADVERTISE:
2972 		case MII_LPA:
2973 			if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2974 				return -EINVAL;
2975 			devad = MDIO_MMD_AN;
2976 			if (reg == MII_ADVERTISE)
2977 				reg = MDIO_AN_ADVERTISE;
2978 			else
2979 				reg = MDIO_AN_LPA;
2980 			break;
2981 		default:
2982 			return -EINVAL;
2983 		}
2984 		return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
2985 					 reg, val);
2986 	}
2987 
2988 	return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
2989 }
2990 
phylink_mii_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)2991 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
2992 			    unsigned int reg)
2993 {
2994 	struct phylink_link_state state;
2995 	int val = 0xffff;
2996 
2997 	switch (pl->cur_link_an_mode) {
2998 	case MLO_AN_FIXED:
2999 		if (phy_id == 0) {
3000 			phylink_get_fixed_state(pl, &state);
3001 			val = phylink_mii_emul_read(reg, &state);
3002 		}
3003 		break;
3004 
3005 	case MLO_AN_PHY:
3006 		return -EOPNOTSUPP;
3007 
3008 	case MLO_AN_INBAND:
3009 		if (phy_id == 0) {
3010 			phylink_mac_pcs_get_state(pl, &state);
3011 			val = phylink_mii_emul_read(reg, &state);
3012 		}
3013 		break;
3014 	}
3015 
3016 	return val & 0xffff;
3017 }
3018 
phylink_mii_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)3019 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
3020 			     unsigned int reg, unsigned int val)
3021 {
3022 	switch (pl->cur_link_an_mode) {
3023 	case MLO_AN_FIXED:
3024 		break;
3025 
3026 	case MLO_AN_PHY:
3027 		return -EOPNOTSUPP;
3028 
3029 	case MLO_AN_INBAND:
3030 		break;
3031 	}
3032 
3033 	return 0;
3034 }
3035 
3036 /**
3037  * phylink_mii_ioctl() - generic mii ioctl interface
3038  * @pl: a pointer to a &struct phylink returned from phylink_create()
3039  * @ifr: a pointer to a &struct ifreq for socket ioctls
3040  * @cmd: ioctl cmd to execute
3041  *
3042  * Perform the specified MII ioctl on the PHY attached to the phylink instance
3043  * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
3044  *
3045  * Returns: zero on success or negative error code.
3046  *
3047  * %SIOCGMIIPHY:
3048  *  read register from the current PHY.
3049  * %SIOCGMIIREG:
3050  *  read register from the specified PHY.
3051  * %SIOCSMIIREG:
3052  *  set a register on the specified PHY.
3053  */
phylink_mii_ioctl(struct phylink * pl,struct ifreq * ifr,int cmd)3054 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
3055 {
3056 	struct mii_ioctl_data *mii = if_mii(ifr);
3057 	int  ret;
3058 
3059 	ASSERT_RTNL();
3060 
3061 	if (pl->phydev) {
3062 		/* PHYs only exist for MLO_AN_PHY and SGMII */
3063 		switch (cmd) {
3064 		case SIOCGMIIPHY:
3065 			mii->phy_id = pl->phydev->mdio.addr;
3066 			fallthrough;
3067 
3068 		case SIOCGMIIREG:
3069 			ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
3070 			if (ret >= 0) {
3071 				mii->val_out = ret;
3072 				ret = 0;
3073 			}
3074 			break;
3075 
3076 		case SIOCSMIIREG:
3077 			ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
3078 						mii->val_in);
3079 			break;
3080 
3081 		default:
3082 			ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
3083 			break;
3084 		}
3085 	} else {
3086 		switch (cmd) {
3087 		case SIOCGMIIPHY:
3088 			mii->phy_id = 0;
3089 			fallthrough;
3090 
3091 		case SIOCGMIIREG:
3092 			ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
3093 			if (ret >= 0) {
3094 				mii->val_out = ret;
3095 				ret = 0;
3096 			}
3097 			break;
3098 
3099 		case SIOCSMIIREG:
3100 			ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
3101 						mii->val_in);
3102 			break;
3103 
3104 		default:
3105 			ret = -EOPNOTSUPP;
3106 			break;
3107 		}
3108 	}
3109 
3110 	return ret;
3111 }
3112 EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
3113 
3114 /**
3115  * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
3116  *   link partners
3117  * @pl: a pointer to a &struct phylink returned from phylink_create()
3118  * @sync: perform action synchronously
3119  *
3120  * If we have a PHY that is not part of a SFP module, then set the speed
3121  * as described in the phy_speed_down() function. Please see this function
3122  * for a description of the @sync parameter.
3123  *
3124  * Returns zero if there is no PHY, otherwise as per phy_speed_down().
3125  */
phylink_speed_down(struct phylink * pl,bool sync)3126 int phylink_speed_down(struct phylink *pl, bool sync)
3127 {
3128 	int ret = 0;
3129 
3130 	ASSERT_RTNL();
3131 
3132 	if (!pl->sfp_bus && pl->phydev)
3133 		ret = phy_speed_down(pl->phydev, sync);
3134 
3135 	return ret;
3136 }
3137 EXPORT_SYMBOL_GPL(phylink_speed_down);
3138 
3139 /**
3140  * phylink_speed_up() - restore the advertised speeds prior to the call to
3141  *   phylink_speed_down()
3142  * @pl: a pointer to a &struct phylink returned from phylink_create()
3143  *
3144  * If we have a PHY that is not part of a SFP module, then restore the
3145  * PHY speeds as per phy_speed_up().
3146  *
3147  * Returns zero if there is no PHY, otherwise as per phy_speed_up().
3148  */
phylink_speed_up(struct phylink * pl)3149 int phylink_speed_up(struct phylink *pl)
3150 {
3151 	int ret = 0;
3152 
3153 	ASSERT_RTNL();
3154 
3155 	if (!pl->sfp_bus && pl->phydev)
3156 		ret = phy_speed_up(pl->phydev);
3157 
3158 	return ret;
3159 }
3160 EXPORT_SYMBOL_GPL(phylink_speed_up);
3161 
phylink_sfp_attach(void * upstream,struct sfp_bus * bus)3162 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
3163 {
3164 	struct phylink *pl = upstream;
3165 
3166 	pl->netdev->sfp_bus = bus;
3167 }
3168 
phylink_sfp_detach(void * upstream,struct sfp_bus * bus)3169 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
3170 {
3171 	struct phylink *pl = upstream;
3172 
3173 	pl->netdev->sfp_bus = NULL;
3174 }
3175 
phylink_choose_sfp_interface(struct phylink * pl,const unsigned long * intf)3176 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
3177 						    const unsigned long *intf)
3178 {
3179 	phy_interface_t interface;
3180 	size_t i;
3181 
3182 	interface = PHY_INTERFACE_MODE_NA;
3183 	for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
3184 		if (test_bit(phylink_sfp_interface_preference[i], intf)) {
3185 			interface = phylink_sfp_interface_preference[i];
3186 			break;
3187 		}
3188 
3189 	return interface;
3190 }
3191 
phylink_sfp_set_config(struct phylink * pl,u8 mode,unsigned long * supported,struct phylink_link_state * state)3192 static void phylink_sfp_set_config(struct phylink *pl, u8 mode,
3193 				   unsigned long *supported,
3194 				   struct phylink_link_state *state)
3195 {
3196 	bool changed = false;
3197 
3198 	phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
3199 		    phylink_an_mode_str(mode), phy_modes(state->interface),
3200 		    __ETHTOOL_LINK_MODE_MASK_NBITS, supported);
3201 
3202 	if (!linkmode_equal(pl->supported, supported)) {
3203 		linkmode_copy(pl->supported, supported);
3204 		changed = true;
3205 	}
3206 
3207 	if (!linkmode_equal(pl->link_config.advertising, state->advertising)) {
3208 		linkmode_copy(pl->link_config.advertising, state->advertising);
3209 		changed = true;
3210 	}
3211 
3212 	if (pl->cur_link_an_mode != mode ||
3213 	    pl->link_config.interface != state->interface) {
3214 		pl->cur_link_an_mode = mode;
3215 		pl->link_config.interface = state->interface;
3216 
3217 		changed = true;
3218 
3219 		phylink_info(pl, "switched to %s/%s link mode\n",
3220 			     phylink_an_mode_str(mode),
3221 			     phy_modes(state->interface));
3222 	}
3223 
3224 	if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
3225 				 &pl->phylink_disable_state))
3226 		phylink_mac_initial_config(pl, false);
3227 }
3228 
phylink_sfp_config_phy(struct phylink * pl,u8 mode,struct phy_device * phy)3229 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode,
3230 				  struct phy_device *phy)
3231 {
3232 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support1);
3233 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3234 	struct phylink_link_state config;
3235 	phy_interface_t iface;
3236 	int ret;
3237 
3238 	linkmode_copy(support, phy->supported);
3239 
3240 	memset(&config, 0, sizeof(config));
3241 	linkmode_copy(config.advertising, phy->advertising);
3242 	config.interface = PHY_INTERFACE_MODE_NA;
3243 	config.speed = SPEED_UNKNOWN;
3244 	config.duplex = DUPLEX_UNKNOWN;
3245 	config.pause = MLO_PAUSE_AN;
3246 
3247 	/* Ignore errors if we're expecting a PHY to attach later */
3248 	ret = phylink_validate(pl, support, &config);
3249 	if (ret) {
3250 		phylink_err(pl, "validation with support %*pb failed: %pe\n",
3251 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3252 			    ERR_PTR(ret));
3253 		return ret;
3254 	}
3255 
3256 	iface = sfp_select_interface(pl->sfp_bus, config.advertising);
3257 	if (iface == PHY_INTERFACE_MODE_NA) {
3258 		phylink_err(pl,
3259 			    "selection of interface failed, advertisement %*pb\n",
3260 			    __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising);
3261 		return -EINVAL;
3262 	}
3263 
3264 	config.interface = iface;
3265 	linkmode_copy(support1, support);
3266 	ret = phylink_validate(pl, support1, &config);
3267 	if (ret) {
3268 		phylink_err(pl,
3269 			    "validation of %s/%s with support %*pb failed: %pe\n",
3270 			    phylink_an_mode_str(mode),
3271 			    phy_modes(config.interface),
3272 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3273 			    ERR_PTR(ret));
3274 		return ret;
3275 	}
3276 
3277 	pl->link_port = pl->sfp_port;
3278 
3279 	phylink_sfp_set_config(pl, mode, support, &config);
3280 
3281 	return 0;
3282 }
3283 
phylink_sfp_config_optical(struct phylink * pl)3284 static int phylink_sfp_config_optical(struct phylink *pl)
3285 {
3286 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3287 	DECLARE_PHY_INTERFACE_MASK(interfaces);
3288 	struct phylink_link_state config;
3289 	phy_interface_t interface;
3290 	int ret;
3291 
3292 	phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
3293 		    (int)PHY_INTERFACE_MODE_MAX,
3294 		    pl->config->supported_interfaces,
3295 		    (int)PHY_INTERFACE_MODE_MAX,
3296 		    pl->sfp_interfaces);
3297 
3298 	/* Find the union of the supported interfaces by the PCS/MAC and
3299 	 * the SFP module.
3300 	 */
3301 	phy_interface_and(interfaces, pl->config->supported_interfaces,
3302 			  pl->sfp_interfaces);
3303 	if (phy_interface_empty(interfaces)) {
3304 		phylink_err(pl, "unsupported SFP module: no common interface modes\n");
3305 		return -EINVAL;
3306 	}
3307 
3308 	memset(&config, 0, sizeof(config));
3309 	linkmode_copy(support, pl->sfp_support);
3310 	linkmode_copy(config.advertising, pl->sfp_support);
3311 	config.speed = SPEED_UNKNOWN;
3312 	config.duplex = DUPLEX_UNKNOWN;
3313 	config.pause = MLO_PAUSE_AN;
3314 
3315 	/* For all the interfaces that are supported, reduce the sfp_support
3316 	 * mask to only those link modes that can be supported.
3317 	 */
3318 	ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config,
3319 				    interfaces);
3320 	if (ret) {
3321 		phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
3322 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support);
3323 		return ret;
3324 	}
3325 
3326 	interface = phylink_choose_sfp_interface(pl, interfaces);
3327 	if (interface == PHY_INTERFACE_MODE_NA) {
3328 		phylink_err(pl, "failed to select SFP interface\n");
3329 		return -EINVAL;
3330 	}
3331 
3332 	phylink_dbg(pl, "optical SFP: chosen %s interface\n",
3333 		    phy_modes(interface));
3334 
3335 	config.interface = interface;
3336 
3337 	/* Ignore errors if we're expecting a PHY to attach later */
3338 	ret = phylink_validate(pl, support, &config);
3339 	if (ret) {
3340 		phylink_err(pl, "validation with support %*pb failed: %pe\n",
3341 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3342 			    ERR_PTR(ret));
3343 		return ret;
3344 	}
3345 
3346 	pl->link_port = pl->sfp_port;
3347 
3348 	phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config);
3349 
3350 	return 0;
3351 }
3352 
phylink_sfp_module_insert(void * upstream,const struct sfp_eeprom_id * id)3353 static int phylink_sfp_module_insert(void *upstream,
3354 				     const struct sfp_eeprom_id *id)
3355 {
3356 	struct phylink *pl = upstream;
3357 
3358 	ASSERT_RTNL();
3359 
3360 	linkmode_zero(pl->sfp_support);
3361 	phy_interface_zero(pl->sfp_interfaces);
3362 	sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces);
3363 	pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support);
3364 
3365 	/* If this module may have a PHY connecting later, defer until later */
3366 	pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
3367 	if (pl->sfp_may_have_phy)
3368 		return 0;
3369 
3370 	return phylink_sfp_config_optical(pl);
3371 }
3372 
phylink_sfp_module_start(void * upstream)3373 static int phylink_sfp_module_start(void *upstream)
3374 {
3375 	struct phylink *pl = upstream;
3376 
3377 	/* If this SFP module has a PHY, start the PHY now. */
3378 	if (pl->phydev) {
3379 		phy_start(pl->phydev);
3380 		return 0;
3381 	}
3382 
3383 	/* If the module may have a PHY but we didn't detect one we
3384 	 * need to configure the MAC here.
3385 	 */
3386 	if (!pl->sfp_may_have_phy)
3387 		return 0;
3388 
3389 	return phylink_sfp_config_optical(pl);
3390 }
3391 
phylink_sfp_module_stop(void * upstream)3392 static void phylink_sfp_module_stop(void *upstream)
3393 {
3394 	struct phylink *pl = upstream;
3395 
3396 	/* If this SFP module has a PHY, stop it. */
3397 	if (pl->phydev)
3398 		phy_stop(pl->phydev);
3399 }
3400 
phylink_sfp_link_down(void * upstream)3401 static void phylink_sfp_link_down(void *upstream)
3402 {
3403 	struct phylink *pl = upstream;
3404 
3405 	ASSERT_RTNL();
3406 
3407 	phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
3408 }
3409 
phylink_sfp_link_up(void * upstream)3410 static void phylink_sfp_link_up(void *upstream)
3411 {
3412 	struct phylink *pl = upstream;
3413 
3414 	ASSERT_RTNL();
3415 
3416 	phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
3417 }
3418 
3419 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
3420  * or 802.3z control word, so inband will not work.
3421  */
phylink_phy_no_inband(struct phy_device * phy)3422 static bool phylink_phy_no_inband(struct phy_device *phy)
3423 {
3424 	return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1],
3425 					     0xae025150, 0xfffffff0);
3426 }
3427 
phylink_sfp_connect_phy(void * upstream,struct phy_device * phy)3428 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
3429 {
3430 	struct phylink *pl = upstream;
3431 	phy_interface_t interface;
3432 	u8 mode;
3433 	int ret;
3434 
3435 	/*
3436 	 * This is the new way of dealing with flow control for PHYs,
3437 	 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
3438 	 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
3439 	 * using our validate call to the MAC, we rely upon the MAC
3440 	 * clearing the bits from both supported and advertising fields.
3441 	 */
3442 	phy_support_asym_pause(phy);
3443 
3444 	if (phylink_phy_no_inband(phy))
3445 		mode = MLO_AN_PHY;
3446 	else
3447 		mode = MLO_AN_INBAND;
3448 
3449 	/* Set the PHY's host supported interfaces */
3450 	phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
3451 			  pl->config->supported_interfaces);
3452 
3453 	/* Do the initial configuration */
3454 	ret = phylink_sfp_config_phy(pl, mode, phy);
3455 	if (ret < 0)
3456 		return ret;
3457 
3458 	interface = pl->link_config.interface;
3459 	ret = phylink_attach_phy(pl, phy, interface);
3460 	if (ret < 0)
3461 		return ret;
3462 
3463 	ret = phylink_bringup_phy(pl, phy, interface);
3464 	if (ret)
3465 		phy_detach(phy);
3466 
3467 	return ret;
3468 }
3469 
phylink_sfp_disconnect_phy(void * upstream,struct phy_device * phydev)3470 static void phylink_sfp_disconnect_phy(void *upstream,
3471 				       struct phy_device *phydev)
3472 {
3473 	phylink_disconnect_phy(upstream);
3474 }
3475 
3476 static const struct sfp_upstream_ops sfp_phylink_ops = {
3477 	.attach = phylink_sfp_attach,
3478 	.detach = phylink_sfp_detach,
3479 	.module_insert = phylink_sfp_module_insert,
3480 	.module_start = phylink_sfp_module_start,
3481 	.module_stop = phylink_sfp_module_stop,
3482 	.link_up = phylink_sfp_link_up,
3483 	.link_down = phylink_sfp_link_down,
3484 	.connect_phy = phylink_sfp_connect_phy,
3485 	.disconnect_phy = phylink_sfp_disconnect_phy,
3486 };
3487 
3488 /* Helpers for MAC drivers */
3489 
3490 static struct {
3491 	int bit;
3492 	int speed;
3493 } phylink_c73_priority_resolution[] = {
3494 	{ ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 },
3495 	{ ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 },
3496 	/* 100GBASE-KP4 and 100GBASE-CR10 not supported */
3497 	{ ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 },
3498 	{ ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 },
3499 	{ ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 },
3500 	{ ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 },
3501 	/* 5GBASE-KR not supported */
3502 	{ ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 },
3503 	{ ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 },
3504 };
3505 
phylink_resolve_c73(struct phylink_link_state * state)3506 void phylink_resolve_c73(struct phylink_link_state *state)
3507 {
3508 	int i;
3509 
3510 	for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) {
3511 		int bit = phylink_c73_priority_resolution[i].bit;
3512 		if (linkmode_test_bit(bit, state->advertising) &&
3513 		    linkmode_test_bit(bit, state->lp_advertising))
3514 			break;
3515 	}
3516 
3517 	if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) {
3518 		state->speed = phylink_c73_priority_resolution[i].speed;
3519 		state->duplex = DUPLEX_FULL;
3520 	} else {
3521 		/* negotiation failure */
3522 		state->link = false;
3523 	}
3524 
3525 	phylink_resolve_an_pause(state);
3526 }
3527 EXPORT_SYMBOL_GPL(phylink_resolve_c73);
3528 
phylink_decode_c37_word(struct phylink_link_state * state,uint16_t config_reg,int speed)3529 static void phylink_decode_c37_word(struct phylink_link_state *state,
3530 				    uint16_t config_reg, int speed)
3531 {
3532 	int fd_bit;
3533 
3534 	if (speed == SPEED_2500)
3535 		fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
3536 	else
3537 		fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
3538 
3539 	mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
3540 
3541 	if (linkmode_test_bit(fd_bit, state->advertising) &&
3542 	    linkmode_test_bit(fd_bit, state->lp_advertising)) {
3543 		state->speed = speed;
3544 		state->duplex = DUPLEX_FULL;
3545 	} else {
3546 		/* negotiation failure */
3547 		state->link = false;
3548 	}
3549 
3550 	phylink_resolve_an_pause(state);
3551 }
3552 
phylink_decode_sgmii_word(struct phylink_link_state * state,uint16_t config_reg)3553 static void phylink_decode_sgmii_word(struct phylink_link_state *state,
3554 				      uint16_t config_reg)
3555 {
3556 	if (!(config_reg & LPA_SGMII_LINK)) {
3557 		state->link = false;
3558 		return;
3559 	}
3560 
3561 	switch (config_reg & LPA_SGMII_SPD_MASK) {
3562 	case LPA_SGMII_10:
3563 		state->speed = SPEED_10;
3564 		break;
3565 	case LPA_SGMII_100:
3566 		state->speed = SPEED_100;
3567 		break;
3568 	case LPA_SGMII_1000:
3569 		state->speed = SPEED_1000;
3570 		break;
3571 	default:
3572 		state->link = false;
3573 		return;
3574 	}
3575 	if (config_reg & LPA_SGMII_FULL_DUPLEX)
3576 		state->duplex = DUPLEX_FULL;
3577 	else
3578 		state->duplex = DUPLEX_HALF;
3579 }
3580 
3581 /**
3582  * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
3583  * @state: a pointer to a struct phylink_link_state.
3584  * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
3585  *
3586  * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
3587  * code word.  Decode the USXGMII code word and populate the corresponding fields
3588  * (speed, duplex) into the phylink_link_state structure.
3589  */
phylink_decode_usxgmii_word(struct phylink_link_state * state,uint16_t lpa)3590 void phylink_decode_usxgmii_word(struct phylink_link_state *state,
3591 				 uint16_t lpa)
3592 {
3593 	switch (lpa & MDIO_USXGMII_SPD_MASK) {
3594 	case MDIO_USXGMII_10:
3595 		state->speed = SPEED_10;
3596 		break;
3597 	case MDIO_USXGMII_100:
3598 		state->speed = SPEED_100;
3599 		break;
3600 	case MDIO_USXGMII_1000:
3601 		state->speed = SPEED_1000;
3602 		break;
3603 	case MDIO_USXGMII_2500:
3604 		state->speed = SPEED_2500;
3605 		break;
3606 	case MDIO_USXGMII_5000:
3607 		state->speed = SPEED_5000;
3608 		break;
3609 	case MDIO_USXGMII_10G:
3610 		state->speed = SPEED_10000;
3611 		break;
3612 	default:
3613 		state->link = false;
3614 		return;
3615 	}
3616 
3617 	if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3618 		state->duplex = DUPLEX_FULL;
3619 	else
3620 		state->duplex = DUPLEX_HALF;
3621 }
3622 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
3623 
3624 /**
3625  * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS
3626  * @state: a pointer to a struct phylink_link_state.
3627  * @lpa: a 16 bit value which stores the USGMII auto-negotiation word
3628  *
3629  * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation
3630  * code word.  Decode the USGMII code word and populate the corresponding fields
3631  * (speed, duplex) into the phylink_link_state structure. The structure for this
3632  * word is the same as the USXGMII word, except it only supports speeds up to
3633  * 1Gbps.
3634  */
phylink_decode_usgmii_word(struct phylink_link_state * state,uint16_t lpa)3635 static void phylink_decode_usgmii_word(struct phylink_link_state *state,
3636 				       uint16_t lpa)
3637 {
3638 	switch (lpa & MDIO_USXGMII_SPD_MASK) {
3639 	case MDIO_USXGMII_10:
3640 		state->speed = SPEED_10;
3641 		break;
3642 	case MDIO_USXGMII_100:
3643 		state->speed = SPEED_100;
3644 		break;
3645 	case MDIO_USXGMII_1000:
3646 		state->speed = SPEED_1000;
3647 		break;
3648 	default:
3649 		state->link = false;
3650 		return;
3651 	}
3652 
3653 	if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3654 		state->duplex = DUPLEX_FULL;
3655 	else
3656 		state->duplex = DUPLEX_HALF;
3657 }
3658 
3659 /**
3660  * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
3661  * @state: a pointer to a &struct phylink_link_state.
3662  * @bmsr: The value of the %MII_BMSR register
3663  * @lpa: The value of the %MII_LPA register
3664  *
3665  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3666  * clause 37 negotiation and/or SGMII control.
3667  *
3668  * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
3669  * the phylink @state structure. This is suitable to be used for implementing
3670  * the pcs_get_state() member of the struct phylink_pcs_ops structure if
3671  * accessing @bmsr and @lpa cannot be done with MDIO directly.
3672  */
phylink_mii_c22_pcs_decode_state(struct phylink_link_state * state,u16 bmsr,u16 lpa)3673 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
3674 				      u16 bmsr, u16 lpa)
3675 {
3676 	state->link = !!(bmsr & BMSR_LSTATUS);
3677 	state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
3678 	/* If there is no link or autonegotiation is disabled, the LP advertisement
3679 	 * data is not meaningful, so don't go any further.
3680 	 */
3681 	if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
3682 					       state->advertising))
3683 		return;
3684 
3685 	switch (state->interface) {
3686 	case PHY_INTERFACE_MODE_1000BASEX:
3687 		phylink_decode_c37_word(state, lpa, SPEED_1000);
3688 		break;
3689 
3690 	case PHY_INTERFACE_MODE_2500BASEX:
3691 		phylink_decode_c37_word(state, lpa, SPEED_2500);
3692 		break;
3693 
3694 	case PHY_INTERFACE_MODE_SGMII:
3695 	case PHY_INTERFACE_MODE_QSGMII:
3696 		phylink_decode_sgmii_word(state, lpa);
3697 		break;
3698 	case PHY_INTERFACE_MODE_QUSGMII:
3699 		phylink_decode_usgmii_word(state, lpa);
3700 		break;
3701 
3702 	default:
3703 		state->link = false;
3704 		break;
3705 	}
3706 }
3707 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
3708 
3709 /**
3710  * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
3711  * @pcs: a pointer to a &struct mdio_device.
3712  * @state: a pointer to a &struct phylink_link_state.
3713  *
3714  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3715  * clause 37 negotiation and/or SGMII control.
3716  *
3717  * Read the MAC PCS state from the MII device configured in @config and
3718  * parse the Clause 37 or Cisco SGMII link partner negotiation word into
3719  * the phylink @state structure. This is suitable to be directly plugged
3720  * into the pcs_get_state() member of the struct phylink_pcs_ops
3721  * structure.
3722  */
phylink_mii_c22_pcs_get_state(struct mdio_device * pcs,struct phylink_link_state * state)3723 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
3724 				   struct phylink_link_state *state)
3725 {
3726 	int bmsr, lpa;
3727 
3728 	bmsr = mdiodev_read(pcs, MII_BMSR);
3729 	lpa = mdiodev_read(pcs, MII_LPA);
3730 	if (bmsr < 0 || lpa < 0) {
3731 		state->link = false;
3732 		return;
3733 	}
3734 
3735 	phylink_mii_c22_pcs_decode_state(state, bmsr, lpa);
3736 }
3737 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
3738 
3739 /**
3740  * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
3741  *	advertisement
3742  * @interface: the PHY interface mode being configured
3743  * @advertising: the ethtool advertisement mask
3744  *
3745  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3746  * clause 37 negotiation and/or SGMII control.
3747  *
3748  * Encode the clause 37 PCS advertisement as specified by @interface and
3749  * @advertising.
3750  *
3751  * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
3752  */
phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,const unsigned long * advertising)3753 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
3754 					     const unsigned long *advertising)
3755 {
3756 	u16 adv;
3757 
3758 	switch (interface) {
3759 	case PHY_INTERFACE_MODE_1000BASEX:
3760 	case PHY_INTERFACE_MODE_2500BASEX:
3761 		adv = ADVERTISE_1000XFULL;
3762 		if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
3763 				      advertising))
3764 			adv |= ADVERTISE_1000XPAUSE;
3765 		if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
3766 				      advertising))
3767 			adv |= ADVERTISE_1000XPSE_ASYM;
3768 		return adv;
3769 	case PHY_INTERFACE_MODE_SGMII:
3770 	case PHY_INTERFACE_MODE_QSGMII:
3771 		return 0x0001;
3772 	default:
3773 		/* Nothing to do for other modes */
3774 		return -EINVAL;
3775 	}
3776 }
3777 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
3778 
3779 /**
3780  * phylink_mii_c22_pcs_config() - configure clause 22 PCS
3781  * @pcs: a pointer to a &struct mdio_device.
3782  * @interface: the PHY interface mode being configured
3783  * @advertising: the ethtool advertisement mask
3784  * @neg_mode: PCS negotiation mode
3785  *
3786  * Configure a Clause 22 PCS PHY with the appropriate negotiation
3787  * parameters for the @mode, @interface and @advertising parameters.
3788  * Returns negative error number on failure, zero if the advertisement
3789  * has not changed, or positive if there is a change.
3790  */
phylink_mii_c22_pcs_config(struct mdio_device * pcs,phy_interface_t interface,const unsigned long * advertising,unsigned int neg_mode)3791 int phylink_mii_c22_pcs_config(struct mdio_device *pcs,
3792 			       phy_interface_t interface,
3793 			       const unsigned long *advertising,
3794 			       unsigned int neg_mode)
3795 {
3796 	bool changed = 0;
3797 	u16 bmcr;
3798 	int ret, adv;
3799 
3800 	adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
3801 	if (adv >= 0) {
3802 		ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
3803 					     MII_ADVERTISE, 0xffff, adv);
3804 		if (ret < 0)
3805 			return ret;
3806 		changed = ret;
3807 	}
3808 
3809 	if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
3810 		bmcr = BMCR_ANENABLE;
3811 	else
3812 		bmcr = 0;
3813 
3814 	/* Configure the inband state. Ensure ISOLATE bit is disabled */
3815 	ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
3816 	if (ret < 0)
3817 		return ret;
3818 
3819 	return changed;
3820 }
3821 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
3822 
3823 /**
3824  * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
3825  * @pcs: a pointer to a &struct mdio_device.
3826  *
3827  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3828  * clause 37 negotiation.
3829  *
3830  * Restart the clause 37 negotiation with the link partner. This is
3831  * suitable to be directly plugged into the pcs_get_state() member
3832  * of the struct phylink_pcs_ops structure.
3833  */
phylink_mii_c22_pcs_an_restart(struct mdio_device * pcs)3834 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
3835 {
3836 	int val = mdiodev_read(pcs, MII_BMCR);
3837 
3838 	if (val >= 0) {
3839 		val |= BMCR_ANRESTART;
3840 
3841 		mdiodev_write(pcs, MII_BMCR, val);
3842 	}
3843 }
3844 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
3845 
phylink_mii_c45_pcs_get_state(struct mdio_device * pcs,struct phylink_link_state * state)3846 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
3847 				   struct phylink_link_state *state)
3848 {
3849 	struct mii_bus *bus = pcs->bus;
3850 	int addr = pcs->addr;
3851 	int stat;
3852 
3853 	stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
3854 	if (stat < 0) {
3855 		state->link = false;
3856 		return;
3857 	}
3858 
3859 	state->link = !!(stat & MDIO_STAT1_LSTATUS);
3860 	if (!state->link)
3861 		return;
3862 
3863 	switch (state->interface) {
3864 	case PHY_INTERFACE_MODE_10GBASER:
3865 		state->speed = SPEED_10000;
3866 		state->duplex = DUPLEX_FULL;
3867 		break;
3868 
3869 	default:
3870 		break;
3871 	}
3872 }
3873 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
3874 
phylink_init(void)3875 static int __init phylink_init(void)
3876 {
3877 	for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
3878 		__set_bit(phylink_sfp_interface_preference[i],
3879 			  phylink_sfp_interfaces);
3880 
3881 	return 0;
3882 }
3883 
3884 module_init(phylink_init);
3885 
3886 MODULE_LICENSE("GPL v2");
3887 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection");
3888