1  /* SPDX-License-Identifier: MIT */
2  #ifndef __NVKM_CLK_H__
3  #define __NVKM_CLK_H__
4  #include <core/subdev.h>
5  #include <subdev/pci.h>
6  struct nvbios_pll;
7  struct nvkm_pll_vals;
8  
9  #define NVKM_CLK_CSTATE_DEFAULT -1 /* POSTed default */
10  #define NVKM_CLK_CSTATE_BASE    -2 /* pstate base */
11  #define NVKM_CLK_CSTATE_HIGHEST -3 /* highest possible */
12  
13  enum nv_clk_src {
14  	nv_clk_src_crystal,
15  	nv_clk_src_href,
16  
17  	nv_clk_src_hclk,
18  	nv_clk_src_hclkm3,
19  	nv_clk_src_hclkm3d2,
20  	nv_clk_src_hclkm2d3, /* NVAA */
21  	nv_clk_src_hclkm4, /* NVAA */
22  	nv_clk_src_cclk, /* NVAA */
23  
24  	nv_clk_src_host,
25  
26  	nv_clk_src_sppll0,
27  	nv_clk_src_sppll1,
28  
29  	nv_clk_src_mpllsrcref,
30  	nv_clk_src_mpllsrc,
31  	nv_clk_src_mpll,
32  	nv_clk_src_mdiv,
33  
34  	nv_clk_src_core,
35  	nv_clk_src_core_intm,
36  	nv_clk_src_shader,
37  
38  	nv_clk_src_mem,
39  
40  	nv_clk_src_gpc,
41  	nv_clk_src_rop,
42  	nv_clk_src_hubk01,
43  	nv_clk_src_hubk06,
44  	nv_clk_src_hubk07,
45  	nv_clk_src_copy,
46  	nv_clk_src_pmu,
47  	nv_clk_src_disp,
48  	nv_clk_src_vdec,
49  
50  	nv_clk_src_dom6,
51  
52  	nv_clk_src_max,
53  };
54  
55  struct nvkm_cstate {
56  	struct list_head head;
57  	u8  voltage;
58  	u32 domain[nv_clk_src_max];
59  	u8  id;
60  };
61  
62  struct nvkm_pstate {
63  	struct list_head head;
64  	struct list_head list; /* c-states */
65  	struct nvkm_cstate base;
66  	u8 pstate;
67  	u8 fanspeed;
68  	enum nvkm_pcie_speed pcie_speed;
69  	u8 pcie_width;
70  };
71  
72  struct nvkm_domain {
73  	enum nv_clk_src name;
74  	u8 bios; /* 0xff for none */
75  #define NVKM_CLK_DOM_FLAG_CORE    0x01
76  #define NVKM_CLK_DOM_FLAG_VPSTATE 0x02
77  	u8 flags;
78  	const char *mname;
79  	int mdiv;
80  };
81  
82  struct nvkm_clk {
83  	const struct nvkm_clk_func *func;
84  	struct nvkm_subdev subdev;
85  
86  	const struct nvkm_domain *domains;
87  	struct nvkm_pstate bstate;
88  
89  	struct list_head states;
90  	int state_nr;
91  
92  	struct work_struct work;
93  	wait_queue_head_t wait;
94  	atomic_t waiting;
95  
96  	int pwrsrc;
97  	int pstate; /* current */
98  	int ustate_ac; /* user-requested (-1 disabled, -2 perfmon) */
99  	int ustate_dc; /* user-requested (-1 disabled, -2 perfmon) */
100  	int astate; /* perfmon adjustment (base) */
101  	int dstate; /* display adjustment (min+) */
102  	u8  temp;
103  
104  	bool allow_reclock;
105  #define NVKM_CLK_BOOST_NONE 0x0
106  #define NVKM_CLK_BOOST_BIOS 0x1
107  #define NVKM_CLK_BOOST_FULL 0x2
108  	u8  boost_mode;
109  	u32 base_khz;
110  	u32 boost_khz;
111  
112  	/*XXX: die, these are here *only* to support the completely
113  	 *     bat-shit insane what-was-nouveau_hw.c code
114  	 */
115  	int (*pll_calc)(struct nvkm_clk *, struct nvbios_pll *, int clk,
116  			struct nvkm_pll_vals *pv);
117  	int (*pll_prog)(struct nvkm_clk *, u32 reg1, struct nvkm_pll_vals *pv);
118  };
119  
120  int nvkm_clk_read(struct nvkm_clk *, enum nv_clk_src);
121  int nvkm_clk_ustate(struct nvkm_clk *, int req, int pwr);
122  int nvkm_clk_astate(struct nvkm_clk *, int req, int rel, bool wait);
123  int nvkm_clk_dstate(struct nvkm_clk *, int req, int rel);
124  int nvkm_clk_tstate(struct nvkm_clk *, u8 temperature);
125  int nvkm_clk_pwrsrc(struct nvkm_device *);
126  
127  int nv04_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
128  int nv40_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
129  int nv50_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
130  int g84_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
131  int mcp77_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
132  int gt215_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
133  int gf100_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
134  int gk104_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
135  int gk20a_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
136  int gm20b_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
137  #endif
138