1 /*
2 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #include "en.h"
34 #include "en/dim.h"
35
36 static void
mlx5e_complete_dim_work(struct dim * dim,struct dim_cq_moder moder,struct mlx5_core_dev * mdev,struct mlx5_core_cq * mcq)37 mlx5e_complete_dim_work(struct dim *dim, struct dim_cq_moder moder,
38 struct mlx5_core_dev *mdev, struct mlx5_core_cq *mcq)
39 {
40 mlx5e_modify_cq_moderation(mdev, mcq, moder.usec, moder.pkts,
41 mlx5e_cq_period_mode(moder.cq_period_mode));
42 dim->state = DIM_START_MEASURE;
43 }
44
mlx5e_rx_dim_work(struct work_struct * work)45 void mlx5e_rx_dim_work(struct work_struct *work)
46 {
47 struct dim *dim = container_of(work, struct dim, work);
48 struct mlx5e_rq *rq = dim->priv;
49 struct dim_cq_moder cur_moder =
50 net_dim_get_rx_moderation(dim->mode, dim->profile_ix);
51
52 mlx5e_complete_dim_work(dim, cur_moder, rq->mdev, &rq->cq.mcq);
53 }
54
mlx5e_tx_dim_work(struct work_struct * work)55 void mlx5e_tx_dim_work(struct work_struct *work)
56 {
57 struct dim *dim = container_of(work, struct dim, work);
58 struct mlx5e_txqsq *sq = dim->priv;
59 struct dim_cq_moder cur_moder =
60 net_dim_get_tx_moderation(dim->mode, dim->profile_ix);
61
62 mlx5e_complete_dim_work(dim, cur_moder, sq->cq.mdev, &sq->cq.mcq);
63 }
64
mlx5e_dim_enable(struct mlx5_core_dev * mdev,void (* work_fun)(struct work_struct *),int cpu,u8 cq_period_mode,struct mlx5_core_cq * mcq,void * queue)65 static struct dim *mlx5e_dim_enable(struct mlx5_core_dev *mdev,
66 void (*work_fun)(struct work_struct *), int cpu,
67 u8 cq_period_mode, struct mlx5_core_cq *mcq,
68 void *queue)
69 {
70 struct dim *dim;
71 int err;
72
73 dim = kvzalloc_node(sizeof(*dim), GFP_KERNEL, cpu_to_node(cpu));
74 if (!dim)
75 return ERR_PTR(-ENOMEM);
76
77 INIT_WORK(&dim->work, work_fun);
78
79 dim->mode = cq_period_mode;
80 dim->priv = queue;
81
82 err = mlx5e_modify_cq_period_mode(mdev, mcq, dim->mode);
83 if (err) {
84 kvfree(dim);
85 return ERR_PTR(err);
86 }
87
88 return dim;
89 }
90
mlx5e_dim_disable(struct dim * dim)91 static void mlx5e_dim_disable(struct dim *dim)
92 {
93 cancel_work_sync(&dim->work);
94 kvfree(dim);
95 }
96
mlx5e_dim_rx_change(struct mlx5e_rq * rq,bool enable)97 int mlx5e_dim_rx_change(struct mlx5e_rq *rq, bool enable)
98 {
99 if (enable == !!rq->dim)
100 return 0;
101
102 if (enable) {
103 struct mlx5e_channel *c = rq->channel;
104 struct dim *dim;
105
106 dim = mlx5e_dim_enable(rq->mdev, mlx5e_rx_dim_work, c->cpu,
107 c->rx_cq_moder.cq_period_mode, &rq->cq.mcq, rq);
108 if (IS_ERR(dim))
109 return PTR_ERR(dim);
110
111 rq->dim = dim;
112
113 __set_bit(MLX5E_RQ_STATE_DIM, &rq->state);
114 } else {
115 __clear_bit(MLX5E_RQ_STATE_DIM, &rq->state);
116
117 mlx5e_dim_disable(rq->dim);
118 rq->dim = NULL;
119 }
120
121 return 0;
122 }
123
mlx5e_dim_tx_change(struct mlx5e_txqsq * sq,bool enable)124 int mlx5e_dim_tx_change(struct mlx5e_txqsq *sq, bool enable)
125 {
126 if (enable == !!sq->dim)
127 return 0;
128
129 if (enable) {
130 struct mlx5e_channel *c = sq->channel;
131 struct dim *dim;
132
133 dim = mlx5e_dim_enable(sq->mdev, mlx5e_tx_dim_work, c->cpu,
134 c->tx_cq_moder.cq_period_mode, &sq->cq.mcq, sq);
135 if (IS_ERR(dim))
136 return PTR_ERR(dim);
137
138 sq->dim = dim;
139
140 __set_bit(MLX5E_SQ_STATE_DIM, &sq->state);
141 } else {
142 __clear_bit(MLX5E_SQ_STATE_DIM, &sq->state);
143
144 mlx5e_dim_disable(sq->dim);
145 sq->dim = NULL;
146 }
147
148 return 0;
149 }
150