1  /* SPDX-License-Identifier: GPL-2.0-or-later */
2  /*
3   * Framework and drivers for configuring and reading different PHYs
4   * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
5   *
6   * Author: Andy Fleming
7   *
8   * Copyright (c) 2004 Freescale Semiconductor, Inc.
9   */
10  
11  #ifndef __PHY_H
12  #define __PHY_H
13  
14  #include <linux/compiler.h>
15  #include <linux/spinlock.h>
16  #include <linux/ethtool.h>
17  #include <linux/leds.h>
18  #include <linux/linkmode.h>
19  #include <linux/netlink.h>
20  #include <linux/mdio.h>
21  #include <linux/mii.h>
22  #include <linux/mii_timestamper.h>
23  #include <linux/module.h>
24  #include <linux/timer.h>
25  #include <linux/workqueue.h>
26  #include <linux/mod_devicetable.h>
27  #include <linux/u64_stats_sync.h>
28  #include <linux/irqreturn.h>
29  #include <linux/iopoll.h>
30  #include <linux/refcount.h>
31  
32  #include <linux/atomic.h>
33  #include <net/eee.h>
34  
35  #define PHY_DEFAULT_FEATURES	(SUPPORTED_Autoneg | \
36  				 SUPPORTED_TP | \
37  				 SUPPORTED_MII)
38  
39  #define PHY_10BT_FEATURES	(SUPPORTED_10baseT_Half | \
40  				 SUPPORTED_10baseT_Full)
41  
42  #define PHY_100BT_FEATURES	(SUPPORTED_100baseT_Half | \
43  				 SUPPORTED_100baseT_Full)
44  
45  #define PHY_1000BT_FEATURES	(SUPPORTED_1000baseT_Half | \
46  				 SUPPORTED_1000baseT_Full)
47  
48  extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
49  extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
50  extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init;
51  extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
52  extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
53  extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
54  extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
55  extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
56  extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
57  extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init;
58  extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap2_features) __ro_after_init;
59  
60  #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
61  #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
62  #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features)
63  #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
64  #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
65  #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
66  #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
67  #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
68  #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
69  #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features)
70  #define PHY_EEE_CAP2_FEATURES ((unsigned long *)&phy_eee_cap2_features)
71  
72  extern const int phy_basic_ports_array[3];
73  extern const int phy_fibre_port_array[1];
74  extern const int phy_all_ports_features_array[7];
75  extern const int phy_10_100_features_array[4];
76  extern const int phy_basic_t1_features_array[3];
77  extern const int phy_basic_t1s_p2mp_features_array[2];
78  extern const int phy_gbit_features_array[2];
79  extern const int phy_10gbit_features_array[1];
80  
81  /*
82   * Set phydev->irq to PHY_POLL if interrupts are not supported,
83   * or not desired for this PHY.  Set to PHY_MAC_INTERRUPT if
84   * the attached MAC driver handles the interrupt
85   */
86  #define PHY_POLL		-1
87  #define PHY_MAC_INTERRUPT	-2
88  
89  #define PHY_IS_INTERNAL		0x00000001
90  #define PHY_RST_AFTER_CLK_EN	0x00000002
91  #define PHY_POLL_CABLE_TEST	0x00000004
92  #define PHY_ALWAYS_CALL_SUSPEND	0x00000008
93  #define MDIO_DEVICE_IS_PHY	0x80000000
94  
95  /**
96   * enum phy_interface_t - Interface Mode definitions
97   *
98   * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
99   * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
100   * @PHY_INTERFACE_MODE_MII: Media-independent interface
101   * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface
102   * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
103   * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
104   * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
105   * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
106   * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role
107   * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
108   * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
109   * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
110   * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay
111   * @PHY_INTERFACE_MODE_RTBI: Reduced TBI
112   * @PHY_INTERFACE_MODE_SMII: Serial MII
113   * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
114   * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
115   * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
116   * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII
117   * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
118   * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
119   * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX
120   * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
121   * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
122   * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR
123   * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
124   * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface
125   * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR
126   * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR
127   * @PHY_INTERFACE_MODE_USXGMII:  Universal Serial 10GE MII
128   * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
129   * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII
130   * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN
131   * @PHY_INTERFACE_MODE_10G_QXGMII: 10G-QXGMII - 4 ports over 10G USXGMII
132   * @PHY_INTERFACE_MODE_MAX: Book keeping
133   *
134   * Describes the interface between the MAC and PHY.
135   */
136  typedef enum {
137  	PHY_INTERFACE_MODE_NA,
138  	PHY_INTERFACE_MODE_INTERNAL,
139  	PHY_INTERFACE_MODE_MII,
140  	PHY_INTERFACE_MODE_GMII,
141  	PHY_INTERFACE_MODE_SGMII,
142  	PHY_INTERFACE_MODE_TBI,
143  	PHY_INTERFACE_MODE_REVMII,
144  	PHY_INTERFACE_MODE_RMII,
145  	PHY_INTERFACE_MODE_REVRMII,
146  	PHY_INTERFACE_MODE_RGMII,
147  	PHY_INTERFACE_MODE_RGMII_ID,
148  	PHY_INTERFACE_MODE_RGMII_RXID,
149  	PHY_INTERFACE_MODE_RGMII_TXID,
150  	PHY_INTERFACE_MODE_RTBI,
151  	PHY_INTERFACE_MODE_SMII,
152  	PHY_INTERFACE_MODE_XGMII,
153  	PHY_INTERFACE_MODE_XLGMII,
154  	PHY_INTERFACE_MODE_MOCA,
155  	PHY_INTERFACE_MODE_PSGMII,
156  	PHY_INTERFACE_MODE_QSGMII,
157  	PHY_INTERFACE_MODE_TRGMII,
158  	PHY_INTERFACE_MODE_100BASEX,
159  	PHY_INTERFACE_MODE_1000BASEX,
160  	PHY_INTERFACE_MODE_2500BASEX,
161  	PHY_INTERFACE_MODE_5GBASER,
162  	PHY_INTERFACE_MODE_RXAUI,
163  	PHY_INTERFACE_MODE_XAUI,
164  	/* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
165  	PHY_INTERFACE_MODE_10GBASER,
166  	PHY_INTERFACE_MODE_25GBASER,
167  	PHY_INTERFACE_MODE_USXGMII,
168  	/* 10GBASE-KR - with Clause 73 AN */
169  	PHY_INTERFACE_MODE_10GKR,
170  	PHY_INTERFACE_MODE_QUSGMII,
171  	PHY_INTERFACE_MODE_1000BASEKX,
172  	PHY_INTERFACE_MODE_10G_QXGMII,
173  	PHY_INTERFACE_MODE_MAX,
174  } phy_interface_t;
175  
176  /* PHY interface mode bitmap handling */
177  #define DECLARE_PHY_INTERFACE_MASK(name) \
178  	DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX)
179  
phy_interface_zero(unsigned long * intf)180  static inline void phy_interface_zero(unsigned long *intf)
181  {
182  	bitmap_zero(intf, PHY_INTERFACE_MODE_MAX);
183  }
184  
phy_interface_empty(const unsigned long * intf)185  static inline bool phy_interface_empty(const unsigned long *intf)
186  {
187  	return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX);
188  }
189  
phy_interface_and(unsigned long * dst,const unsigned long * a,const unsigned long * b)190  static inline void phy_interface_and(unsigned long *dst, const unsigned long *a,
191  				     const unsigned long *b)
192  {
193  	bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX);
194  }
195  
phy_interface_or(unsigned long * dst,const unsigned long * a,const unsigned long * b)196  static inline void phy_interface_or(unsigned long *dst, const unsigned long *a,
197  				    const unsigned long *b)
198  {
199  	bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX);
200  }
201  
phy_interface_set_rgmii(unsigned long * intf)202  static inline void phy_interface_set_rgmii(unsigned long *intf)
203  {
204  	__set_bit(PHY_INTERFACE_MODE_RGMII, intf);
205  	__set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf);
206  	__set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf);
207  	__set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf);
208  }
209  
210  /*
211   * phy_supported_speeds - return all speeds currently supported by a PHY device
212   */
213  unsigned int phy_supported_speeds(struct phy_device *phy,
214  				      unsigned int *speeds,
215  				      unsigned int size);
216  
217  /**
218   * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
219   * @interface: enum phy_interface_t value
220   *
221   * Description: maps enum &phy_interface_t defined in this file
222   * into the device tree binding of 'phy-mode', so that Ethernet
223   * device driver can get PHY interface from device tree.
224   */
phy_modes(phy_interface_t interface)225  static inline const char *phy_modes(phy_interface_t interface)
226  {
227  	switch (interface) {
228  	case PHY_INTERFACE_MODE_NA:
229  		return "";
230  	case PHY_INTERFACE_MODE_INTERNAL:
231  		return "internal";
232  	case PHY_INTERFACE_MODE_MII:
233  		return "mii";
234  	case PHY_INTERFACE_MODE_GMII:
235  		return "gmii";
236  	case PHY_INTERFACE_MODE_SGMII:
237  		return "sgmii";
238  	case PHY_INTERFACE_MODE_TBI:
239  		return "tbi";
240  	case PHY_INTERFACE_MODE_REVMII:
241  		return "rev-mii";
242  	case PHY_INTERFACE_MODE_RMII:
243  		return "rmii";
244  	case PHY_INTERFACE_MODE_REVRMII:
245  		return "rev-rmii";
246  	case PHY_INTERFACE_MODE_RGMII:
247  		return "rgmii";
248  	case PHY_INTERFACE_MODE_RGMII_ID:
249  		return "rgmii-id";
250  	case PHY_INTERFACE_MODE_RGMII_RXID:
251  		return "rgmii-rxid";
252  	case PHY_INTERFACE_MODE_RGMII_TXID:
253  		return "rgmii-txid";
254  	case PHY_INTERFACE_MODE_RTBI:
255  		return "rtbi";
256  	case PHY_INTERFACE_MODE_SMII:
257  		return "smii";
258  	case PHY_INTERFACE_MODE_XGMII:
259  		return "xgmii";
260  	case PHY_INTERFACE_MODE_XLGMII:
261  		return "xlgmii";
262  	case PHY_INTERFACE_MODE_MOCA:
263  		return "moca";
264  	case PHY_INTERFACE_MODE_PSGMII:
265  		return "psgmii";
266  	case PHY_INTERFACE_MODE_QSGMII:
267  		return "qsgmii";
268  	case PHY_INTERFACE_MODE_TRGMII:
269  		return "trgmii";
270  	case PHY_INTERFACE_MODE_1000BASEX:
271  		return "1000base-x";
272  	case PHY_INTERFACE_MODE_1000BASEKX:
273  		return "1000base-kx";
274  	case PHY_INTERFACE_MODE_2500BASEX:
275  		return "2500base-x";
276  	case PHY_INTERFACE_MODE_5GBASER:
277  		return "5gbase-r";
278  	case PHY_INTERFACE_MODE_RXAUI:
279  		return "rxaui";
280  	case PHY_INTERFACE_MODE_XAUI:
281  		return "xaui";
282  	case PHY_INTERFACE_MODE_10GBASER:
283  		return "10gbase-r";
284  	case PHY_INTERFACE_MODE_25GBASER:
285  		return "25gbase-r";
286  	case PHY_INTERFACE_MODE_USXGMII:
287  		return "usxgmii";
288  	case PHY_INTERFACE_MODE_10GKR:
289  		return "10gbase-kr";
290  	case PHY_INTERFACE_MODE_100BASEX:
291  		return "100base-x";
292  	case PHY_INTERFACE_MODE_QUSGMII:
293  		return "qusgmii";
294  	case PHY_INTERFACE_MODE_10G_QXGMII:
295  		return "10g-qxgmii";
296  	default:
297  		return "unknown";
298  	}
299  }
300  
301  #define PHY_INIT_TIMEOUT	100000
302  #define PHY_FORCE_TIMEOUT	10
303  
304  #define PHY_MAX_ADDR	32
305  
306  /* Used when trying to connect to a specific phy (mii bus id:phy device id) */
307  #define PHY_ID_FMT "%s:%02x"
308  
309  #define MII_BUS_ID_SIZE	61
310  
311  struct device;
312  struct kernel_hwtstamp_config;
313  struct phylink;
314  struct sfp_bus;
315  struct sfp_upstream_ops;
316  struct sk_buff;
317  
318  /**
319   * struct mdio_bus_stats - Statistics counters for MDIO busses
320   * @transfers: Total number of transfers, i.e. @writes + @reads
321   * @errors: Number of MDIO transfers that returned an error
322   * @writes: Number of write transfers
323   * @reads: Number of read transfers
324   * @syncp: Synchronisation for incrementing statistics
325   */
326  struct mdio_bus_stats {
327  	u64_stats_t transfers;
328  	u64_stats_t errors;
329  	u64_stats_t writes;
330  	u64_stats_t reads;
331  	/* Must be last, add new statistics above */
332  	struct u64_stats_sync syncp;
333  };
334  
335  /**
336   * struct phy_package_shared - Shared information in PHY packages
337   * @base_addr: Base PHY address of PHY package used to combine PHYs
338   *   in one package and for offset calculation of phy_package_read/write
339   * @np: Pointer to the Device Node if PHY package defined in DT
340   * @refcnt: Number of PHYs connected to this shared data
341   * @flags: Initialization of PHY package
342   * @priv_size: Size of the shared private data @priv
343   * @priv: Driver private data shared across a PHY package
344   *
345   * Represents a shared structure between different phydev's in the same
346   * package, for example a quad PHY. See phy_package_join() and
347   * phy_package_leave().
348   */
349  struct phy_package_shared {
350  	u8 base_addr;
351  	/* With PHY package defined in DT this points to the PHY package node */
352  	struct device_node *np;
353  	refcount_t refcnt;
354  	unsigned long flags;
355  	size_t priv_size;
356  
357  	/* private data pointer */
358  	/* note that this pointer is shared between different phydevs and
359  	 * the user has to take care of appropriate locking. It is allocated
360  	 * and freed automatically by phy_package_join() and
361  	 * phy_package_leave().
362  	 */
363  	void *priv;
364  };
365  
366  /* used as bit number in atomic bitops */
367  #define PHY_SHARED_F_INIT_DONE  0
368  #define PHY_SHARED_F_PROBE_DONE 1
369  
370  /**
371   * struct mii_bus - Represents an MDIO bus
372   *
373   * @owner: Who owns this device
374   * @name: User friendly name for this MDIO device, or driver name
375   * @id: Unique identifier for this bus, typical from bus hierarchy
376   * @priv: Driver private data
377   *
378   * The Bus class for PHYs.  Devices which provide access to
379   * PHYs should register using this structure
380   */
381  struct mii_bus {
382  	struct module *owner;
383  	const char *name;
384  	char id[MII_BUS_ID_SIZE];
385  	void *priv;
386  	/** @read: Perform a read transfer on the bus */
387  	int (*read)(struct mii_bus *bus, int addr, int regnum);
388  	/** @write: Perform a write transfer on the bus */
389  	int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
390  	/** @read_c45: Perform a C45 read transfer on the bus */
391  	int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum);
392  	/** @write_c45: Perform a C45 write transfer on the bus */
393  	int (*write_c45)(struct mii_bus *bus, int addr, int devnum,
394  			 int regnum, u16 val);
395  	/** @reset: Perform a reset of the bus */
396  	int (*reset)(struct mii_bus *bus);
397  
398  	/** @stats: Statistic counters per device on the bus */
399  	struct mdio_bus_stats stats[PHY_MAX_ADDR];
400  
401  	/**
402  	 * @mdio_lock: A lock to ensure that only one thing can read/write
403  	 * the MDIO bus at a time
404  	 */
405  	struct mutex mdio_lock;
406  
407  	/** @parent: Parent device of this bus */
408  	struct device *parent;
409  	/** @state: State of bus structure */
410  	enum {
411  		MDIOBUS_ALLOCATED = 1,
412  		MDIOBUS_REGISTERED,
413  		MDIOBUS_UNREGISTERED,
414  		MDIOBUS_RELEASED,
415  	} state;
416  
417  	/** @dev: Kernel device representation */
418  	struct device dev;
419  
420  	/** @mdio_map: list of all MDIO devices on bus */
421  	struct mdio_device *mdio_map[PHY_MAX_ADDR];
422  
423  	/** @phy_mask: PHY addresses to be ignored when probing */
424  	u32 phy_mask;
425  
426  	/** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */
427  	u32 phy_ignore_ta_mask;
428  
429  	/**
430  	 * @irq: An array of interrupts, each PHY's interrupt at the index
431  	 * matching its address
432  	 */
433  	int irq[PHY_MAX_ADDR];
434  
435  	/** @reset_delay_us: GPIO reset pulse width in microseconds */
436  	int reset_delay_us;
437  	/** @reset_post_delay_us: GPIO reset deassert delay in microseconds */
438  	int reset_post_delay_us;
439  	/** @reset_gpiod: Reset GPIO descriptor pointer */
440  	struct gpio_desc *reset_gpiod;
441  
442  	/** @shared_lock: protect access to the shared element */
443  	struct mutex shared_lock;
444  
445  	/** @shared: shared state across different PHYs */
446  	struct phy_package_shared *shared[PHY_MAX_ADDR];
447  };
448  #define to_mii_bus(d) container_of(d, struct mii_bus, dev)
449  
450  struct mii_bus *mdiobus_alloc_size(size_t size);
451  
452  /**
453   * mdiobus_alloc - Allocate an MDIO bus structure
454   *
455   * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready
456   * for the driver to register the bus.
457   */
mdiobus_alloc(void)458  static inline struct mii_bus *mdiobus_alloc(void)
459  {
460  	return mdiobus_alloc_size(0);
461  }
462  
463  int __mdiobus_register(struct mii_bus *bus, struct module *owner);
464  int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus,
465  			    struct module *owner);
466  #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
467  #define devm_mdiobus_register(dev, bus) \
468  		__devm_mdiobus_register(dev, bus, THIS_MODULE)
469  
470  void mdiobus_unregister(struct mii_bus *bus);
471  void mdiobus_free(struct mii_bus *bus);
472  struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
devm_mdiobus_alloc(struct device * dev)473  static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
474  {
475  	return devm_mdiobus_alloc_size(dev, 0);
476  }
477  
478  struct mii_bus *mdio_find_bus(const char *mdio_name);
479  struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr);
480  
481  #define PHY_INTERRUPT_DISABLED	false
482  #define PHY_INTERRUPT_ENABLED	true
483  
484  /**
485   * enum phy_state - PHY state machine states:
486   *
487   * @PHY_DOWN: PHY device and driver are not ready for anything.  probe
488   * should be called if and only if the PHY is in this state,
489   * given that the PHY device exists.
490   * - PHY driver probe function will set the state to @PHY_READY
491   *
492   * @PHY_READY: PHY is ready to send and receive packets, but the
493   * controller is not.  By default, PHYs which do not implement
494   * probe will be set to this state by phy_probe().
495   * - start will set the state to UP
496   *
497   * @PHY_UP: The PHY and attached device are ready to do work.
498   * Interrupts should be started here.
499   * - timer moves to @PHY_NOLINK or @PHY_RUNNING
500   *
501   * @PHY_NOLINK: PHY is up, but not currently plugged in.
502   * - irq or timer will set @PHY_RUNNING if link comes back
503   * - phy_stop moves to @PHY_HALTED
504   *
505   * @PHY_RUNNING: PHY is currently up, running, and possibly sending
506   * and/or receiving packets
507   * - irq or timer will set @PHY_NOLINK if link goes down
508   * - phy_stop moves to @PHY_HALTED
509   *
510   * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending
511   * is not expected to work, carrier will be indicated as down. PHY will be
512   * poll once per second, or on interrupt for it current state.
513   * Once complete, move to UP to restart the PHY.
514   * - phy_stop aborts the running test and moves to @PHY_HALTED
515   *
516   * @PHY_HALTED: PHY is up, but no polling or interrupts are done.
517   * - phy_start moves to @PHY_UP
518   *
519   * @PHY_ERROR: PHY is up, but is in an error state.
520   * - phy_stop moves to @PHY_HALTED
521   */
522  enum phy_state {
523  	PHY_DOWN = 0,
524  	PHY_READY,
525  	PHY_HALTED,
526  	PHY_ERROR,
527  	PHY_UP,
528  	PHY_RUNNING,
529  	PHY_NOLINK,
530  	PHY_CABLETEST,
531  };
532  
533  #define MDIO_MMD_NUM 32
534  
535  /**
536   * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
537   * @devices_in_package: IEEE 802.3 devices in package register value.
538   * @mmds_present: bit vector of MMDs present.
539   * @device_ids: The device identifer for each present device.
540   */
541  struct phy_c45_device_ids {
542  	u32 devices_in_package;
543  	u32 mmds_present;
544  	u32 device_ids[MDIO_MMD_NUM];
545  };
546  
547  struct macsec_context;
548  struct macsec_ops;
549  
550  /**
551   * struct phy_device - An instance of a PHY
552   *
553   * @mdio: MDIO bus this PHY is on
554   * @drv: Pointer to the driver for this PHY instance
555   * @devlink: Create a link between phy dev and mac dev, if the external phy
556   *           used by current mac interface is managed by another mac interface.
557   * @phyindex: Unique id across the phy's parent tree of phys to address the PHY
558   *	      from userspace, similar to ifindex. A zero index means the PHY
559   *	      wasn't assigned an id yet.
560   * @phy_id: UID for this device found during discovery
561   * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
562   * @is_c45:  Set to true if this PHY uses clause 45 addressing.
563   * @is_internal: Set to true if this PHY is internal to a MAC.
564   * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc.
565   * @is_gigabit_capable: Set to true if PHY supports 1000Mbps
566   * @has_fixups: Set to true if this PHY has fixups/quirks.
567   * @suspended: Set to true if this PHY has been suspended successfully.
568   * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus.
569   * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
570   * @loopback_enabled: Set true if this PHY has been loopbacked successfully.
571   * @downshifted_rate: Set true if link speed has been downshifted.
572   * @is_on_sfp_module: Set true if PHY is located on an SFP module.
573   * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY
574   * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN
575   * 		 enabled.
576   * @state: State of the PHY for management purposes
577   * @dev_flags: Device-specific flags used by the PHY driver.
578   *
579   *      - Bits [15:0] are free to use by the PHY driver to communicate
580   *        driver specific behavior.
581   *      - Bits [23:16] are currently reserved for future use.
582   *      - Bits [31:24] are reserved for defining generic
583   *        PHY driver behavior.
584   * @irq: IRQ number of the PHY's interrupt (-1 if none)
585   * @phylink: Pointer to phylink instance for this PHY
586   * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached
587   * @sfp_bus: SFP bus attached to this PHY's fiber port
588   * @attached_dev: The attached enet driver's device instance ptr
589   * @adjust_link: Callback for the enet controller to respond to changes: in the
590   *               link state.
591   * @phy_link_change: Callback for phylink for notification of link change
592   * @macsec_ops: MACsec offloading ops.
593   *
594   * @speed: Current link speed
595   * @duplex: Current duplex
596   * @port: Current port
597   * @pause: Current pause
598   * @asym_pause: Current asymmetric pause
599   * @supported: Combined MAC/PHY supported linkmodes
600   * @advertising: Currently advertised linkmodes
601   * @adv_old: Saved advertised while power saving for WoL
602   * @supported_eee: supported PHY EEE linkmodes
603   * @advertising_eee: Currently advertised EEE linkmodes
604   * @eee_enabled: Flag indicating whether the EEE feature is enabled
605   * @enable_tx_lpi: When True, MAC should transmit LPI to PHY
606   * @eee_cfg: User configuration of EEE
607   * @lp_advertising: Current link partner advertised linkmodes
608   * @host_interfaces: PHY interface modes supported by host
609   * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited
610   * @autoneg: Flag autoneg being used
611   * @rate_matching: Current rate matching mode
612   * @link: Current link state
613   * @autoneg_complete: Flag auto negotiation of the link has completed
614   * @mdix: Current crossover
615   * @mdix_ctrl: User setting of crossover
616   * @pma_extable: Cached value of PMA/PMD Extended Abilities Register
617   * @interrupts: Flag interrupts have been enabled
618   * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt
619   *                 handling shall be postponed until PHY has resumed
620   * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended,
621   *             requiring a rerun of the interrupt handler after resume
622   * @default_timestamp: Flag indicating whether we are using the phy
623   *		       timestamp as the default one
624   * @interface: enum phy_interface_t value
625   * @possible_interfaces: bitmap if interface modes that the attached PHY
626   *			 will switch between depending on media speed.
627   * @skb: Netlink message for cable diagnostics
628   * @nest: Netlink nest used for cable diagnostics
629   * @ehdr: nNtlink header for cable diagnostics
630   * @phy_led_triggers: Array of LED triggers
631   * @phy_num_led_triggers: Number of triggers in @phy_led_triggers
632   * @led_link_trigger: LED trigger for link up/down
633   * @last_triggered: last LED trigger for link speed
634   * @leds: list of PHY LED structures
635   * @master_slave_set: User requested master/slave configuration
636   * @master_slave_get: Current master/slave advertisement
637   * @master_slave_state: Current master/slave configuration
638   * @mii_ts: Pointer to time stamper callbacks
639   * @psec: Pointer to Power Sourcing Equipment control struct
640   * @lock:  Mutex for serialization access to PHY
641   * @state_queue: Work queue for state machine
642   * @link_down_events: Number of times link was lost
643   * @shared: Pointer to private data shared by phys in one package
644   * @priv: Pointer to driver private data
645   *
646   * interrupts currently only supports enabled or disabled,
647   * but could be changed in the future to support enabling
648   * and disabling specific interrupts
649   *
650   * Contains some infrastructure for polling and interrupt
651   * handling, as well as handling shifts in PHY hardware state
652   */
653  struct phy_device {
654  	struct mdio_device mdio;
655  
656  	/* Information about the PHY type */
657  	/* And management functions */
658  	const struct phy_driver *drv;
659  
660  	struct device_link *devlink;
661  
662  	u32 phyindex;
663  	u32 phy_id;
664  
665  	struct phy_c45_device_ids c45_ids;
666  	unsigned is_c45:1;
667  	unsigned is_internal:1;
668  	unsigned is_pseudo_fixed_link:1;
669  	unsigned is_gigabit_capable:1;
670  	unsigned has_fixups:1;
671  	unsigned suspended:1;
672  	unsigned suspended_by_mdio_bus:1;
673  	unsigned sysfs_links:1;
674  	unsigned loopback_enabled:1;
675  	unsigned downshifted_rate:1;
676  	unsigned is_on_sfp_module:1;
677  	unsigned mac_managed_pm:1;
678  	unsigned wol_enabled:1;
679  
680  	unsigned autoneg:1;
681  	/* The most recently read link state */
682  	unsigned link:1;
683  	unsigned autoneg_complete:1;
684  
685  	/* Interrupts are enabled */
686  	unsigned interrupts:1;
687  	unsigned irq_suspended:1;
688  	unsigned irq_rerun:1;
689  
690  	unsigned default_timestamp:1;
691  
692  	int rate_matching;
693  
694  	enum phy_state state;
695  
696  	u32 dev_flags;
697  
698  	phy_interface_t interface;
699  	DECLARE_PHY_INTERFACE_MASK(possible_interfaces);
700  
701  	/*
702  	 * forced speed & duplex (no autoneg)
703  	 * partner speed & duplex & pause (autoneg)
704  	 */
705  	int speed;
706  	int duplex;
707  	int port;
708  	int pause;
709  	int asym_pause;
710  	u8 master_slave_get;
711  	u8 master_slave_set;
712  	u8 master_slave_state;
713  
714  	/* Union of PHY and Attached devices' supported link modes */
715  	/* See ethtool.h for more info */
716  	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
717  	__ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
718  	__ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
719  	/* used with phy_speed_down */
720  	__ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
721  	/* used for eee validation and configuration*/
722  	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee);
723  	__ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee);
724  	bool eee_enabled;
725  
726  	/* Host supported PHY interface types. Should be ignored if empty. */
727  	DECLARE_PHY_INTERFACE_MASK(host_interfaces);
728  
729  	/* Energy efficient ethernet modes which should be prohibited */
730  	u32 eee_broken_modes;
731  	bool enable_tx_lpi;
732  	struct eee_config eee_cfg;
733  
734  #ifdef CONFIG_LED_TRIGGER_PHY
735  	struct phy_led_trigger *phy_led_triggers;
736  	unsigned int phy_num_led_triggers;
737  	struct phy_led_trigger *last_triggered;
738  
739  	struct phy_led_trigger *led_link_trigger;
740  #endif
741  	struct list_head leds;
742  
743  	/*
744  	 * Interrupt number for this PHY
745  	 * -1 means no interrupt
746  	 */
747  	int irq;
748  
749  	/* private data pointer */
750  	/* For use by PHYs to maintain extra state */
751  	void *priv;
752  
753  	/* shared data pointer */
754  	/* For use by PHYs inside the same package that need a shared state. */
755  	struct phy_package_shared *shared;
756  
757  	/* Reporting cable test results */
758  	struct sk_buff *skb;
759  	void *ehdr;
760  	struct nlattr *nest;
761  
762  	/* Interrupt and Polling infrastructure */
763  	struct delayed_work state_queue;
764  
765  	struct mutex lock;
766  
767  	/* This may be modified under the rtnl lock */
768  	bool sfp_bus_attached;
769  	struct sfp_bus *sfp_bus;
770  	struct phylink *phylink;
771  	struct net_device *attached_dev;
772  	struct mii_timestamper *mii_ts;
773  	struct pse_control *psec;
774  
775  	u8 mdix;
776  	u8 mdix_ctrl;
777  
778  	int pma_extable;
779  
780  	unsigned int link_down_events;
781  
782  	void (*phy_link_change)(struct phy_device *phydev, bool up);
783  	void (*adjust_link)(struct net_device *dev);
784  
785  #if IS_ENABLED(CONFIG_MACSEC)
786  	/* MACsec management functions */
787  	const struct macsec_ops *macsec_ops;
788  #endif
789  };
790  
791  /* Generic phy_device::dev_flags */
792  #define PHY_F_NO_IRQ		0x80000000
793  #define PHY_F_RXC_ALWAYS_ON	0x40000000
794  
to_phy_device(const struct device * dev)795  static inline struct phy_device *to_phy_device(const struct device *dev)
796  {
797  	return container_of(to_mdio_device(dev), struct phy_device, mdio);
798  }
799  
800  /**
801   * struct phy_tdr_config - Configuration of a TDR raw test
802   *
803   * @first: Distance for first data collection point
804   * @last: Distance for last data collection point
805   * @step: Step between data collection points
806   * @pair: Bitmap of cable pairs to collect data for
807   *
808   * A structure containing possible configuration parameters
809   * for a TDR cable test. The driver does not need to implement
810   * all the parameters, but should report what is actually used.
811   * All distances are in centimeters.
812   */
813  struct phy_tdr_config {
814  	u32 first;
815  	u32 last;
816  	u32 step;
817  	s8 pair;
818  };
819  #define PHY_PAIR_ALL -1
820  
821  /**
822   * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision
823   * Avoidance) Reconciliation Sublayer.
824   *
825   * @version: read-only PLCA register map version. -1 = not available. Ignored
826   *   when setting the configuration. Format is the same as reported by the PLCA
827   *   IDVER register (31.CA00). -1 = not available.
828   * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't
829   *   set. 0 = disabled, anything else = enabled.
830   * @node_id: the PLCA local node identifier. -1 = not available / don't set.
831   *   Allowed values [0 .. 254]. 255 = node disabled.
832   * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only
833   *   meaningful for the coordinator (node_id = 0). -1 = not available / don't
834   *   set. Allowed values [1 .. 255].
835   * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the
836   *   PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for
837   *   more details. The to_timer shall be set equal over all nodes.
838   *   -1 = not available / don't set. Allowed values [0 .. 255].
839   * @burst_cnt: controls how many additional frames a node is allowed to send in
840   *   single transmit opportunity (TO). The default value of 0 means that the
841   *   node is allowed exactly one frame per TO. A value of 1 allows two frames
842   *   per TO, and so on. -1 = not available / don't set.
843   *   Allowed values [0 .. 255].
844   * @burst_tmr: controls how many bit times to wait for the MAC to send a new
845   *   frame before interrupting the burst. This value should be set to a value
846   *   greater than the MAC inter-packet gap (which is typically 96 bits).
847   *   -1 = not available / don't set. Allowed values [0 .. 255].
848   *
849   * A structure containing configuration parameters for setting/getting the PLCA
850   * RS configuration. The driver does not need to implement all the parameters,
851   * but should report what is actually used.
852   */
853  struct phy_plca_cfg {
854  	int version;
855  	int enabled;
856  	int node_id;
857  	int node_cnt;
858  	int to_tmr;
859  	int burst_cnt;
860  	int burst_tmr;
861  };
862  
863  /**
864   * struct phy_plca_status - Status of the PLCA (Physical Layer Collision
865   * Avoidance) Reconciliation Sublayer.
866   *
867   * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS
868   *	register(31.CA03), indicating BEACON activity.
869   *
870   * A structure containing status information of the PLCA RS configuration.
871   * The driver does not need to implement all the parameters, but should report
872   * what is actually used.
873   */
874  struct phy_plca_status {
875  	bool pst;
876  };
877  
878  /* Modes for PHY LED configuration */
879  enum phy_led_modes {
880  	PHY_LED_ACTIVE_LOW = 0,
881  	PHY_LED_INACTIVE_HIGH_IMPEDANCE = 1,
882  
883  	/* keep it last */
884  	__PHY_LED_MODES_NUM,
885  };
886  
887  /**
888   * struct phy_led: An LED driven by the PHY
889   *
890   * @list: List of LEDs
891   * @phydev: PHY this LED is attached to
892   * @led_cdev: Standard LED class structure
893   * @index: Number of the LED
894   */
895  struct phy_led {
896  	struct list_head list;
897  	struct phy_device *phydev;
898  	struct led_classdev led_cdev;
899  	u8 index;
900  };
901  
902  #define to_phy_led(d) container_of(d, struct phy_led, led_cdev)
903  
904  /**
905   * struct phy_driver - Driver structure for a particular PHY type
906   *
907   * @mdiodrv: Data common to all MDIO devices
908   * @phy_id: The result of reading the UID registers of this PHY
909   *   type, and ANDing them with the phy_id_mask.  This driver
910   *   only works for PHYs with IDs which match this field
911   * @name: The friendly name of this PHY type
912   * @phy_id_mask: Defines the important bits of the phy_id
913   * @features: A mandatory list of features (speed, duplex, etc)
914   *   supported by this PHY
915   * @flags: A bitfield defining certain other features this PHY
916   *   supports (like interrupts)
917   * @driver_data: Static driver data
918   *
919   * All functions are optional. If config_aneg or read_status
920   * are not implemented, the phy core uses the genphy versions.
921   * Note that none of these functions should be called from
922   * interrupt time. The goal is for the bus read/write functions
923   * to be able to block when the bus transaction is happening,
924   * and be freed up by an interrupt (The MPC85xx has this ability,
925   * though it is not currently supported in the driver).
926   */
927  struct phy_driver {
928  	struct mdio_driver_common mdiodrv;
929  	u32 phy_id;
930  	char *name;
931  	u32 phy_id_mask;
932  	const unsigned long * const features;
933  	u32 flags;
934  	const void *driver_data;
935  
936  	/**
937  	 * @soft_reset: Called to issue a PHY software reset
938  	 */
939  	int (*soft_reset)(struct phy_device *phydev);
940  
941  	/**
942  	 * @config_init: Called to initialize the PHY,
943  	 * including after a reset
944  	 */
945  	int (*config_init)(struct phy_device *phydev);
946  
947  	/**
948  	 * @probe: Called during discovery.  Used to set
949  	 * up device-specific structures, if any
950  	 */
951  	int (*probe)(struct phy_device *phydev);
952  
953  	/**
954  	 * @get_features: Probe the hardware to determine what
955  	 * abilities it has.  Should only set phydev->supported.
956  	 */
957  	int (*get_features)(struct phy_device *phydev);
958  
959  	/**
960  	 * @get_rate_matching: Get the supported type of rate matching for a
961  	 * particular phy interface. This is used by phy consumers to determine
962  	 * whether to advertise lower-speed modes for that interface. It is
963  	 * assumed that if a rate matching mode is supported on an interface,
964  	 * then that interface's rate can be adapted to all slower link speeds
965  	 * supported by the phy. If the interface is not supported, this should
966  	 * return %RATE_MATCH_NONE.
967  	 */
968  	int (*get_rate_matching)(struct phy_device *phydev,
969  				   phy_interface_t iface);
970  
971  	/* PHY Power Management */
972  	/** @suspend: Suspend the hardware, saving state if needed */
973  	int (*suspend)(struct phy_device *phydev);
974  	/** @resume: Resume the hardware, restoring state if needed */
975  	int (*resume)(struct phy_device *phydev);
976  
977  	/**
978  	 * @config_aneg: Configures the advertisement and resets
979  	 * autonegotiation if phydev->autoneg is on,
980  	 * forces the speed to the current settings in phydev
981  	 * if phydev->autoneg is off
982  	 */
983  	int (*config_aneg)(struct phy_device *phydev);
984  
985  	/** @aneg_done: Determines the auto negotiation result */
986  	int (*aneg_done)(struct phy_device *phydev);
987  
988  	/** @read_status: Determines the negotiated speed and duplex */
989  	int (*read_status)(struct phy_device *phydev);
990  
991  	/**
992  	 * @config_intr: Enables or disables interrupts.
993  	 * It should also clear any pending interrupts prior to enabling the
994  	 * IRQs and after disabling them.
995  	 */
996  	int (*config_intr)(struct phy_device *phydev);
997  
998  	/** @handle_interrupt: Override default interrupt handling */
999  	irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
1000  
1001  	/** @remove: Clears up any memory if needed */
1002  	void (*remove)(struct phy_device *phydev);
1003  
1004  	/**
1005  	 * @match_phy_device: Returns true if this is a suitable
1006  	 * driver for the given phydev.	 If NULL, matching is based on
1007  	 * phy_id and phy_id_mask.
1008  	 */
1009  	int (*match_phy_device)(struct phy_device *phydev);
1010  
1011  	/**
1012  	 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY
1013  	 * register changes to enable Wake on LAN, so set_wol is
1014  	 * provided to be called in the ethernet driver's set_wol
1015  	 * function.
1016  	 */
1017  	int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
1018  
1019  	/**
1020  	 * @get_wol: See set_wol, but for checking whether Wake on LAN
1021  	 * is enabled.
1022  	 */
1023  	void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
1024  
1025  	/**
1026  	 * @link_change_notify: Called to inform a PHY device driver
1027  	 * when the core is about to change the link state. This
1028  	 * callback is supposed to be used as fixup hook for drivers
1029  	 * that need to take action when the link state
1030  	 * changes. Drivers are by no means allowed to mess with the
1031  	 * PHY device structure in their implementations.
1032  	 */
1033  	void (*link_change_notify)(struct phy_device *dev);
1034  
1035  	/**
1036  	 * @read_mmd: PHY specific driver override for reading a MMD
1037  	 * register.  This function is optional for PHY specific
1038  	 * drivers.  When not provided, the default MMD read function
1039  	 * will be used by phy_read_mmd(), which will use either a
1040  	 * direct read for Clause 45 PHYs or an indirect read for
1041  	 * Clause 22 PHYs.  devnum is the MMD device number within the
1042  	 * PHY device, regnum is the register within the selected MMD
1043  	 * device.
1044  	 */
1045  	int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
1046  
1047  	/**
1048  	 * @write_mmd: PHY specific driver override for writing a MMD
1049  	 * register.  This function is optional for PHY specific
1050  	 * drivers.  When not provided, the default MMD write function
1051  	 * will be used by phy_write_mmd(), which will use either a
1052  	 * direct write for Clause 45 PHYs, or an indirect write for
1053  	 * Clause 22 PHYs.  devnum is the MMD device number within the
1054  	 * PHY device, regnum is the register within the selected MMD
1055  	 * device.  val is the value to be written.
1056  	 */
1057  	int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
1058  			 u16 val);
1059  
1060  	/** @read_page: Return the current PHY register page number */
1061  	int (*read_page)(struct phy_device *dev);
1062  	/** @write_page: Set the current PHY register page number */
1063  	int (*write_page)(struct phy_device *dev, int page);
1064  
1065  	/**
1066  	 * @module_info: Get the size and type of the eeprom contained
1067  	 * within a plug-in module
1068  	 */
1069  	int (*module_info)(struct phy_device *dev,
1070  			   struct ethtool_modinfo *modinfo);
1071  
1072  	/**
1073  	 * @module_eeprom: Get the eeprom information from the plug-in
1074  	 * module
1075  	 */
1076  	int (*module_eeprom)(struct phy_device *dev,
1077  			     struct ethtool_eeprom *ee, u8 *data);
1078  
1079  	/** @cable_test_start: Start a cable test */
1080  	int (*cable_test_start)(struct phy_device *dev);
1081  
1082  	/**  @cable_test_tdr_start: Start a raw TDR cable test */
1083  	int (*cable_test_tdr_start)(struct phy_device *dev,
1084  				    const struct phy_tdr_config *config);
1085  
1086  	/**
1087  	 * @cable_test_get_status: Once per second, or on interrupt,
1088  	 * request the status of the test.
1089  	 */
1090  	int (*cable_test_get_status)(struct phy_device *dev, bool *finished);
1091  
1092  	/* Get statistics from the PHY using ethtool */
1093  	/** @get_sset_count: Number of statistic counters */
1094  	int (*get_sset_count)(struct phy_device *dev);
1095  	/** @get_strings: Names of the statistic counters */
1096  	void (*get_strings)(struct phy_device *dev, u8 *data);
1097  	/** @get_stats: Return the statistic counter values */
1098  	void (*get_stats)(struct phy_device *dev,
1099  			  struct ethtool_stats *stats, u64 *data);
1100  
1101  	/* Get and Set PHY tunables */
1102  	/** @get_tunable: Return the value of a tunable */
1103  	int (*get_tunable)(struct phy_device *dev,
1104  			   struct ethtool_tunable *tuna, void *data);
1105  	/** @set_tunable: Set the value of a tunable */
1106  	int (*set_tunable)(struct phy_device *dev,
1107  			    struct ethtool_tunable *tuna,
1108  			    const void *data);
1109  	/** @set_loopback: Set the loopback mood of the PHY */
1110  	int (*set_loopback)(struct phy_device *dev, bool enable);
1111  	/** @get_sqi: Get the signal quality indication */
1112  	int (*get_sqi)(struct phy_device *dev);
1113  	/** @get_sqi_max: Get the maximum signal quality indication */
1114  	int (*get_sqi_max)(struct phy_device *dev);
1115  
1116  	/* PLCA RS interface */
1117  	/** @get_plca_cfg: Return the current PLCA configuration */
1118  	int (*get_plca_cfg)(struct phy_device *dev,
1119  			    struct phy_plca_cfg *plca_cfg);
1120  	/** @set_plca_cfg: Set the PLCA configuration */
1121  	int (*set_plca_cfg)(struct phy_device *dev,
1122  			    const struct phy_plca_cfg *plca_cfg);
1123  	/** @get_plca_status: Return the current PLCA status info */
1124  	int (*get_plca_status)(struct phy_device *dev,
1125  			       struct phy_plca_status *plca_st);
1126  
1127  	/**
1128  	 * @led_brightness_set: Set a PHY LED brightness. Index
1129  	 * indicates which of the PHYs led should be set. Value
1130  	 * follows the standard LED class meaning, e.g. LED_OFF,
1131  	 * LED_HALF, LED_FULL.
1132  	 */
1133  	int (*led_brightness_set)(struct phy_device *dev,
1134  				  u8 index, enum led_brightness value);
1135  
1136  	/**
1137  	 * @led_blink_set: Set a PHY LED blinking.  Index indicates
1138  	 * which of the PHYs led should be configured to blink. Delays
1139  	 * are in milliseconds and if both are zero then a sensible
1140  	 * default should be chosen.  The call should adjust the
1141  	 * timings in that case and if it can't match the values
1142  	 * specified exactly.
1143  	 */
1144  	int (*led_blink_set)(struct phy_device *dev, u8 index,
1145  			     unsigned long *delay_on,
1146  			     unsigned long *delay_off);
1147  	/**
1148  	 * @led_hw_is_supported: Can the HW support the given rules.
1149  	 * @dev: PHY device which has the LED
1150  	 * @index: Which LED of the PHY device
1151  	 * @rules The core is interested in these rules
1152  	 *
1153  	 * Return 0 if yes,  -EOPNOTSUPP if not, or an error code.
1154  	 */
1155  	int (*led_hw_is_supported)(struct phy_device *dev, u8 index,
1156  				   unsigned long rules);
1157  	/**
1158  	 * @led_hw_control_set: Set the HW to control the LED
1159  	 * @dev: PHY device which has the LED
1160  	 * @index: Which LED of the PHY device
1161  	 * @rules The rules used to control the LED
1162  	 *
1163  	 * Returns 0, or a an error code.
1164  	 */
1165  	int (*led_hw_control_set)(struct phy_device *dev, u8 index,
1166  				  unsigned long rules);
1167  	/**
1168  	 * @led_hw_control_get: Get how the HW is controlling the LED
1169  	 * @dev: PHY device which has the LED
1170  	 * @index: Which LED of the PHY device
1171  	 * @rules Pointer to the rules used to control the LED
1172  	 *
1173  	 * Set *@rules to how the HW is currently blinking. Returns 0
1174  	 * on success, or a error code if the current blinking cannot
1175  	 * be represented in rules, or some other error happens.
1176  	 */
1177  	int (*led_hw_control_get)(struct phy_device *dev, u8 index,
1178  				  unsigned long *rules);
1179  
1180  	/**
1181  	 * @led_polarity_set: Set the LED polarity modes
1182  	 * @dev: PHY device which has the LED
1183  	 * @index: Which LED of the PHY device
1184  	 * @modes: bitmap of LED polarity modes
1185  	 *
1186  	 * Configure LED with all the required polarity modes in @modes
1187  	 * to make it correctly turn ON or OFF.
1188  	 *
1189  	 * Returns 0, or an error code.
1190  	 */
1191  	int (*led_polarity_set)(struct phy_device *dev, int index,
1192  				unsigned long modes);
1193  };
1194  #define to_phy_driver(d) container_of_const(to_mdio_common_driver(d),		\
1195  				      struct phy_driver, mdiodrv)
1196  
1197  #define PHY_ANY_ID "MATCH ANY PHY"
1198  #define PHY_ANY_UID 0xffffffff
1199  
1200  #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
1201  #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
1202  #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
1203  
1204  /**
1205   * phy_id_compare - compare @id1 with @id2 taking account of @mask
1206   * @id1: first PHY ID
1207   * @id2: second PHY ID
1208   * @mask: the PHY ID mask, set bits are significant in matching
1209   *
1210   * Return true if the bits from @id1 and @id2 specified by @mask match.
1211   * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask).
1212   */
phy_id_compare(u32 id1,u32 id2,u32 mask)1213  static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask)
1214  {
1215  	return !((id1 ^ id2) & mask);
1216  }
1217  
1218  /**
1219   * phydev_id_compare - compare @id with the PHY's Clause 22 ID
1220   * @phydev: the PHY device
1221   * @id: the PHY ID to be matched
1222   *
1223   * Compare the @phydev clause 22 ID with the provided @id and return true or
1224   * false depending whether it matches, using the bound driver mask. The
1225   * @phydev must be bound to a driver.
1226   */
phydev_id_compare(struct phy_device * phydev,u32 id)1227  static inline bool phydev_id_compare(struct phy_device *phydev, u32 id)
1228  {
1229  	return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask);
1230  }
1231  
1232  /* A Structure for boards to register fixups with the PHY Lib */
1233  struct phy_fixup {
1234  	struct list_head list;
1235  	char bus_id[MII_BUS_ID_SIZE + 3];
1236  	u32 phy_uid;
1237  	u32 phy_uid_mask;
1238  	int (*run)(struct phy_device *phydev);
1239  };
1240  
1241  const char *phy_speed_to_str(int speed);
1242  const char *phy_duplex_to_str(unsigned int duplex);
1243  const char *phy_rate_matching_to_str(int rate_matching);
1244  
1245  int phy_interface_num_ports(phy_interface_t interface);
1246  
1247  /* A structure for mapping a particular speed and duplex
1248   * combination to a particular SUPPORTED and ADVERTISED value
1249   */
1250  struct phy_setting {
1251  	u32 speed;
1252  	u8 duplex;
1253  	u8 bit;
1254  };
1255  
1256  const struct phy_setting *
1257  phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
1258  		   bool exact);
1259  size_t phy_speeds(unsigned int *speeds, size_t size,
1260  		  unsigned long *mask);
1261  void of_set_phy_supported(struct phy_device *phydev);
1262  void of_set_phy_eee_broken(struct phy_device *phydev);
1263  int phy_speed_down_core(struct phy_device *phydev);
1264  
1265  /**
1266   * phy_is_started - Convenience function to check whether PHY is started
1267   * @phydev: The phy_device struct
1268   */
phy_is_started(struct phy_device * phydev)1269  static inline bool phy_is_started(struct phy_device *phydev)
1270  {
1271  	return phydev->state >= PHY_UP;
1272  }
1273  
1274  void phy_resolve_aneg_pause(struct phy_device *phydev);
1275  void phy_resolve_aneg_linkmode(struct phy_device *phydev);
1276  void phy_check_downshift(struct phy_device *phydev);
1277  
1278  /**
1279   * phy_read - Convenience function for reading a given PHY register
1280   * @phydev: the phy_device struct
1281   * @regnum: register number to read
1282   *
1283   * NOTE: MUST NOT be called from interrupt context,
1284   * because the bus read/write functions may wait for an interrupt
1285   * to conclude the operation.
1286   */
phy_read(struct phy_device * phydev,u32 regnum)1287  static inline int phy_read(struct phy_device *phydev, u32 regnum)
1288  {
1289  	return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1290  }
1291  
1292  #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
1293  				timeout_us, sleep_before_read) \
1294  ({ \
1295  	int __ret, __val; \
1296  	__ret = read_poll_timeout(__val = phy_read, val, \
1297  				  __val < 0 || (cond), \
1298  		sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
1299  	if (__val < 0) \
1300  		__ret = __val; \
1301  	if (__ret) \
1302  		phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1303  	__ret; \
1304  })
1305  
1306  /**
1307   * __phy_read - convenience function for reading a given PHY register
1308   * @phydev: the phy_device struct
1309   * @regnum: register number to read
1310   *
1311   * The caller must have taken the MDIO bus lock.
1312   */
__phy_read(struct phy_device * phydev,u32 regnum)1313  static inline int __phy_read(struct phy_device *phydev, u32 regnum)
1314  {
1315  	return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1316  }
1317  
1318  /**
1319   * phy_write - Convenience function for writing a given PHY register
1320   * @phydev: the phy_device struct
1321   * @regnum: register number to write
1322   * @val: value to write to @regnum
1323   *
1324   * NOTE: MUST NOT be called from interrupt context,
1325   * because the bus read/write functions may wait for an interrupt
1326   * to conclude the operation.
1327   */
phy_write(struct phy_device * phydev,u32 regnum,u16 val)1328  static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1329  {
1330  	return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
1331  }
1332  
1333  /**
1334   * __phy_write - Convenience function for writing a given PHY register
1335   * @phydev: the phy_device struct
1336   * @regnum: register number to write
1337   * @val: value to write to @regnum
1338   *
1339   * The caller must have taken the MDIO bus lock.
1340   */
__phy_write(struct phy_device * phydev,u32 regnum,u16 val)1341  static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1342  {
1343  	return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
1344  			       val);
1345  }
1346  
1347  /**
1348   * __phy_modify_changed() - Convenience function for modifying a PHY register
1349   * @phydev: a pointer to a &struct phy_device
1350   * @regnum: register number
1351   * @mask: bit mask of bits to clear
1352   * @set: bit mask of bits to set
1353   *
1354   * Unlocked helper function which allows a PHY register to be modified as
1355   * new register value = (old register value & ~mask) | set
1356   *
1357   * Returns negative errno, 0 if there was no change, and 1 in case of change
1358   */
__phy_modify_changed(struct phy_device * phydev,u32 regnum,u16 mask,u16 set)1359  static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum,
1360  				       u16 mask, u16 set)
1361  {
1362  	return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr,
1363  					regnum, mask, set);
1364  }
1365  
1366  /*
1367   * phy_read_mmd - Convenience function for reading a register
1368   * from an MMD on a given PHY.
1369   */
1370  int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1371  
1372  /**
1373   * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
1374   *                             condition is met or a timeout occurs
1375   *
1376   * @phydev: The phy_device struct
1377   * @devaddr: The MMD to read from
1378   * @regnum: The register on the MMD to read
1379   * @val: Variable to read the register into
1380   * @cond: Break condition (usually involving @val)
1381   * @sleep_us: Maximum time to sleep between reads in us (0
1382   *            tight-loops).  Should be less than ~20ms since usleep_range
1383   *            is used (see Documentation/timers/timers-howto.rst).
1384   * @timeout_us: Timeout in us, 0 means never timeout
1385   * @sleep_before_read: if it is true, sleep @sleep_us before read.
1386   * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
1387   * case, the last read value at @args is stored in @val. Must not
1388   * be called from atomic context if sleep_us or timeout_us are used.
1389   */
1390  #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
1391  				  sleep_us, timeout_us, sleep_before_read) \
1392  ({ \
1393  	int __ret, __val; \
1394  	__ret = read_poll_timeout(__val = phy_read_mmd, val, \
1395  				  __val < 0 || (cond), \
1396  				  sleep_us, timeout_us, sleep_before_read, \
1397  				  phydev, devaddr, regnum); \
1398  	if (__val < 0) \
1399  		__ret = __val; \
1400  	if (__ret) \
1401  		phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1402  	__ret; \
1403  })
1404  
1405  /*
1406   * __phy_read_mmd - Convenience function for reading a register
1407   * from an MMD on a given PHY.
1408   */
1409  int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1410  
1411  /*
1412   * phy_write_mmd - Convenience function for writing a register
1413   * on an MMD on a given PHY.
1414   */
1415  int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1416  
1417  /*
1418   * __phy_write_mmd - Convenience function for writing a register
1419   * on an MMD on a given PHY.
1420   */
1421  int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1422  
1423  int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1424  			 u16 set);
1425  int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1426  		       u16 set);
1427  int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1428  int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1429  
1430  int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1431  			     u16 mask, u16 set);
1432  int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1433  			   u16 mask, u16 set);
1434  int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1435  		     u16 mask, u16 set);
1436  int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1437  		   u16 mask, u16 set);
1438  
1439  /**
1440   * __phy_set_bits - Convenience function for setting bits in a PHY register
1441   * @phydev: the phy_device struct
1442   * @regnum: register number to write
1443   * @val: bits to set
1444   *
1445   * The caller must have taken the MDIO bus lock.
1446   */
__phy_set_bits(struct phy_device * phydev,u32 regnum,u16 val)1447  static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1448  {
1449  	return __phy_modify(phydev, regnum, 0, val);
1450  }
1451  
1452  /**
1453   * __phy_clear_bits - Convenience function for clearing bits in a PHY register
1454   * @phydev: the phy_device struct
1455   * @regnum: register number to write
1456   * @val: bits to clear
1457   *
1458   * The caller must have taken the MDIO bus lock.
1459   */
__phy_clear_bits(struct phy_device * phydev,u32 regnum,u16 val)1460  static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
1461  				   u16 val)
1462  {
1463  	return __phy_modify(phydev, regnum, val, 0);
1464  }
1465  
1466  /**
1467   * phy_set_bits - Convenience function for setting bits in a PHY register
1468   * @phydev: the phy_device struct
1469   * @regnum: register number to write
1470   * @val: bits to set
1471   */
phy_set_bits(struct phy_device * phydev,u32 regnum,u16 val)1472  static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1473  {
1474  	return phy_modify(phydev, regnum, 0, val);
1475  }
1476  
1477  /**
1478   * phy_clear_bits - Convenience function for clearing bits in a PHY register
1479   * @phydev: the phy_device struct
1480   * @regnum: register number to write
1481   * @val: bits to clear
1482   */
phy_clear_bits(struct phy_device * phydev,u32 regnum,u16 val)1483  static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
1484  {
1485  	return phy_modify(phydev, regnum, val, 0);
1486  }
1487  
1488  /**
1489   * __phy_set_bits_mmd - Convenience function for setting bits in a register
1490   * on MMD
1491   * @phydev: the phy_device struct
1492   * @devad: the MMD containing register to modify
1493   * @regnum: register number to modify
1494   * @val: bits to set
1495   *
1496   * The caller must have taken the MDIO bus lock.
1497   */
__phy_set_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1498  static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
1499  		u32 regnum, u16 val)
1500  {
1501  	return __phy_modify_mmd(phydev, devad, regnum, 0, val);
1502  }
1503  
1504  /**
1505   * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
1506   * on MMD
1507   * @phydev: the phy_device struct
1508   * @devad: the MMD containing register to modify
1509   * @regnum: register number to modify
1510   * @val: bits to clear
1511   *
1512   * The caller must have taken the MDIO bus lock.
1513   */
__phy_clear_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1514  static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1515  		u32 regnum, u16 val)
1516  {
1517  	return __phy_modify_mmd(phydev, devad, regnum, val, 0);
1518  }
1519  
1520  /**
1521   * phy_set_bits_mmd - Convenience function for setting bits in a register
1522   * on MMD
1523   * @phydev: the phy_device struct
1524   * @devad: the MMD containing register to modify
1525   * @regnum: register number to modify
1526   * @val: bits to set
1527   */
phy_set_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1528  static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
1529  		u32 regnum, u16 val)
1530  {
1531  	return phy_modify_mmd(phydev, devad, regnum, 0, val);
1532  }
1533  
1534  /**
1535   * phy_clear_bits_mmd - Convenience function for clearing bits in a register
1536   * on MMD
1537   * @phydev: the phy_device struct
1538   * @devad: the MMD containing register to modify
1539   * @regnum: register number to modify
1540   * @val: bits to clear
1541   */
phy_clear_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1542  static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1543  		u32 regnum, u16 val)
1544  {
1545  	return phy_modify_mmd(phydev, devad, regnum, val, 0);
1546  }
1547  
1548  /**
1549   * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
1550   * @phydev: the phy_device struct
1551   *
1552   * NOTE: must be kept in sync with addition/removal of PHY_POLL and
1553   * PHY_MAC_INTERRUPT
1554   */
phy_interrupt_is_valid(struct phy_device * phydev)1555  static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
1556  {
1557  	return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT;
1558  }
1559  
1560  /**
1561   * phy_polling_mode - Convenience function for testing whether polling is
1562   * used to detect PHY status changes
1563   * @phydev: the phy_device struct
1564   */
phy_polling_mode(struct phy_device * phydev)1565  static inline bool phy_polling_mode(struct phy_device *phydev)
1566  {
1567  	if (phydev->state == PHY_CABLETEST)
1568  		if (phydev->drv->flags & PHY_POLL_CABLE_TEST)
1569  			return true;
1570  
1571  	return phydev->irq == PHY_POLL;
1572  }
1573  
1574  /**
1575   * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
1576   * @phydev: the phy_device struct
1577   */
phy_has_hwtstamp(struct phy_device * phydev)1578  static inline bool phy_has_hwtstamp(struct phy_device *phydev)
1579  {
1580  	return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
1581  }
1582  
1583  /**
1584   * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
1585   * @phydev: the phy_device struct
1586   */
phy_has_rxtstamp(struct phy_device * phydev)1587  static inline bool phy_has_rxtstamp(struct phy_device *phydev)
1588  {
1589  	return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
1590  }
1591  
1592  /**
1593   * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
1594   * PTP hardware clock capabilities.
1595   * @phydev: the phy_device struct
1596   */
phy_has_tsinfo(struct phy_device * phydev)1597  static inline bool phy_has_tsinfo(struct phy_device *phydev)
1598  {
1599  	return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
1600  }
1601  
1602  /**
1603   * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
1604   * @phydev: the phy_device struct
1605   */
phy_has_txtstamp(struct phy_device * phydev)1606  static inline bool phy_has_txtstamp(struct phy_device *phydev)
1607  {
1608  	return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
1609  }
1610  
phy_hwtstamp(struct phy_device * phydev,struct kernel_hwtstamp_config * cfg,struct netlink_ext_ack * extack)1611  static inline int phy_hwtstamp(struct phy_device *phydev,
1612  			       struct kernel_hwtstamp_config *cfg,
1613  			       struct netlink_ext_ack *extack)
1614  {
1615  	return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack);
1616  }
1617  
phy_rxtstamp(struct phy_device * phydev,struct sk_buff * skb,int type)1618  static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
1619  				int type)
1620  {
1621  	return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
1622  }
1623  
phy_ts_info(struct phy_device * phydev,struct kernel_ethtool_ts_info * tsinfo)1624  static inline int phy_ts_info(struct phy_device *phydev,
1625  			      struct kernel_ethtool_ts_info *tsinfo)
1626  {
1627  	return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
1628  }
1629  
phy_txtstamp(struct phy_device * phydev,struct sk_buff * skb,int type)1630  static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
1631  				int type)
1632  {
1633  	phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
1634  }
1635  
1636  /**
1637   * phy_is_default_hwtstamp - Is the PHY hwtstamp the default timestamp
1638   * @phydev: Pointer to phy_device
1639   *
1640   * This is used to get default timestamping device taking into account
1641   * the new API choice, which is selecting the timestamping from MAC by
1642   * default if the phydev does not have default_timestamp flag enabled.
1643   *
1644   * Return: True if phy is the default hw timestamp, false otherwise.
1645   */
phy_is_default_hwtstamp(struct phy_device * phydev)1646  static inline bool phy_is_default_hwtstamp(struct phy_device *phydev)
1647  {
1648  	return phy_has_hwtstamp(phydev) && phydev->default_timestamp;
1649  }
1650  
1651  /**
1652   * phy_is_internal - Convenience function for testing if a PHY is internal
1653   * @phydev: the phy_device struct
1654   */
phy_is_internal(struct phy_device * phydev)1655  static inline bool phy_is_internal(struct phy_device *phydev)
1656  {
1657  	return phydev->is_internal;
1658  }
1659  
1660  /**
1661   * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module
1662   * @phydev: the phy_device struct
1663   */
phy_on_sfp(struct phy_device * phydev)1664  static inline bool phy_on_sfp(struct phy_device *phydev)
1665  {
1666  	return phydev->is_on_sfp_module;
1667  }
1668  
1669  /**
1670   * phy_interface_mode_is_rgmii - Convenience function for testing if a
1671   * PHY interface mode is RGMII (all variants)
1672   * @mode: the &phy_interface_t enum
1673   */
phy_interface_mode_is_rgmii(phy_interface_t mode)1674  static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
1675  {
1676  	return mode >= PHY_INTERFACE_MODE_RGMII &&
1677  		mode <= PHY_INTERFACE_MODE_RGMII_TXID;
1678  };
1679  
1680  /**
1681   * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z
1682   *   negotiation
1683   * @mode: one of &enum phy_interface_t
1684   *
1685   * Returns true if the PHY interface mode uses the 16-bit negotiation
1686   * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1687   */
phy_interface_mode_is_8023z(phy_interface_t mode)1688  static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
1689  {
1690  	return mode == PHY_INTERFACE_MODE_1000BASEX ||
1691  	       mode == PHY_INTERFACE_MODE_2500BASEX;
1692  }
1693  
1694  /**
1695   * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1696   * is RGMII (all variants)
1697   * @phydev: the phy_device struct
1698   */
phy_interface_is_rgmii(struct phy_device * phydev)1699  static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
1700  {
1701  	return phy_interface_mode_is_rgmii(phydev->interface);
1702  };
1703  
1704  /**
1705   * phy_is_pseudo_fixed_link - Convenience function for testing if this
1706   * PHY is the CPU port facing side of an Ethernet switch, or similar.
1707   * @phydev: the phy_device struct
1708   */
phy_is_pseudo_fixed_link(struct phy_device * phydev)1709  static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
1710  {
1711  	return phydev->is_pseudo_fixed_link;
1712  }
1713  
1714  int phy_save_page(struct phy_device *phydev);
1715  int phy_select_page(struct phy_device *phydev, int page);
1716  int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
1717  int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
1718  int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
1719  int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1720  			     u16 mask, u16 set);
1721  int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1722  		     u16 mask, u16 set);
1723  
1724  struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
1725  				     bool is_c45,
1726  				     struct phy_c45_device_ids *c45_ids);
1727  #if IS_ENABLED(CONFIG_PHYLIB)
1728  int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id);
1729  struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode);
1730  struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode);
1731  struct phy_device *device_phy_find_device(struct device *dev);
1732  struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode);
1733  struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1734  int phy_device_register(struct phy_device *phy);
1735  void phy_device_free(struct phy_device *phydev);
1736  #else
fwnode_get_phy_id(struct fwnode_handle * fwnode,u32 * phy_id)1737  static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id)
1738  {
1739  	return 0;
1740  }
1741  static inline
fwnode_mdio_find_device(struct fwnode_handle * fwnode)1742  struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode)
1743  {
1744  	return 0;
1745  }
1746  
1747  static inline
fwnode_phy_find_device(struct fwnode_handle * phy_fwnode)1748  struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode)
1749  {
1750  	return NULL;
1751  }
1752  
device_phy_find_device(struct device * dev)1753  static inline struct phy_device *device_phy_find_device(struct device *dev)
1754  {
1755  	return NULL;
1756  }
1757  
1758  static inline
fwnode_get_phy_node(struct fwnode_handle * fwnode)1759  struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode)
1760  {
1761  	return NULL;
1762  }
1763  
1764  static inline
get_phy_device(struct mii_bus * bus,int addr,bool is_c45)1765  struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1766  {
1767  	return NULL;
1768  }
1769  
phy_device_register(struct phy_device * phy)1770  static inline int phy_device_register(struct phy_device *phy)
1771  {
1772  	return 0;
1773  }
1774  
phy_device_free(struct phy_device * phydev)1775  static inline void phy_device_free(struct phy_device *phydev) { }
1776  #endif /* CONFIG_PHYLIB */
1777  void phy_device_remove(struct phy_device *phydev);
1778  int phy_get_c45_ids(struct phy_device *phydev);
1779  int phy_init_hw(struct phy_device *phydev);
1780  int phy_suspend(struct phy_device *phydev);
1781  int phy_resume(struct phy_device *phydev);
1782  int __phy_resume(struct phy_device *phydev);
1783  int phy_loopback(struct phy_device *phydev, bool enable);
1784  int phy_sfp_connect_phy(void *upstream, struct phy_device *phy);
1785  void phy_sfp_disconnect_phy(void *upstream, struct phy_device *phy);
1786  void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
1787  void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
1788  int phy_sfp_probe(struct phy_device *phydev,
1789  	          const struct sfp_upstream_ops *ops);
1790  struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1791  			      phy_interface_t interface);
1792  struct phy_device *phy_find_first(struct mii_bus *bus);
1793  int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1794  		      u32 flags, phy_interface_t interface);
1795  int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1796  		       void (*handler)(struct net_device *),
1797  		       phy_interface_t interface);
1798  struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1799  			       void (*handler)(struct net_device *),
1800  			       phy_interface_t interface);
1801  void phy_disconnect(struct phy_device *phydev);
1802  void phy_detach(struct phy_device *phydev);
1803  void phy_start(struct phy_device *phydev);
1804  void phy_stop(struct phy_device *phydev);
1805  int phy_config_aneg(struct phy_device *phydev);
1806  int _phy_start_aneg(struct phy_device *phydev);
1807  int phy_start_aneg(struct phy_device *phydev);
1808  int phy_aneg_done(struct phy_device *phydev);
1809  int phy_speed_down(struct phy_device *phydev, bool sync);
1810  int phy_speed_up(struct phy_device *phydev);
1811  bool phy_check_valid(int speed, int duplex, unsigned long *features);
1812  
1813  int phy_restart_aneg(struct phy_device *phydev);
1814  int phy_reset_after_clk_enable(struct phy_device *phydev);
1815  
1816  #if IS_ENABLED(CONFIG_PHYLIB)
1817  int phy_start_cable_test(struct phy_device *phydev,
1818  			 struct netlink_ext_ack *extack);
1819  int phy_start_cable_test_tdr(struct phy_device *phydev,
1820  			     struct netlink_ext_ack *extack,
1821  			     const struct phy_tdr_config *config);
1822  #else
1823  static inline
phy_start_cable_test(struct phy_device * phydev,struct netlink_ext_ack * extack)1824  int phy_start_cable_test(struct phy_device *phydev,
1825  			 struct netlink_ext_ack *extack)
1826  {
1827  	NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1828  	return -EOPNOTSUPP;
1829  }
1830  static inline
phy_start_cable_test_tdr(struct phy_device * phydev,struct netlink_ext_ack * extack,const struct phy_tdr_config * config)1831  int phy_start_cable_test_tdr(struct phy_device *phydev,
1832  			     struct netlink_ext_ack *extack,
1833  			     const struct phy_tdr_config *config)
1834  {
1835  	NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1836  	return -EOPNOTSUPP;
1837  }
1838  #endif
1839  
phy_device_reset(struct phy_device * phydev,int value)1840  static inline void phy_device_reset(struct phy_device *phydev, int value)
1841  {
1842  	mdio_device_reset(&phydev->mdio, value);
1843  }
1844  
1845  #define phydev_err(_phydev, format, args...)	\
1846  	dev_err(&_phydev->mdio.dev, format, ##args)
1847  
1848  #define phydev_err_probe(_phydev, err, format, args...)	\
1849  	dev_err_probe(&_phydev->mdio.dev, err, format, ##args)
1850  
1851  #define phydev_info(_phydev, format, args...)	\
1852  	dev_info(&_phydev->mdio.dev, format, ##args)
1853  
1854  #define phydev_warn(_phydev, format, args...)	\
1855  	dev_warn(&_phydev->mdio.dev, format, ##args)
1856  
1857  #define phydev_dbg(_phydev, format, args...)	\
1858  	dev_dbg(&_phydev->mdio.dev, format, ##args)
1859  
phydev_name(const struct phy_device * phydev)1860  static inline const char *phydev_name(const struct phy_device *phydev)
1861  {
1862  	return dev_name(&phydev->mdio.dev);
1863  }
1864  
phy_lock_mdio_bus(struct phy_device * phydev)1865  static inline void phy_lock_mdio_bus(struct phy_device *phydev)
1866  {
1867  	mutex_lock(&phydev->mdio.bus->mdio_lock);
1868  }
1869  
phy_unlock_mdio_bus(struct phy_device * phydev)1870  static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
1871  {
1872  	mutex_unlock(&phydev->mdio.bus->mdio_lock);
1873  }
1874  
1875  void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1876  	__printf(2, 3);
1877  char *phy_attached_info_irq(struct phy_device *phydev)
1878  	__malloc;
1879  void phy_attached_info(struct phy_device *phydev);
1880  
1881  /* Clause 22 PHY */
1882  int genphy_read_abilities(struct phy_device *phydev);
1883  int genphy_setup_forced(struct phy_device *phydev);
1884  int genphy_restart_aneg(struct phy_device *phydev);
1885  int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1886  int genphy_config_eee_advert(struct phy_device *phydev);
1887  int __genphy_config_aneg(struct phy_device *phydev, bool changed);
1888  int genphy_aneg_done(struct phy_device *phydev);
1889  int genphy_update_link(struct phy_device *phydev);
1890  int genphy_read_lpa(struct phy_device *phydev);
1891  int genphy_read_status_fixed(struct phy_device *phydev);
1892  int genphy_read_status(struct phy_device *phydev);
1893  int genphy_read_master_slave(struct phy_device *phydev);
1894  int genphy_suspend(struct phy_device *phydev);
1895  int genphy_resume(struct phy_device *phydev);
1896  int genphy_loopback(struct phy_device *phydev, bool enable);
1897  int genphy_soft_reset(struct phy_device *phydev);
1898  irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev);
1899  
genphy_config_aneg(struct phy_device * phydev)1900  static inline int genphy_config_aneg(struct phy_device *phydev)
1901  {
1902  	return __genphy_config_aneg(phydev, false);
1903  }
1904  
genphy_no_config_intr(struct phy_device * phydev)1905  static inline int genphy_no_config_intr(struct phy_device *phydev)
1906  {
1907  	return 0;
1908  }
1909  int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1910  				u16 regnum);
1911  int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1912  				 u16 regnum, u16 val);
1913  
1914  /* Clause 37 */
1915  int genphy_c37_config_aneg(struct phy_device *phydev);
1916  int genphy_c37_read_status(struct phy_device *phydev, bool *changed);
1917  
1918  /* Clause 45 PHY */
1919  int genphy_c45_restart_aneg(struct phy_device *phydev);
1920  int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1921  int genphy_c45_aneg_done(struct phy_device *phydev);
1922  int genphy_c45_read_link(struct phy_device *phydev);
1923  int genphy_c45_read_lpa(struct phy_device *phydev);
1924  int genphy_c45_read_pma(struct phy_device *phydev);
1925  int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1926  int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev);
1927  int genphy_c45_an_config_aneg(struct phy_device *phydev);
1928  int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1929  int genphy_c45_read_mdix(struct phy_device *phydev);
1930  int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1931  int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev);
1932  int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev);
1933  int genphy_c45_read_eee_abilities(struct phy_device *phydev);
1934  int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev);
1935  int genphy_c45_read_status(struct phy_device *phydev);
1936  int genphy_c45_baset1_read_status(struct phy_device *phydev);
1937  int genphy_c45_config_aneg(struct phy_device *phydev);
1938  int genphy_c45_loopback(struct phy_device *phydev, bool enable);
1939  int genphy_c45_pma_resume(struct phy_device *phydev);
1940  int genphy_c45_pma_suspend(struct phy_device *phydev);
1941  int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable);
1942  int genphy_c45_plca_get_cfg(struct phy_device *phydev,
1943  			    struct phy_plca_cfg *plca_cfg);
1944  int genphy_c45_plca_set_cfg(struct phy_device *phydev,
1945  			    const struct phy_plca_cfg *plca_cfg);
1946  int genphy_c45_plca_get_status(struct phy_device *phydev,
1947  			       struct phy_plca_status *plca_st);
1948  int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv,
1949  			     unsigned long *lp, bool *is_enabled);
1950  int genphy_c45_ethtool_get_eee(struct phy_device *phydev,
1951  			       struct ethtool_keee *data);
1952  int genphy_c45_ethtool_set_eee(struct phy_device *phydev,
1953  			       struct ethtool_keee *data);
1954  int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv);
1955  int genphy_c45_an_config_eee_aneg(struct phy_device *phydev);
1956  int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv);
1957  
1958  /* Generic C45 PHY driver */
1959  extern struct phy_driver genphy_c45_driver;
1960  
1961  /* The gen10g_* functions are the old Clause 45 stub */
1962  int gen10g_config_aneg(struct phy_device *phydev);
1963  
phy_read_status(struct phy_device * phydev)1964  static inline int phy_read_status(struct phy_device *phydev)
1965  {
1966  	if (!phydev->drv)
1967  		return -EIO;
1968  
1969  	if (phydev->drv->read_status)
1970  		return phydev->drv->read_status(phydev);
1971  	else
1972  		return genphy_read_status(phydev);
1973  }
1974  
1975  void phy_driver_unregister(struct phy_driver *drv);
1976  void phy_drivers_unregister(struct phy_driver *drv, int n);
1977  int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1978  int phy_drivers_register(struct phy_driver *new_driver, int n,
1979  			 struct module *owner);
1980  void phy_error(struct phy_device *phydev);
1981  void phy_state_machine(struct work_struct *work);
1982  void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
1983  void phy_trigger_machine(struct phy_device *phydev);
1984  void phy_mac_interrupt(struct phy_device *phydev);
1985  void phy_start_machine(struct phy_device *phydev);
1986  void phy_stop_machine(struct phy_device *phydev);
1987  void phy_ethtool_ksettings_get(struct phy_device *phydev,
1988  			       struct ethtool_link_ksettings *cmd);
1989  int phy_ethtool_ksettings_set(struct phy_device *phydev,
1990  			      const struct ethtool_link_ksettings *cmd);
1991  int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1992  int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
1993  int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
1994  int phy_disable_interrupts(struct phy_device *phydev);
1995  void phy_request_interrupt(struct phy_device *phydev);
1996  void phy_free_interrupt(struct phy_device *phydev);
1997  void phy_print_status(struct phy_device *phydev);
1998  int phy_get_rate_matching(struct phy_device *phydev,
1999  			    phy_interface_t iface);
2000  void phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
2001  void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
2002  void phy_advertise_supported(struct phy_device *phydev);
2003  void phy_advertise_eee_all(struct phy_device *phydev);
2004  void phy_support_sym_pause(struct phy_device *phydev);
2005  void phy_support_asym_pause(struct phy_device *phydev);
2006  void phy_support_eee(struct phy_device *phydev);
2007  void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
2008  		       bool autoneg);
2009  void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
2010  bool phy_validate_pause(struct phy_device *phydev,
2011  			struct ethtool_pauseparam *pp);
2012  void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
2013  
2014  s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
2015  			   const int *delay_values, int size, bool is_rx);
2016  
2017  void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
2018  		       bool *tx_pause, bool *rx_pause);
2019  
2020  int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
2021  		       int (*run)(struct phy_device *));
2022  int phy_register_fixup_for_id(const char *bus_id,
2023  			      int (*run)(struct phy_device *));
2024  int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
2025  			       int (*run)(struct phy_device *));
2026  
2027  int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
2028  int phy_unregister_fixup_for_id(const char *bus_id);
2029  int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
2030  
2031  int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
2032  int phy_get_eee_err(struct phy_device *phydev);
2033  int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data);
2034  int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data);
2035  int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
2036  void phy_ethtool_get_wol(struct phy_device *phydev,
2037  			 struct ethtool_wolinfo *wol);
2038  int phy_ethtool_get_link_ksettings(struct net_device *ndev,
2039  				   struct ethtool_link_ksettings *cmd);
2040  int phy_ethtool_set_link_ksettings(struct net_device *ndev,
2041  				   const struct ethtool_link_ksettings *cmd);
2042  int phy_ethtool_nway_reset(struct net_device *ndev);
2043  int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size);
2044  int of_phy_package_join(struct phy_device *phydev, size_t priv_size);
2045  void phy_package_leave(struct phy_device *phydev);
2046  int devm_phy_package_join(struct device *dev, struct phy_device *phydev,
2047  			  int base_addr, size_t priv_size);
2048  int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev,
2049  			     size_t priv_size);
2050  
2051  int __init mdio_bus_init(void);
2052  void mdio_bus_exit(void);
2053  
2054  int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data);
2055  int phy_ethtool_get_sset_count(struct phy_device *phydev);
2056  int phy_ethtool_get_stats(struct phy_device *phydev,
2057  			  struct ethtool_stats *stats, u64 *data);
2058  int phy_ethtool_get_plca_cfg(struct phy_device *phydev,
2059  			     struct phy_plca_cfg *plca_cfg);
2060  int phy_ethtool_set_plca_cfg(struct phy_device *phydev,
2061  			     const struct phy_plca_cfg *plca_cfg,
2062  			     struct netlink_ext_ack *extack);
2063  int phy_ethtool_get_plca_status(struct phy_device *phydev,
2064  				struct phy_plca_status *plca_st);
2065  
2066  int __phy_hwtstamp_get(struct phy_device *phydev,
2067  		       struct kernel_hwtstamp_config *config);
2068  int __phy_hwtstamp_set(struct phy_device *phydev,
2069  		       struct kernel_hwtstamp_config *config,
2070  		       struct netlink_ext_ack *extack);
2071  
phy_package_address(struct phy_device * phydev,unsigned int addr_offset)2072  static inline int phy_package_address(struct phy_device *phydev,
2073  				      unsigned int addr_offset)
2074  {
2075  	struct phy_package_shared *shared = phydev->shared;
2076  	u8 base_addr = shared->base_addr;
2077  
2078  	if (addr_offset >= PHY_MAX_ADDR - base_addr)
2079  		return -EIO;
2080  
2081  	/* we know that addr will be in the range 0..31 and thus the
2082  	 * implicit cast to a signed int is not a problem.
2083  	 */
2084  	return base_addr + addr_offset;
2085  }
2086  
phy_package_read(struct phy_device * phydev,unsigned int addr_offset,u32 regnum)2087  static inline int phy_package_read(struct phy_device *phydev,
2088  				   unsigned int addr_offset, u32 regnum)
2089  {
2090  	int addr = phy_package_address(phydev, addr_offset);
2091  
2092  	if (addr < 0)
2093  		return addr;
2094  
2095  	return mdiobus_read(phydev->mdio.bus, addr, regnum);
2096  }
2097  
__phy_package_read(struct phy_device * phydev,unsigned int addr_offset,u32 regnum)2098  static inline int __phy_package_read(struct phy_device *phydev,
2099  				     unsigned int addr_offset, u32 regnum)
2100  {
2101  	int addr = phy_package_address(phydev, addr_offset);
2102  
2103  	if (addr < 0)
2104  		return addr;
2105  
2106  	return __mdiobus_read(phydev->mdio.bus, addr, regnum);
2107  }
2108  
phy_package_write(struct phy_device * phydev,unsigned int addr_offset,u32 regnum,u16 val)2109  static inline int phy_package_write(struct phy_device *phydev,
2110  				    unsigned int addr_offset, u32 regnum,
2111  				    u16 val)
2112  {
2113  	int addr = phy_package_address(phydev, addr_offset);
2114  
2115  	if (addr < 0)
2116  		return addr;
2117  
2118  	return mdiobus_write(phydev->mdio.bus, addr, regnum, val);
2119  }
2120  
__phy_package_write(struct phy_device * phydev,unsigned int addr_offset,u32 regnum,u16 val)2121  static inline int __phy_package_write(struct phy_device *phydev,
2122  				      unsigned int addr_offset, u32 regnum,
2123  				      u16 val)
2124  {
2125  	int addr = phy_package_address(phydev, addr_offset);
2126  
2127  	if (addr < 0)
2128  		return addr;
2129  
2130  	return __mdiobus_write(phydev->mdio.bus, addr, regnum, val);
2131  }
2132  
2133  int __phy_package_read_mmd(struct phy_device *phydev,
2134  			   unsigned int addr_offset, int devad,
2135  			   u32 regnum);
2136  
2137  int phy_package_read_mmd(struct phy_device *phydev,
2138  			 unsigned int addr_offset, int devad,
2139  			 u32 regnum);
2140  
2141  int __phy_package_write_mmd(struct phy_device *phydev,
2142  			    unsigned int addr_offset, int devad,
2143  			    u32 regnum, u16 val);
2144  
2145  int phy_package_write_mmd(struct phy_device *phydev,
2146  			  unsigned int addr_offset, int devad,
2147  			  u32 regnum, u16 val);
2148  
__phy_package_set_once(struct phy_device * phydev,unsigned int b)2149  static inline bool __phy_package_set_once(struct phy_device *phydev,
2150  					  unsigned int b)
2151  {
2152  	struct phy_package_shared *shared = phydev->shared;
2153  
2154  	if (!shared)
2155  		return false;
2156  
2157  	return !test_and_set_bit(b, &shared->flags);
2158  }
2159  
phy_package_init_once(struct phy_device * phydev)2160  static inline bool phy_package_init_once(struct phy_device *phydev)
2161  {
2162  	return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE);
2163  }
2164  
phy_package_probe_once(struct phy_device * phydev)2165  static inline bool phy_package_probe_once(struct phy_device *phydev)
2166  {
2167  	return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE);
2168  }
2169  
2170  extern const struct bus_type mdio_bus_type;
2171  
2172  struct mdio_board_info {
2173  	const char	*bus_id;
2174  	char		modalias[MDIO_NAME_SIZE];
2175  	int		mdio_addr;
2176  	const void	*platform_data;
2177  };
2178  
2179  #if IS_ENABLED(CONFIG_MDIO_DEVICE)
2180  int mdiobus_register_board_info(const struct mdio_board_info *info,
2181  				unsigned int n);
2182  #else
mdiobus_register_board_info(const struct mdio_board_info * i,unsigned int n)2183  static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
2184  					      unsigned int n)
2185  {
2186  	return 0;
2187  }
2188  #endif
2189  
2190  
2191  /**
2192   * phy_module_driver() - Helper macro for registering PHY drivers
2193   * @__phy_drivers: array of PHY drivers to register
2194   * @__count: Numbers of members in array
2195   *
2196   * Helper macro for PHY drivers which do not do anything special in module
2197   * init/exit. Each module may only use this macro once, and calling it
2198   * replaces module_init() and module_exit().
2199   */
2200  #define phy_module_driver(__phy_drivers, __count)			\
2201  static int __init phy_module_init(void)					\
2202  {									\
2203  	return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
2204  }									\
2205  module_init(phy_module_init);						\
2206  static void __exit phy_module_exit(void)				\
2207  {									\
2208  	phy_drivers_unregister(__phy_drivers, __count);			\
2209  }									\
2210  module_exit(phy_module_exit)
2211  
2212  #define module_phy_driver(__phy_drivers)				\
2213  	phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
2214  
2215  bool phy_driver_is_genphy(struct phy_device *phydev);
2216  bool phy_driver_is_genphy_10g(struct phy_device *phydev);
2217  
2218  #endif /* __PHY_H */
2219