1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DAL_HUBP_H__ 27 #define __DAL_HUBP_H__ 28 29 /** 30 * DOC: overview 31 * 32 * Display Controller Hub (DCHUB) is the gateway between the Scalable Data Port 33 * (SDP) and DCN. This component has multiple features, such as memory 34 * arbitration, rotation, and cursor manipulation. 35 * 36 * There is one HUBP allocated per pipe, which fetches data and converts 37 * different pixel formats (i.e. ARGB8888, NV12, etc) into linear, interleaved 38 * and fixed-depth streams of pixel data. 39 */ 40 41 #include "mem_input.h" 42 #include "cursor_reg_cache.h" 43 44 #include "dml2/dml21/inc/dml_top_dchub_registers.h" 45 46 #define OPP_ID_INVALID 0xf 47 #define MAX_TTU 0xffffff 48 49 enum cursor_pitch { 50 CURSOR_PITCH_64_PIXELS = 0, 51 CURSOR_PITCH_128_PIXELS, 52 CURSOR_PITCH_256_PIXELS 53 }; 54 55 enum cursor_lines_per_chunk { 56 CURSOR_LINE_PER_CHUNK_1 = 0, /* new for DCN2 */ 57 CURSOR_LINE_PER_CHUNK_2 = 1, 58 CURSOR_LINE_PER_CHUNK_4, 59 CURSOR_LINE_PER_CHUNK_8, 60 CURSOR_LINE_PER_CHUNK_16 61 }; 62 63 enum hubp_ind_block_size { 64 hubp_ind_block_unconstrained = 0, 65 hubp_ind_block_64b, 66 hubp_ind_block_128b, 67 hubp_ind_block_64b_no_128bcl, 68 }; 69 70 enum hubp_3dlut_fl_mode { 71 hubp_3dlut_fl_mode_disable = 0, 72 hubp_3dlut_fl_mode_native_1 = 1, 73 hubp_3dlut_fl_mode_native_2 = 2, 74 hubp_3dlut_fl_mode_transform = 3 75 }; 76 77 enum hubp_3dlut_fl_format { 78 hubp_3dlut_fl_format_unorm_12msb_bitslice = 0, 79 hubp_3dlut_fl_format_unorm_12lsb_bitslice = 1, 80 hubp_3dlut_fl_format_float_fp1_5_10 = 2 81 }; 82 83 enum hubp_3dlut_fl_addressing_mode { 84 hubp_3dlut_fl_addressing_mode_sw_linear = 0, 85 hubp_3dlut_fl_addressing_mode_simple_linear = 1 86 }; 87 88 enum hubp_3dlut_fl_width { 89 hubp_3dlut_fl_width_17 = 17, 90 hubp_3dlut_fl_width_33 = 33, 91 hubp_3dlut_fl_width_transformed = 4916 92 }; 93 94 enum hubp_3dlut_fl_crossbar_bit_slice { 95 hubp_3dlut_fl_crossbar_bit_slice_0_15 = 0, 96 hubp_3dlut_fl_crossbar_bit_slice_16_31 = 1, 97 hubp_3dlut_fl_crossbar_bit_slice_32_47 = 2, 98 hubp_3dlut_fl_crossbar_bit_slice_48_63 = 3 99 }; 100 101 struct hubp { 102 const struct hubp_funcs *funcs; 103 struct dc_context *ctx; 104 struct dc_plane_address request_address; 105 int inst; 106 107 /* run time states */ 108 int opp_id; 109 int mpcc_id; 110 struct dc_cursor_attributes curs_attr; 111 struct dc_cursor_position curs_pos; 112 bool power_gated; 113 114 struct cursor_position_cache_hubp pos; 115 struct cursor_attribute_cache_hubp att; 116 struct cursor_rect cur_rect; 117 }; 118 119 struct surface_flip_registers { 120 uint32_t DCSURF_SURFACE_CONTROL; 121 uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH; 122 uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS; 123 uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH; 124 uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS; 125 uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C; 126 uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_C; 127 uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C; 128 uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_C; 129 uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH; 130 uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS; 131 uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH; 132 uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS; 133 bool tmz_surface; 134 bool immediate; 135 uint8_t vmid; 136 bool grph_stereo; 137 }; 138 139 struct hubp_funcs { 140 void (*hubp_setup)( 141 struct hubp *hubp, 142 struct _vcs_dpi_display_dlg_regs_st *dlg_regs, 143 struct _vcs_dpi_display_ttu_regs_st *ttu_regs, 144 struct _vcs_dpi_display_rq_regs_st *rq_regs, 145 struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest); 146 147 void (*hubp_setup_interdependent)( 148 struct hubp *hubp, 149 struct _vcs_dpi_display_dlg_regs_st *dlg_regs, 150 struct _vcs_dpi_display_ttu_regs_st *ttu_regs); 151 152 void (*dcc_control)(struct hubp *hubp, bool enable, 153 enum hubp_ind_block_size blk_size); 154 155 void (*mem_program_viewport)( 156 struct hubp *hubp, 157 const struct rect *viewport, 158 const struct rect *viewport_c); 159 160 bool (*hubp_program_surface_flip_and_addr)( 161 struct hubp *hubp, 162 const struct dc_plane_address *address, 163 bool flip_immediate); 164 165 void (*hubp_program_pte_vm)( 166 struct hubp *hubp, 167 enum surface_pixel_format format, 168 union dc_tiling_info *tiling_info, 169 enum dc_rotation_angle rotation); 170 171 void (*hubp_set_vm_system_aperture_settings)( 172 struct hubp *hubp, 173 struct vm_system_aperture_param *apt); 174 175 void (*hubp_set_vm_context0_settings)( 176 struct hubp *hubp, 177 const struct vm_context0_param *vm0); 178 179 void (*hubp_program_surface_config)( 180 struct hubp *hubp, 181 enum surface_pixel_format format, 182 union dc_tiling_info *tiling_info, 183 struct plane_size *plane_size, 184 enum dc_rotation_angle rotation, 185 struct dc_plane_dcc_param *dcc, 186 bool horizontal_mirror, 187 unsigned int compa_level); 188 189 bool (*hubp_is_flip_pending)(struct hubp *hubp); 190 191 void (*set_blank)(struct hubp *hubp, bool blank); 192 void (*set_blank_regs)(struct hubp *hubp, bool blank); 193 void (*phantom_hubp_post_enable)(struct hubp *hubp); 194 void (*set_hubp_blank_en)(struct hubp *hubp, bool blank); 195 196 void (*set_cursor_attributes)( 197 struct hubp *hubp, 198 const struct dc_cursor_attributes *attr); 199 200 void (*set_cursor_position)( 201 struct hubp *hubp, 202 const struct dc_cursor_position *pos, 203 const struct dc_cursor_mi_param *param); 204 205 void (*hubp_disconnect)(struct hubp *hubp); 206 207 void (*hubp_clk_cntl)(struct hubp *hubp, bool enable); 208 void (*hubp_vtg_sel)(struct hubp *hubp, uint32_t otg_inst); 209 void (*hubp_read_state)(struct hubp *hubp); 210 void (*hubp_clear_underflow)(struct hubp *hubp); 211 void (*hubp_disable_control)(struct hubp *hubp, bool disable_hubp); 212 unsigned int (*hubp_get_underflow_status)(struct hubp *hubp); 213 void (*hubp_init)(struct hubp *hubp); 214 215 void (*dmdata_set_attributes)( 216 struct hubp *hubp, 217 const struct dc_dmdata_attributes *attr); 218 219 void (*dmdata_load)( 220 struct hubp *hubp, 221 uint32_t dmdata_sw_size, 222 const uint32_t *dmdata_sw_data); 223 bool (*dmdata_status_done)(struct hubp *hubp); 224 void (*hubp_enable_tripleBuffer)( 225 struct hubp *hubp, 226 bool enable); 227 228 bool (*hubp_is_triplebuffer_enabled)( 229 struct hubp *hubp); 230 231 void (*hubp_set_flip_control_surface_gsl)( 232 struct hubp *hubp, 233 bool enable); 234 235 void (*validate_dml_output)( 236 struct hubp *hubp, 237 struct dc_context *ctx, 238 struct _vcs_dpi_display_rq_regs_st *dml_rq_regs, 239 struct _vcs_dpi_display_dlg_regs_st *dml_dlg_attr, 240 struct _vcs_dpi_display_ttu_regs_st *dml_ttu_attr); 241 void (*set_unbounded_requesting)( 242 struct hubp *hubp, 243 bool enable); 244 bool (*hubp_in_blank)(struct hubp *hubp); 245 void (*hubp_soft_reset)(struct hubp *hubp, bool reset); 246 247 void (*hubp_set_flip_int)(struct hubp *hubp); 248 249 void (*hubp_update_force_pstate_disallow)(struct hubp *hubp, bool allow); 250 void (*hubp_update_force_cursor_pstate_disallow)(struct hubp *hubp, bool allow); 251 void (*hubp_update_mall_sel)(struct hubp *hubp, uint32_t mall_sel, bool c_cursor); 252 void (*hubp_prepare_subvp_buffering)(struct hubp *hubp, bool enable); 253 void (*hubp_surface_update_lock)(struct hubp *hubp, 254 bool lock); 255 256 void (*program_extended_blank)(struct hubp *hubp, 257 unsigned int min_dst_y_next_start_optimized); 258 259 void (*hubp_wait_pipe_read_start)(struct hubp *hubp); 260 void (*hubp_program_mcache_id_and_split_coordinate)(struct hubp *hubp, struct dml2_hubp_pipe_mcache_regs *mcache_regs); 261 void (*hubp_update_3dlut_fl_bias_scale)(struct hubp *hubp, uint16_t bias, uint16_t scale); 262 void (*hubp_program_3dlut_fl_mode)(struct hubp *hubp, 263 enum hubp_3dlut_fl_mode mode); 264 void (*hubp_program_3dlut_fl_format)(struct hubp *hubp, 265 enum hubp_3dlut_fl_format format); 266 void (*hubp_program_3dlut_fl_addr)(struct hubp *hubp, 267 const struct dc_plane_address address); 268 void (*hubp_program_3dlut_fl_dlg_param)(struct hubp *hubp, int refcyc_per_3dlut_group); 269 void (*hubp_enable_3dlut_fl)(struct hubp *hubp, bool enable); 270 void (*hubp_program_3dlut_fl_addressing_mode)(struct hubp *hubp, enum hubp_3dlut_fl_addressing_mode addr_mode); 271 void (*hubp_program_3dlut_fl_width)(struct hubp *hubp, enum hubp_3dlut_fl_width width); 272 void (*hubp_program_3dlut_fl_tmz_protected)(struct hubp *hubp, bool protection_enabled); 273 void (*hubp_program_3dlut_fl_crossbar)(struct hubp *hubp, 274 enum hubp_3dlut_fl_crossbar_bit_slice bit_slice_y_g, 275 enum hubp_3dlut_fl_crossbar_bit_slice bit_slice_cb_b, 276 enum hubp_3dlut_fl_crossbar_bit_slice bit_slice_cr_r); 277 int (*hubp_get_3dlut_fl_done)(struct hubp *hubp); 278 }; 279 280 #endif 281