Searched defs:hdmi_8998_phy_pll_reg_cfg (Results 1 – 1 of 1) sorted by relevance
43 struct hdmi_8998_phy_pll_reg_cfg { struct44 u32 com_svs_mode_clk_sel;45 u32 com_hsclk_sel;46 u32 com_pll_cctrl_mode0;47 u32 com_pll_rctrl_mode0;48 u32 com_cp_ctrl_mode0;49 u32 com_dec_start_mode0;50 u32 com_div_frac_start1_mode0;51 u32 com_div_frac_start2_mode0;52 u32 com_div_frac_start3_mode0;[all …]