1 /* 2 * Copyright (c) 2020 The Linux Foundation. All rights reserved. 3 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #ifndef _HAL_6750_TX_H_ 21 #define _HAL_6750_TX_H_ 22 #include "tcl_data_cmd.h" 23 #include "mac_tcl_reg_seq_hwioreg.h" 24 #include "phyrx_rssi_legacy.h" 25 #include "hal_hw_headers.h" 26 #include "hal_internal.h" 27 #include "cdp_txrx_mon_struct.h" 28 #include "qdf_trace.h" 29 #include "hal_rx.h" 30 #include "hal_tx.h" 31 #include "dp_types.h" 32 #include "hal_api_mon.h" 33 34 /** 35 * hal_tx_desc_set_dscp_tid_table_id_6750() - Sets DSCP to TID conversion 36 * table ID 37 * @desc: Handle to Tx Descriptor 38 * @id: DSCP to tid conversion table to be used for this frame 39 * 40 * Return: void 41 */ 42 static void hal_tx_desc_set_dscp_tid_table_id_6750(void *desc, uint8_t id) 43 { 44 HAL_SET_FLD(desc, TCL_DATA_CMD_5, 45 DSCP_TID_TABLE_NUM) |= 46 HAL_TX_SM(TCL_DATA_CMD_5, 47 DSCP_TID_TABLE_NUM, id); 48 } 49 50 #define DSCP_TID_TABLE_SIZE 24 51 #define NUM_WORDS_PER_DSCP_TID_TABLE (DSCP_TID_TABLE_SIZE / 4) 52 53 /** 54 * hal_tx_set_dscp_tid_map_6750() - Configure default DSCP to TID map table 55 * @hal_soc: HAL SoC context 56 * @map: DSCP-TID mapping table 57 * @id: mapping table ID - 0-31 58 * 59 * DSCP are mapped to 8 TID values using TID values programmed 60 * in any of the 32 DSCP_TID_MAPS (id = 0-31). 61 * 62 * Return: none 63 */ 64 static void hal_tx_set_dscp_tid_map_6750(struct hal_soc *hal_soc, uint8_t *map, 65 uint8_t id) 66 { 67 int i; 68 uint32_t addr, cmn_reg_addr; 69 uint32_t value = 0, regval; 70 uint8_t val[DSCP_TID_TABLE_SIZE], cnt = 0; 71 72 struct hal_soc *soc = (struct hal_soc *)hal_soc; 73 74 if (id >= HAL_MAX_HW_DSCP_TID_MAPS_11AX) 75 return; 76 77 cmn_reg_addr = HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR( 78 SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET); 79 80 addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR( 81 SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET, 82 id * NUM_WORDS_PER_DSCP_TID_TABLE); 83 84 /* Enable read/write access */ 85 regval = HAL_REG_READ(soc, cmn_reg_addr); 86 regval |= 87 (1 << 88 HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_SHFT); 89 90 HAL_REG_WRITE(soc, cmn_reg_addr, regval); 91 92 /* Write 8 (24 bits) DSCP-TID mappings in each iteration */ 93 for (i = 0; i < 64; i += 8) { 94 value = (map[i] | 95 (map[i + 1] << 0x3) | 96 (map[i + 2] << 0x6) | 97 (map[i + 3] << 0x9) | 98 (map[i + 4] << 0xc) | 99 (map[i + 5] << 0xf) | 100 (map[i + 6] << 0x12) | 101 (map[i + 7] << 0x15)); 102 103 qdf_mem_copy(&val[cnt], (void *)&value, 3); 104 cnt += 3; 105 } 106 107 for (i = 0; i < DSCP_TID_TABLE_SIZE; i += 4) { 108 regval = *(uint32_t *)(val + i); 109 HAL_REG_WRITE(soc, addr, 110 (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK)); 111 addr += 4; 112 } 113 114 /* Disable read/write access */ 115 regval = HAL_REG_READ(soc, cmn_reg_addr); 116 regval &= 117 ~(HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_BMSK); 118 119 HAL_REG_WRITE(soc, cmn_reg_addr, regval); 120 } 121 122 /** 123 * hal_tx_update_dscp_tid_6750() - Update the dscp tid map table as updated 124 * by the user 125 * @hal_soc: HAL SoC context 126 * @tid: TID 127 * @id : MAP ID 128 * @dscp: DSCP 129 * 130 * Return: void 131 */ 132 static void hal_tx_update_dscp_tid_6750(struct hal_soc *hal_soc, uint8_t tid, 133 uint8_t id, uint8_t dscp) 134 { 135 int index; 136 uint32_t addr; 137 uint32_t value; 138 uint32_t regval; 139 struct hal_soc *soc = (struct hal_soc *)hal_soc; 140 141 addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR( 142 SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET, id); 143 144 index = dscp % HAL_TX_NUM_DSCP_PER_REGISTER; 145 addr += 4 * (dscp / HAL_TX_NUM_DSCP_PER_REGISTER); 146 value = tid << (HAL_TX_BITS_PER_TID * index); 147 148 regval = HAL_REG_READ(soc, addr); 149 regval &= ~(HAL_TX_TID_BITS_MASK << (HAL_TX_BITS_PER_TID * index)); 150 regval |= value; 151 152 HAL_REG_WRITE(soc, addr, (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK)); 153 } 154 155 /** 156 * hal_tx_desc_set_lmac_id_6750() - Set the lmac_id value 157 * @desc: Handle to Tx Descriptor 158 * @lmac_id: mac Id to ast matching 159 * b00 – mac 0 160 * b01 – mac 1 161 * b10 – mac 2 162 * b11 – all macs (legacy HK way) 163 * 164 * Return: void 165 */ 166 static void hal_tx_desc_set_lmac_id_6750(void *desc, uint8_t lmac_id) 167 { 168 HAL_SET_FLD(desc, TCL_DATA_CMD_4, LMAC_ID) |= 169 HAL_TX_SM(TCL_DATA_CMD_4, LMAC_ID, lmac_id); 170 } 171 172 /** 173 * hal_tx_init_cmd_credit_ring_6750() - Initialize command/credit SRNG 174 * @hal_soc_hdl: Handle to HAL SoC structure 175 * @hal_ring_hdl: Handle to HAL SRNG structure 176 * 177 * Return: none 178 */ 179 static inline void hal_tx_init_cmd_credit_ring_6750(hal_soc_handle_t hal_soc_hdl, 180 hal_ring_handle_t hal_ring_hdl) 181 { 182 } 183 #endif 184