1 /*
2 * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
3 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for
6 * any purpose with or without fee is hereby granted, provided that the
7 * above copyright notice and this permission notice appear in all
8 * copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17 * PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 #ifndef _HAL_BE_RX_TLV_H_
21 #define _HAL_BE_RX_TLV_H_
22
23 #include "hal_api_mon.h"
24
25 /*
26 * Structures & Macros to obtain fields from the TLV's in the Rx packet
27 * pre-header.
28 */
29
30 #ifdef CONFIG_4_BYTES_TLV_TAG
31 #define TLV_TAG_T uint32_t
32 #else
33 #define TLV_TAG_T uint64_t
34 #endif
35
36 #define HAL_RX_BE_PKT_HDR_TLV_LEN 112
37
38 #ifndef BIG_ENDIAN_HOST
39 struct rx_pkt_hdr_tlv {
40 TLV_TAG_T tag; /* TLV_TAG_T B */
41 uint32_t reserved_0 : 16, /* 4 B */
42 phy_ppdu_id : 16;
43 uint32_t reserved_1a; /* 4 B */
44 char rx_pkt_hdr[HAL_RX_BE_PKT_HDR_TLV_LEN]; /* 112 B */
45 };
46 #else
47 struct rx_pkt_hdr_tlv {
48 TLV_TAG_T tag; /* TLV_TAG_T B */
49 uint32_t phy_ppdu_id : 16, /* 4 B */
50 reserved_0 : 16;
51 uint32_t reserved_1a; /* 4 B */
52 char rx_pkt_hdr[HAL_RX_BE_PKT_HDR_TLV_LEN]; /* 112 B */
53 };
54 #endif
55
56
57 #ifdef CONFIG_WORD_BASED_TLV
58 #ifndef BIG_ENDIAN_HOST
59 struct rx_msdu_end_compact {
60 uint32_t sa_sw_peer_id : 16,
61 sa_idx_timeout : 1,
62 da_idx_timeout : 1,
63 to_ds : 1,
64 tid : 4,
65 sa_is_valid : 1,
66 da_is_valid : 1,
67 da_is_mcbc : 1,
68 l3_header_padding : 2,
69 first_msdu : 1,
70 last_msdu : 1,
71 fr_ds : 1,
72 ip_chksum_fail_copy : 1;
73 uint32_t sa_idx : 16,
74 da_idx_or_sw_peer_id : 16;
75 uint32_t msdu_drop : 1,
76 reo_destination_indication : 5,
77 flow_idx : 20,
78 use_ppe : 1,
79 mesh_sta : 2,
80 vlan_ctag_stripped : 1,
81 vlan_stag_stripped : 1,
82 fragment_flag : 1;
83 uint32_t fse_metadata : 32;
84 uint32_t cce_metadata : 16,
85 tcp_udp_chksum : 16;
86 uint32_t aggregation_count : 8,
87 flow_aggregation_continuation : 1,
88 fisa_timeout : 1,
89 tcp_udp_chksum_fail_copy : 1,
90 msdu_limit_error : 1,
91 flow_idx_timeout : 1,
92 flow_idx_invalid : 1,
93 cce_match : 1,
94 amsdu_parser_error : 1,
95 cumulative_ip_length : 16;
96 uint32_t key_id_octet : 8,
97 reserved_8a : 24;
98 uint32_t reserved_9a : 6,
99 service_code : 9,
100 priority_valid : 1,
101 intra_bss : 1,
102 dest_chip_id : 2,
103 multicast_echo : 1,
104 wds_learning_event : 1,
105 wds_roaming_event : 1,
106 wds_keep_alive_event : 1,
107 dest_chip_pmac_id : 1,
108 reserved_9b : 8;
109 uint32_t msdu_length : 14,
110 stbc : 1,
111 ipsec_esp : 1,
112 l3_offset : 7,
113 ipsec_ah : 1,
114 l4_offset : 8;
115 uint32_t msdu_number : 8,
116 decap_format : 2,
117 ipv4_proto : 1,
118 ipv6_proto : 1,
119 tcp_proto : 1,
120 udp_proto : 1,
121 ip_frag : 1,
122 tcp_only_ack : 1,
123 da_is_bcast_mcast : 1,
124 toeplitz_hash_sel : 2,
125 ip_fixed_header_valid : 1,
126 ip_extn_header_valid : 1,
127 tcp_udp_header_valid : 1,
128 mesh_control_present : 1,
129 ldpc : 1,
130 ip4_protocol_ip6_next_header : 8;
131 uint32_t vlan_ctag_ci : 16,
132 vlan_stag_ci : 16;
133 uint32_t peer_meta_data : 32;
134 uint32_t user_rssi : 8,
135 pkt_type : 4,
136 sgi : 2,
137 rate_mcs : 4,
138 receive_bandwidth : 3,
139 reception_type : 3,
140 mimo_ss_bitmap : 7,
141 msdu_done_copy : 1;
142 uint32_t flow_id_toeplitz : 32;
143 uint32_t ppdu_start_timestamp_63_32;
144 uint32_t sw_phy_meta_data : 32;
145 uint32_t first_mpdu : 1,
146 reserved_16a : 1,
147 mcast_bcast : 1,
148 ast_index_not_found : 1,
149 ast_index_timeout : 1,
150 power_mgmt : 1,
151 non_qos : 1,
152 null_data : 1,
153 mgmt_type : 1,
154 ctrl_type : 1,
155 more_data : 1,
156 eosp : 1,
157 a_msdu_error : 1,
158 reserved_16b : 1,
159 order : 1,
160 wifi_parser_error : 1,
161 overflow_err : 1,
162 msdu_length_err : 1,
163 tcp_udp_chksum_fail : 1,
164 ip_chksum_fail : 1,
165 sa_idx_invalid : 1,
166 da_idx_invalid : 1,
167 amsdu_addr_mismatch : 1,
168 rx_in_tx_decrypt_byp : 1,
169 encrypt_required : 1,
170 directed : 1,
171 buffer_fragment : 1,
172 mpdu_length_err : 1,
173 tkip_mic_err : 1,
174 decrypt_err : 1,
175 unencrypted_frame_err : 1,
176 fcs_err : 1;
177 uint32_t reserved_17a : 10,
178 decrypt_status_code : 3,
179 rx_bitmap_not_updated : 1,
180 reserved_17b : 17,
181 msdu_done : 1;
182 };
183
184 struct rx_mpdu_start_compact {
185 uint32_t rx_reo_queue_desc_addr_39_32 : 8,
186 receive_queue_number : 16,
187 pre_delim_err_warning : 1,
188 first_delim_err : 1,
189 reserved_0 : 6;
190 uint32_t pn_31_0 : 32;
191 uint32_t pn_63_32 : 32;
192 uint32_t pn_95_64 : 32;
193 uint32_t ast_index : 16,
194 sw_peer_id : 16;
195 uint32_t mpdu_frame_control_valid : 1,
196 mpdu_duration_valid : 1,
197 mac_addr_ad1_valid : 1,
198 mac_addr_ad2_valid : 1,
199 mac_addr_ad3_valid : 1,
200 mac_addr_ad4_valid : 1,
201 mpdu_sequence_control_valid : 1,
202 mpdu_qos_control_valid : 1,
203 mpdu_ht_control_valid : 1,
204 frame_encryption_info_valid : 1,
205 mpdu_fragment_number : 4,
206 more_fragment_flag : 1,
207 reserved_7a : 1,
208 fr_ds : 1,
209 to_ds : 1,
210 encrypted : 1,
211 mpdu_retry : 1,
212 mpdu_sequence_number : 12;
213 uint32_t mpdu_frame_control_field : 16,
214 mpdu_duration_field : 16;
215 uint32_t mac_addr_ad1_31_0 : 32;
216 uint32_t mac_addr_ad1_47_32 : 16,
217 mac_addr_ad2_15_0 : 16;
218 uint32_t mac_addr_ad2_47_16 : 32;
219 uint32_t mac_addr_ad3_31_0 : 32;
220 uint32_t mac_addr_ad3_47_32 : 16,
221 mpdu_sequence_control_field : 16;
222 };
223 #else
224 struct rx_msdu_end_compact {
225 uint32_t ip_chksum_fail_copy : 1,
226 fr_ds : 1,
227 last_msdu : 1,
228 first_msdu : 1,
229 l3_header_padding : 2,
230 da_is_mcbc : 1,
231 da_is_valid : 1,
232 sa_is_valid : 1,
233 tid : 4,
234 to_ds : 1,
235 da_idx_timeout : 1,
236 sa_idx_timeout : 1,
237 sa_sw_peer_id : 16;
238 uint32_t da_idx_or_sw_peer_id : 16,
239 sa_idx : 16;
240 uint32_t fragment_flag : 1,
241 vlan_stag_stripped : 1,
242 vlan_ctag_stripped : 1,
243 mesh_sta : 2,
244 use_ppe : 1,
245 flow_idx : 20,
246 reo_destination_indication : 5,
247 msdu_drop : 1;
248 uint32_t fse_metadata : 32;
249 uint32_t tcp_udp_chksum : 16,
250 cce_metadata : 16;
251 uint32_t cumulative_ip_length : 16,
252 amsdu_parser_error : 1,
253 cce_match : 1,
254 flow_idx_invalid : 1,
255 flow_idx_timeout : 1,
256 msdu_limit_error : 1,
257 tcp_udp_chksum_fail_copy : 1,
258 fisa_timeout : 1,
259 flow_aggregation_continuation : 1,
260 aggregation_count : 8;
261 uint32_t reserved_8a : 24,
262 key_id_octet : 8;
263 uint32_t reserved_9b : 8,
264 dest_chip_pmac_id : 1,
265 wds_keep_alive_event : 1,
266 wds_roaming_event : 1,
267 wds_learning_event : 1,
268 multicast_echo : 1,
269 dest_chip_id : 2,
270 intra_bss : 1,
271 priority_valid : 1,
272 service_code : 9,
273 reserved_9a : 6;
274 uint32_t l4_offset : 8,
275 ipsec_ah : 1,
276 l3_offset : 7,
277 ipsec_esp : 1,
278 stbc : 1,
279 msdu_length : 14;
280 uint32_t ip4_protocol_ip6_next_header : 8,
281 ldpc : 1,
282 mesh_control_present : 1,
283 tcp_udp_header_valid : 1,
284 ip_extn_header_valid : 1,
285 ip_fixed_header_valid : 1,
286 toeplitz_hash_sel : 2,
287 da_is_bcast_mcast : 1,
288 tcp_only_ack : 1,
289 ip_frag : 1,
290 udp_proto : 1,
291 tcp_proto : 1,
292 ipv6_proto : 1,
293 ipv4_proto : 1,
294 decap_format : 2,
295 msdu_number : 8;
296 uint32_t vlan_stag_ci : 16,
297 vlan_ctag_ci : 16;
298 uint32_t peer_meta_data : 32;
299 uint32_t msdu_done_copy : 1,
300 mimo_ss_bitmap : 7,
301 reception_type : 3,
302 receive_bandwidth : 3,
303 rate_mcs : 4,
304 sgi : 2,
305 pkt_type : 4,
306 user_rssi : 8;
307 uint32_t flow_id_toeplitz : 32;
308 uint32_t ppdu_start_timestamp_63_32;
309 uint32_t sw_phy_meta_data : 32;
310 uint32_t fcs_err : 1,
311 unencrypted_frame_err : 1,
312 decrypt_err : 1,
313 tkip_mic_err : 1,
314 mpdu_length_err : 1,
315 buffer_fragment : 1,
316 directed : 1,
317 encrypt_required : 1,
318 rx_in_tx_decrypt_byp : 1,
319 amsdu_addr_mismatch : 1,
320 da_idx_invalid : 1,
321 sa_idx_invalid : 1,
322 ip_chksum_fail : 1,
323 tcp_udp_chksum_fail : 1,
324 msdu_length_err : 1,
325 overflow_err : 1,
326 wifi_parser_error : 1,
327 order : 1,
328 reserved_16b : 1,
329 a_msdu_error : 1,
330 eosp : 1,
331 more_data : 1,
332 ctrl_type : 1,
333 mgmt_type : 1,
334 null_data : 1,
335 non_qos : 1,
336 power_mgmt : 1,
337 ast_index_timeout : 1,
338 ast_index_not_found : 1,
339 mcast_bcast : 1,
340 reserved_16a : 1,
341 first_mpdu : 1;
342 uint32_t msdu_done : 1,
343 reserved_17b : 17,
344 rx_bitmap_not_updated : 1,
345 decrypt_status_code : 3,
346 reserved_17a : 10;
347 };
348
349 struct rx_mpdu_start_compact {
350 uint32_t reserved_0 : 6,
351 first_delim_err : 1,
352 pre_delim_err_warning : 1,
353 receive_queue_number : 16,
354 rx_reo_queue_desc_addr_39_32 : 8;
355 uint32_t pn_31_0 : 32;
356 uint32_t pn_63_32 : 32;
357 uint32_t pn_95_64 : 32;
358 uint32_t sw_peer_id : 16,
359 ast_index : 16;
360 uint32_t mpdu_sequence_number : 12,
361 mpdu_retry : 1,
362 encrypted : 1,
363 to_ds : 1,
364 fr_ds : 1,
365 reserved_7a : 1,
366 more_fragment_flag : 1,
367 mpdu_fragment_number : 4,
368 frame_encryption_info_valid : 1,
369 mpdu_ht_control_valid : 1,
370 mpdu_qos_control_valid : 1,
371 mpdu_sequence_control_valid : 1,
372 mac_addr_ad4_valid : 1,
373 mac_addr_ad3_valid : 1,
374 mac_addr_ad2_valid : 1,
375 mac_addr_ad1_valid : 1,
376 mpdu_duration_valid : 1,
377 mpdu_frame_control_valid : 1;
378 uint32_t mpdu_duration_field : 16,
379 mpdu_frame_control_field : 16;
380 uint32_t mac_addr_ad1_31_0 : 32;
381 uint32_t mac_addr_ad2_15_0 : 16,
382 mac_addr_ad1_47_32 : 16;
383 uint32_t mac_addr_ad2_47_16 : 32;
384 uint32_t mac_addr_ad3_31_0 : 32;
385 uint32_t mpdu_sequence_control_field : 16,
386 mac_addr_ad3_47_32 : 16;
387 };
388 #endif
389 #define RX_BE_PADDING0_BYTES 4
390
391 typedef struct rx_mpdu_start_compact hal_rx_mpdu_start_t;
392 typedef struct rx_msdu_end_compact hal_rx_msdu_end_t;
393
394 struct rx_mpdu_start_tlv {
395 hal_rx_mpdu_start_t rx_mpdu_start;
396 };
397
398 struct rx_msdu_end_tlv {
399 TLV_TAG_T tag; /* TLV_TAG_T B */
400 hal_rx_msdu_end_t rx_msdu_end;
401 };
402
403 struct rx_pkt_tlvs {
404 struct rx_msdu_end_tlv msdu_end_tlv; /* 80 bytes */
405 struct rx_mpdu_start_tlv mpdu_start_tlv; /* 48 bytes */
406 #ifndef NO_RX_PKT_HDR_TLV
407 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */
408 #endif
409 };
410
411 #define HAL_RX_MSDU_END(_rx_pkt_tlv) \
412 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->msdu_end_tlv.rx_msdu_end)
413
414 #define HAL_RX_MPDU_START(_rx_pkt_tlv) \
415 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->mpdu_start_tlv. \
416 rx_mpdu_start)
417
418 #define HAL_RX_TLV_TID_GET(_rx_pkt_tlv) \
419 HAL_RX_MSDU_END(_rx_pkt_tlv).tid
420
421 #define HAL_RX_TLV_FIRST_MPDU_GET(_rx_pkt_tlv) \
422 HAL_RX_MSDU_END(_rx_pkt_tlv).first_mpdu
423 #else /* CONFIG_WORD_BASED_TLV */
424 typedef struct rx_mpdu_start hal_rx_mpdu_start_t;
425 typedef struct rx_msdu_end hal_rx_msdu_end_t;
426
427 #define RX_BE_PADDING0_BYTES 8
428 /*
429 * Each RX descriptor TLV is preceded by sizeof TLV_TAG_T "tag"
430 */
431
432 #ifndef CONFIG_NO_TLV_TAGS
433 struct rx_mpdu_start_tlv {
434 TLV_TAG_T tag;
435 hal_rx_mpdu_start_t rx_mpdu_start;
436 };
437
438 struct rx_msdu_end_tlv {
439 TLV_TAG_T tag;
440 hal_rx_msdu_end_t rx_msdu_end;
441 };
442
443 struct rx_pkt_tlvs {
444 struct rx_msdu_end_tlv msdu_end_tlv; /* 128 + TLV_TAG_T bytes */
445 uint8_t rx_padding0[RX_BE_PADDING0_BYTES];/* 8 bytes */
446 struct rx_mpdu_start_tlv mpdu_start_tlv;/* 120 + TLV_TAG_T bytes */
447 #ifndef NO_RX_PKT_HDR_TLV
448 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */
449 #endif
450 };
451
452 #else
453 struct rx_mpdu_start_tlv {
454 hal_rx_mpdu_start_t rx_mpdu_start;
455 };
456
457 struct rx_msdu_end_tlv {
458 hal_rx_msdu_end_t rx_msdu_end;
459 };
460
461 struct rx_pkt_tlvs {
462 struct rx_msdu_end_tlv msdu_end_tlv; /* 128 bytes */
463 struct rx_mpdu_start_tlv mpdu_start_tlv; /* 120 bytes */
464 uint8_t rx_padding0[RX_BE_PADDING0_BYTES]; /* 8 bytes */
465 #ifndef NO_RX_PKT_HDR_TLV
466 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */
467 #endif
468 };
469 #endif /*CONFIG_NO_TLV_TAGS */
470
471 #define HAL_RX_MSDU_END(_rx_pkt_tlv) \
472 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->msdu_end_tlv.rx_msdu_end)
473
474 #define HAL_RX_MPDU_START(_rx_pkt_tlv) \
475 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->mpdu_start_tlv. \
476 rx_mpdu_start.rx_mpdu_info_details)
477
478 #define HAL_RX_REO_QUEUE_DESC_ADDR_31_0_GET(_rx_pkt_tlv) \
479 HAL_RX_MPDU_START(_rx_pkt_tlv).rx_reo_queue_desc_addr_31_0
480
481 #define HAL_RX_TLV_AMPDU_FLAG_GET(_rx_pkt_tlv) \
482 HAL_RX_MPDU_START(_rx_pkt_tlv).ampdu_flag
483
484 #define HAL_RX_TLV_MPDU_PN_127_96_GET(_rx_pkt_tlv) \
485 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_127_96
486
487 #define HAL_RX_TLV_TID_GET(_rx_pkt_tlv) \
488 HAL_RX_MPDU_START(_rx_pkt_tlv).tid
489
490 #define HAL_RX_TLV_FIRST_MPDU_GET(_rx_pkt_tlv) \
491 HAL_RX_MPDU_START(_rx_pkt_tlv).first_mpdu
492
493 #define HAL_RX_TLV_L3_TYPE_GET(_rx_pkt_tlv) \
494 HAL_RX_MSDU_END(_rx_pkt_tlv).l3_type
495
496 #define HAL_RX_GET_PPDU_ID(_rx_pkt_tlv) \
497 HAL_RX_MPDU_START(_rx_pkt_tlv).phy_ppdu_id
498
499 #define HAL_RX_TLV_PHY_PPDU_ID_GET(_rx_pkt_tlv) \
500 HAL_RX_MSDU_END(_rx_pkt_tlv).phy_ppdu_id
501
502 #define HAL_RX_GET_FILTER_CATEGORY(_rx_pkt_tlv) \
503 HAL_RX_MPDU_START(_rx_pkt_tlv).rxpcu_mpdu_filter_in_category
504
505 #define HAL_RX_TLV_SW_FRAME_GROUP_ID_GET(_rx_pkt_tlv) \
506 HAL_RX_MPDU_START(_rx_pkt_tlv).sw_frame_group_id
507
508 #endif /* CONFIG_WORD_BASED_TLV */
509
510 #ifndef NO_RX_PKT_HDR_TLV
511 #define HAL_RX_PKT_HDR_TLV(_rx_pkt_tlv) \
512 (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->pkt_hdr_tlv)
513
514 #define HAL_RX_PKT_HDR_TLV_PHY_PPDU_ID_GET(_rx_pkt_tlv) \
515 HAL_RX_PKT_HDR_TLV(_rx_pkt_tlv).phy_ppdu_id
516 #endif
517
518 /**
519 * struct rx_mon_pkt_tlvs - RX packet data structure for DEST ring in the
520 * monitor mode.
521 * @msdu_end_tlv: MSDU end TLV
522 * @rx_padding0: Padding bytes
523 * @mpdu_start_tlv: MPDU start TLV
524 * @pkt_hdr_tlv: 802.11 packet header TLV
525 */
526 struct rx_mon_pkt_tlvs {
527 struct rx_msdu_end_tlv msdu_end_tlv; /* 128B + sizeof(tag) */
528 uint8_t rx_padding0[RX_BE_PADDING0_BYTES]; /* 8B */
529 struct rx_mpdu_start_tlv mpdu_start_tlv; /* 120B + sizeof(tag) */
530 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 120B + sizeof(tag) */
531 };
532
533 #define SIZE_OF_DATA_RX_TLV sizeof(struct rx_pkt_tlvs)
534 #define SIZE_OF_MON_DATA_RX_TLV sizeof(struct rx_mon_pkt_tlvs)
535
536 #define RX_PKT_TLVS_LEN SIZE_OF_DATA_RX_TLV
537 #define MON_RX_PKT_TLVS_LEN SIZE_OF_MON_DATA_RX_TLV
538
539 #define RX_PKT_TLV_OFFSET(field) qdf_offsetof(struct rx_pkt_tlvs, field)
540
541 #define HAL_RX_TLV_MSDU_DONE_GET(_rx_pkt_tlv) \
542 HAL_RX_MSDU_END(_rx_pkt_tlv).msdu_done
543
544 #define HAL_RX_TLV_DECAP_FORMAT_GET(_rx_pkt_tlv) \
545 HAL_RX_MSDU_END(_rx_pkt_tlv).decap_format
546
547 #ifdef RECEIVE_OFFLOAD
548 #define HAL_RX_TLV_GET_TCP_PURE_ACK(_rx_pkt_tlv) \
549 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_only_ack
550
551 #define HAL_RX_TLV_GET_TCP_PROTO(_rx_pkt_tlv) \
552 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_proto
553
554 #define HAL_RX_TLV_GET_UDP_PROTO(_rx_pkt_tlv) \
555 HAL_RX_MSDU_END(_rx_pkt_tlv).udp_proto
556
557 #define HAL_RX_TLV_GET_IPV6(_rx_pkt_tlv) \
558 HAL_RX_MSDU_END(_rx_pkt_tlv).ipv6_proto
559
560 #define HAL_RX_TLV_GET_IP_OFFSET(_rx_pkt_tlv) \
561 HAL_RX_MSDU_END(_rx_pkt_tlv).l3_offset
562
563 #define HAL_RX_TLV_GET_TCP_OFFSET(_rx_pkt_tlv) \
564 HAL_RX_MSDU_END(_rx_pkt_tlv).l4_offset
565 #endif /* RECEIVE_OFFLOAD */
566
567 #define HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(_rx_pkt_tlv) \
568 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_id_toeplitz
569
570 #define HAL_RX_TLV_MSDU_LEN_GET(_rx_pkt_tlv) \
571 HAL_RX_MSDU_END(_rx_pkt_tlv).msdu_length
572
573 #define HAL_RX_TLV_CCE_MATCH_GET(_rx_pkt_tlv) \
574 HAL_RX_MSDU_END(_rx_pkt_tlv).cce_match
575
576 #define HAL_RX_TLV_BW_GET(_rx_pkt_tlv) \
577 HAL_RX_MSDU_END(_rx_pkt_tlv).receive_bandwidth
578
579 #define HAL_RX_TLV_FLOWID_TOEPLITZ_GET(_rx_pkt_tlv) \
580 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_id_toeplitz
581
582 #define HAL_RX_TLV_SGI_GET(_rx_pkt_tlv) \
583 HAL_RX_MSDU_END(_rx_pkt_tlv).sgi
584
585 #define HAL_RX_TLV_RATE_MCS_GET(_rx_pkt_tlv) \
586 HAL_RX_MSDU_END(_rx_pkt_tlv).rate_mcs
587
588 #define HAL_RX_TLV_DECRYPT_STATUS_GET(_rx_pkt_tlv) \
589 HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_status_code
590
591 #define HAL_RX_TLV_RSSI_GET(_rx_pkt_tlv) \
592 HAL_RX_MSDU_END(_rx_pkt_tlv).user_rssi
593
594 #define HAL_RX_TLV_FREQ_GET(_rx_pkt_tlv) \
595 HAL_RX_MSDU_END(_rx_pkt_tlv).sw_phy_meta_data
596
597 #define HAL_RX_TLV_PKT_TYPE_GET(_rx_pkt_tlv) \
598 HAL_RX_MSDU_END(_rx_pkt_tlv).pkt_type
599
600 #define HAL_RX_TLV_DECRYPT_ERR_GET(_rx_pkt_tlv) \
601 HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_err
602
603 #define HAL_RX_TLV_MIC_ERR_GET(_rx_pkt_tlv) \
604 HAL_RX_MSDU_END(_rx_pkt_tlv).tkip_mic_err
605
606 #define HAL_RX_TLV_MIMO_SS_BITMAP(_rx_pkt_tlv)\
607 HAL_RX_MSDU_END(_rx_pkt_tlv).mimo_ss_bitmap
608
609 #define HAL_RX_TLV_ANT_SIGNAL_DB_GET(_rx_pkt_tlv) \
610 HAL_RX_MSDU_END(_rx_pkt_tlv).user_rssi
611
612 #define HAL_RX_TLV_STBC_GET(_rx_pkt_tlv) \
613 HAL_RX_MSDU_END(_rx_pkt_tlv).stbc
614
615 #define HAL_RX_TLV_RECEPTION_TYPE_GET(_rx_pkt_tlv) \
616 HAL_RX_MSDU_END(_rx_pkt_tlv).reception_type
617
618 #define HAL_RX_TLV_IP_CSUM_FAIL_GET(_rx_pkt_tlv) \
619 HAL_RX_MSDU_END(_rx_pkt_tlv).ip_chksum_fail
620
621 #define HAL_RX_TLV_TCP_UDP_CSUM_FAIL_GET(_rx_pkt_tlv) \
622 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_udp_chksum_fail
623
624 #define HAL_RX_TLV_MPDU_LEN_ERR_GET(_rx_pkt_tlv) \
625 HAL_RX_MSDU_END(_rx_pkt_tlv).mpdu_length_err
626
627 #define HAL_RX_TLV_MPDU_FCS_ERR_GET(_rx_pkt_tlv) \
628 HAL_RX_MSDU_END(_rx_pkt_tlv).fcs_err
629
630 #define HAL_RX_TLV_IS_MCAST_GET(_rx_pkt_tlv) \
631 HAL_RX_MSDU_END(_rx_pkt_tlv).mcast_bcast
632
633 #ifdef RECEIVE_OFFLOAD
634 /*
635 * LRO information needed from the TLVs
636 */
637 #define HAL_RX_TLV_GET_LRO_ELIGIBLE(_rx_pkt_tlv) \
638 HAL_RX_MSDU_END(_rx_pkt_tlv).lro_eligible
639
640 #define HAL_RX_TLV_GET_TCP_ACK(_rx_pkt_tlv) \
641 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_ack_number
642
643 #define HAL_RX_TLV_GET_TCP_SEQ(_rx_pkt_tlv) \
644 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_seq_number
645
646 #define HAL_RX_TLV_GET_TCP_WIN(_rx_pkt_tlv) \
647 HAL_RX_MSDU_END(_rx_pkt_tlv).window_size
648 #endif
649
650 #define HAL_RX_TLV_L3_TYPE_GET(_rx_pkt_tlv) \
651 HAL_RX_MSDU_END(_rx_pkt_tlv).l3_type
652
653 #ifdef RX_MSDU_END_PEER_META_DATA_OFFSET
654 #define HAL_RX_TLV_MSDU_PEER_META_DATA_GET(_rx_pkt_tlv) \
655 HAL_RX_MSDU_END(_rx_pkt_tlv).peer_meta_data
656 #endif
657
658 #define HAL_RX_TLV_PEER_META_DATA_GET(_rx_pkt_tlv) \
659 HAL_RX_MPDU_START(_rx_pkt_tlv).peer_meta_data
660
661 #define HAL_RX_TLV_KEYID_OCTET_GET(_rx_pkt_tlv) \
662 HAL_RX_MSDU_END(_rx_pkt_tlv).key_id_octet
663
664 #define HAL_RX_MPDU_SEQUENCE_NUMBER_GET(_rx_pkt_tlv) \
665 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_sequence_number
666
667 #define HAL_RX_TLV_SA_SW_PEER_ID_GET(_rx_pkt_tlv) \
668 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_sw_peer_id
669
670 #define HAL_RX_TLV_L3_HEADER_PADDING_GET(_rx_pkt_tlv) \
671 HAL_RX_MSDU_END(_rx_pkt_tlv).l3_header_padding
672
673 #define HAL_RX_TLV_SA_IDX_GET(_rx_pkt_tlv) \
674 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_idx
675
676 #define HAL_RX_TLV_DA_IDX_GET(_rx_pkt_tlv) \
677 HAL_RX_MSDU_END(_rx_pkt_tlv).da_idx_or_sw_peer_id
678
679 #define HAL_RX_TLV_FIRST_MSDU_GET(_rx_pkt_tlv) \
680 HAL_RX_MSDU_END(_rx_pkt_tlv).first_msdu
681
682 #define HAL_RX_TLV_LAST_MSDU_GET(_rx_pkt_tlv) \
683 HAL_RX_MSDU_END(_rx_pkt_tlv).last_msdu
684
685 #define HAL_RX_TLV_DA_IS_MCBC_GET(_rx_pkt_tlv) \
686 HAL_RX_MSDU_END(_rx_pkt_tlv).da_is_mcbc
687
688 #define HAL_RX_TLV_IS_TKIP_MIC_ERR_GET(_rx_pkt_tlv) \
689 HAL_RX_MSDU_END(_rx_pkt_tlv).tkip_mic_err
690
691 #define HAL_RX_TLV_SA_IS_VALID_GET(_rx_pkt_tlv) \
692 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_is_valid
693
694 #define HAL_RX_TLV_MPDU_ENCRYPTION_INFO_VALID(_rx_pkt_tlv) \
695 HAL_RX_MPDU_START(_rx_pkt_tlv).frame_encryption_info_valid
696
697 #define HAL_RX_TLV_MPDU_PN_31_0_GET(_rx_pkt_tlv) \
698 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_31_0
699
700 #define HAL_RX_TLV_MPDU_PN_63_32_GET(_rx_pkt_tlv) \
701 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_63_32
702
703 #define HAL_RX_TLV_MPDU_PN_95_64_GET(_rx_pkt_tlv) \
704 HAL_RX_MPDU_START(_rx_pkt_tlv).pn_95_64
705
706 #define HAL_RX_TLV_DA_IS_VALID_GET(_rx_pkt_tlv) \
707 HAL_RX_MSDU_END(_rx_pkt_tlv).da_is_valid
708
709 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(_rx_pkt_tlv) \
710 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_valid
711
712 #define HAL_RX_TLV_SW_PEER_ID_GET(_rx_pkt_tlv) \
713 HAL_RX_MPDU_START(_rx_pkt_tlv).sw_peer_id
714
715 #define HAL_RX_TLV_MPDU_GET_TODS(_rx_pkt_tlv) \
716 HAL_RX_MPDU_START(_rx_pkt_tlv).to_ds
717
718 #define HAL_RX_TLV_MPDU_GET_FROMDS(_rx_pkt_tlv) \
719 HAL_RX_MPDU_START(_rx_pkt_tlv).fr_ds
720
721 #define HAL_RX_TLV_MPDU_GET_FRAME_CONTROL_VALID(_rx_pkt_tlv) \
722 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_valid
723
724 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD1_VALID_GET(_rx_pkt_tlv) \
725 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_valid
726
727 #define HAL_RX_TLV_MPDU_AD1_31_0_GET(_rx_pkt_tlv) \
728 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_31_0
729
730 #define HAL_RX_TLV_MPDU_AD1_47_32_GET(_rx_pkt_tlv) \
731 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_47_32
732
733 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(_rx_pkt_tlv) \
734 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_valid
735
736 #define HAL_RX_TLV_MPDU_AD2_15_0_GET(_rx_pkt_tlv) \
737 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_15_0
738
739 #define HAL_RX_TLV_MPDU_AD2_47_16_GET(_rx_pkt_tlv) \
740 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_47_16
741
742 #define HAL_RX_TLV_MPDU_MAC_ADDR_AD3_VALID_GET(_rx_pkt_tlv) \
743 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_valid
744
745 #define HAL_RX_TLV_MPDU_AD3_31_0_GET(_rx_pkt_tlv) \
746 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_31_0
747
748 #define HAL_RX_TLV_MPDU_AD3_47_32_GET(_rx_pkt_tlv) \
749 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_47_32
750
751 #define HAL_RX_TLV_MPDU_AD4_31_0_GET(_rx_pkt_tlv) \
752 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_31_0
753
754 #define HAL_RX_TLV_MPDU_AD4_47_32_GET(_rx_pkt_tlv) \
755 HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_47_32
756
757 #define HAL_RX_TLV_MPDU_GET_SEQUENCE_CONTROL_VALID(_rx_pkt_tlv) \
758 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_sequence_control_valid
759
760 #define HAL_RX_TLV_MPDU_QOS_CONTROL_VALID_GET(_rx_pkt_tlv) \
761 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_qos_control_valid
762
763 #define HAL_RX_TLV_GET_FC_VALID(_rx_pkt_tlv) \
764 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_valid
765
766 #define HAL_RX_TLV_GET_TO_DS_FLAG(_rx_pkt_tlv) \
767 HAL_RX_MPDU_START(_rx_pkt_tlv).to_ds
768
769 #define HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(_rx_pkt_tlv) \
770 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_field
771
772 #define HAL_RX_TLV_FLOW_IDX_GET(_rx_pkt_tlv) \
773 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx
774
775 #define HAL_RX_TLV_REO_DEST_IND_GET(_rx_pkt_tlv) \
776 HAL_RX_MSDU_END(_rx_pkt_tlv).reo_destination_indication
777
778 #define HAL_RX_TLV_FLOW_IDX_INVALID_GET(_rx_pkt_tlv) \
779 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx_invalid
780
781 #define HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(_rx_pkt_tlv) \
782 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx_timeout
783
784 #define HAL_RX_TLV_FSE_METADATA_GET(_rx_pkt_tlv) \
785 HAL_RX_MSDU_END(_rx_pkt_tlv).fse_metadata
786
787 #define HAL_RX_TLV_CCE_METADATA_GET(_rx_pkt_tlv) \
788 HAL_RX_MSDU_END(_rx_pkt_tlv).cce_metadata
789
790 #define HAL_RX_TLV_DECRYPT_STATUS_GET(_rx_pkt_tlv) \
791 HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_status_code
792
793 #define HAL_RX_TLV_GET_TCP_CHKSUM(_rx_pkt_tlv) \
794 HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_udp_chksum
795
796 #define HAL_RX_TLV_GET_FLOW_AGGR_CONT(_rx_pkt_tlv) \
797 HAL_RX_MSDU_END(_rx_pkt_tlv).flow_aggregation_continuation
798
799 #define HAL_RX_TLV_GET_FLOW_AGGR_COUNT(_rx_pkt_tlv) \
800 HAL_RX_MSDU_END(_rx_pkt_tlv).aggregation_count
801
802 #define HAL_RX_TLV_GET_FISA_TIMEOUT(_rx_pkt_tlv) \
803 HAL_RX_MSDU_END(_rx_pkt_tlv).fisa_timeout
804
805 #define HAL_RX_TLV_GET_FISA_CUMULATIVE_L4_CHECKSUM(_rx_pkt_tlv) \
806 HAL_RX_MSDU_END(_rx_pkt_tlv).cumulative_l4_checksum
807
808 #define HAL_RX_TLV_GET_FISA_CUMULATIVE_IP_LENGTH(_rx_pkt_tlv) \
809 HAL_RX_MSDU_END(_rx_pkt_tlv).cumulative_ip_length
810
811 #define HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET(_rx_pkt_tlv) \
812 HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_qos_control_valid
813
814 #define HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(_rx_pkt_tlv) \
815 HAL_RX_MSDU_END(_rx_pkt_tlv).sa_sw_peer_id
816
817 #define HAL_RX_REO_QUEUE_DESC_ADDR_39_32_GET(_rx_pkt_tlv) \
818 HAL_RX_MPDU_START(_rx_pkt_tlv).rx_reo_queue_desc_addr_39_32
819
820 #ifdef WLAN_FEATURE_MARK_FIRST_WAKEUP_PACKET
821 #define HAL_RX_TLV_FIRST_WAKEUP_PKT_GET(_rx_pkt_tlv) \
822 HAL_RX_MSDU_END(_rx_pkt_tlv).reserved_1a
823 #endif
824
825 /* used by monitor mode for parsing from full TLV */
826 #define HAL_RX_MON_GET_FC_VALID(_rx_mpdu_start) \
827 HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, MPDU_FRAME_CONTROL_VALID)
828
829 #define HAL_RX_MON_GET_TO_DS_FLAG(_rx_mpdu_start) \
830 HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, TO_DS)
831
832 #define HAL_RX_MON_GET_MAC_ADDR2_VALID(_rx_mpdu_start) \
833 HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, MAC_ADDR_AD2_VALID)
834
835 static inline
hal_rx_tlv_decap_format_get_be(void * hw_desc_addr)836 uint32_t hal_rx_tlv_decap_format_get_be(void *hw_desc_addr)
837 {
838 struct rx_pkt_tlvs *rx_pkt_tlvs =
839 (struct rx_pkt_tlvs *)hw_desc_addr;
840
841 return HAL_RX_TLV_DECAP_FORMAT_GET(rx_pkt_tlvs);
842 }
843
hal_rx_tlv_msdu_done_get_be(uint8_t * buf)844 static inline uint32_t hal_rx_tlv_msdu_done_get_be(uint8_t *buf)
845 {
846 return HAL_RX_TLV_MSDU_DONE_GET(buf);
847 }
848
849 /**
850 * hal_rx_tlv_first_mpdu_get_be() - get first_mpdu bit from rx attention
851 * @buf: pointer to rx_pkt_tlvs
852 *
853 * Return: uint32_t(first_msdu)
854 */
hal_rx_tlv_first_mpdu_get_be(uint8_t * buf)855 static inline uint32_t hal_rx_tlv_first_mpdu_get_be(uint8_t *buf)
856 {
857 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
858
859 return HAL_RX_TLV_FIRST_MPDU_GET(rx_pkt_tlvs);
860 }
861
862 /**
863 * hal_rx_msdu_cce_match_get_be() - get CCE match bit from rx attention
864 * @buf: pointer to rx_pkt_tlvs
865 *
866 * Return: CCE match value
867 */
hal_rx_msdu_cce_match_get_be(uint8_t * buf)868 static inline bool hal_rx_msdu_cce_match_get_be(uint8_t *buf)
869 {
870 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
871
872 return HAL_RX_TLV_CCE_MATCH_GET(rx_pkt_tlvs);
873 }
874
875 #ifdef RX_MSDU_END_PEER_META_DATA_OFFSET
876 /*
877 * Get peer_meta_data from RX_MSDU_END
878 */
879
hal_rx_msdu_peer_meta_data_get_be(uint8_t * buf)880 static inline uint32_t hal_rx_msdu_peer_meta_data_get_be(uint8_t *buf)
881 {
882 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
883
884 return HAL_RX_TLV_MSDU_PEER_META_DATA_GET(rx_pkt_tlvs);
885 }
886 #endif
887
888 /**
889 * hal_rx_mpdu_get_addr1_be() - API to check get address1 of the mpdu
890 * @buf: pointer to the start of RX PKT TLV headera
891 * @mac_addr: pointer to mac address
892 *
893 * Return: success/failure
894 */
hal_rx_mpdu_get_addr1_be(uint8_t * buf,uint8_t * mac_addr)895 static inline QDF_STATUS hal_rx_mpdu_get_addr1_be(uint8_t *buf,
896 uint8_t *mac_addr)
897 {
898 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
899 struct __attribute__((__packed__)) hal_addr1 {
900 uint32_t ad1_31_0;
901 uint16_t ad1_47_32;
902 };
903 struct hal_addr1 *addr = (struct hal_addr1 *)mac_addr;
904 uint32_t mac_addr_ad1_valid;
905
906 mac_addr_ad1_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD1_VALID_GET(
907 rx_pkt_tlvs);
908
909 if (mac_addr_ad1_valid) {
910 addr->ad1_31_0 = HAL_RX_TLV_MPDU_AD1_31_0_GET(rx_pkt_tlvs);
911 addr->ad1_47_32 = HAL_RX_TLV_MPDU_AD1_47_32_GET(rx_pkt_tlvs);
912 return QDF_STATUS_SUCCESS;
913 }
914
915 return QDF_STATUS_E_FAILURE;
916 }
917
918 #ifndef CONFIG_WORD_BASED_TLV
919 /**
920 * hal_rx_mpdu_info_ampdu_flag_get_be() - get ampdu flag bit
921 * from rx mpdu info
922 * @buf: pointer to rx_pkt_tlvs
923 *
924 * Return: ampdu flag
925 */
hal_rx_mpdu_info_ampdu_flag_get_be(uint8_t * buf)926 static inline bool hal_rx_mpdu_info_ampdu_flag_get_be(uint8_t *buf)
927 {
928 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
929
930 return !!HAL_RX_TLV_AMPDU_FLAG_GET(rx_pkt_tlvs);
931 }
932
933 /**
934 * hal_rx_get_qdesc_addr_be() - API to get qdesc address of reo
935 * entrance ring desc
936 *
937 * @dst_ring_desc: reo dest ring descriptor (used for Lithium DP)
938 * @buf: pointer to the start of RX PKT TLV headers
939 * Return: qdesc address in reo destination ring buffer
940 */
hal_rx_get_qdesc_addr_be(uint8_t * dst_ring_desc,uint8_t * buf)941 static inline uint64_t hal_rx_get_qdesc_addr_be(uint8_t *dst_ring_desc,
942 uint8_t *buf)
943 {
944 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
945
946 return (uint64_t)HAL_RX_REO_QUEUE_DESC_ADDR_31_0_GET(rx_pkt_tlvs);
947 }
948
949 /**
950 * hal_rx_print_pn_be() - Prints the PN of rx packet.
951 * @buf: rx_tlv_hdr of the received packet
952 *
953 * Return: void
954 */
hal_rx_print_pn_be(uint8_t * buf)955 static inline void hal_rx_print_pn_be(uint8_t *buf)
956 {
957 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
958
959 uint32_t pn_31_0 = HAL_RX_TLV_MPDU_PN_31_0_GET(rx_pkt_tlvs);
960 uint32_t pn_63_32 = HAL_RX_TLV_MPDU_PN_63_32_GET(rx_pkt_tlvs);
961 uint32_t pn_95_64 = HAL_RX_TLV_MPDU_PN_95_64_GET(rx_pkt_tlvs);
962 uint32_t pn_127_96 = HAL_RX_TLV_MPDU_PN_127_96_GET(rx_pkt_tlvs);
963
964 hal_debug("PN number pn_127_96 0x%x pn_95_64 0x%x pn_63_32 0x%x pn_31_0 0x%x",
965 pn_127_96, pn_95_64, pn_63_32, pn_31_0);
966 }
967
hal_rx_tlv_get_pn_num_be(uint8_t * buf,uint64_t * pn_num)968 static inline void hal_rx_tlv_get_pn_num_be(uint8_t *buf, uint64_t *pn_num)
969 {
970 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
971
972 pn_num[0] = HAL_RX_TLV_MPDU_PN_31_0_GET(pkt_tlvs);
973 pn_num[0] |= ((uint64_t)HAL_RX_TLV_MPDU_PN_63_32_GET(pkt_tlvs) << 32);
974
975 pn_num[1] = HAL_RX_TLV_MPDU_PN_95_64_GET(pkt_tlvs);
976 pn_num[1] |= ((uint64_t)HAL_RX_TLV_MPDU_PN_127_96_GET(pkt_tlvs) << 32);
977 }
978
979 /**
980 * hal_rx_mpdu_get_addr4_be() - API to get address4 of the mpdu
981 * in the packet
982 * @buf: pointer to the start of RX PKT TLV header
983 * @mac_addr: pointer to mac address
984 *
985 * Return: success/failure
986 */
hal_rx_mpdu_get_addr4_be(uint8_t * buf,uint8_t * mac_addr)987 static inline QDF_STATUS hal_rx_mpdu_get_addr4_be(uint8_t *buf,
988 uint8_t *mac_addr)
989 {
990 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
991 struct __attribute__((__packed__)) hal_addr4 {
992 uint32_t ad4_31_0;
993 uint16_t ad4_47_32;
994 };
995 struct hal_addr4 *addr = (struct hal_addr4 *)mac_addr;
996 uint32_t mac_addr_ad4_valid;
997
998 mac_addr_ad4_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(pkt_tlvs);
999
1000 if (mac_addr_ad4_valid) {
1001 addr->ad4_31_0 = HAL_RX_TLV_MPDU_AD4_31_0_GET(pkt_tlvs);
1002 addr->ad4_47_32 = HAL_RX_TLV_MPDU_AD4_47_32_GET(pkt_tlvs);
1003 return QDF_STATUS_SUCCESS;
1004 }
1005
1006 return QDF_STATUS_E_FAILURE;
1007 }
1008
1009 /**
1010 * hal_rx_priv_info_set_in_tlv_be() - Save the private info to
1011 * the reserved bytes of rx_tlv_hdr
1012 * @buf: start of rx_tlv_hdr
1013 * @priv_data: hal_wbm_err_desc_info structure
1014 * @len: length of the private data
1015 * Return: void
1016 */
hal_rx_priv_info_set_in_tlv_be(uint8_t * buf,uint8_t * priv_data,uint32_t len)1017 static inline void hal_rx_priv_info_set_in_tlv_be(uint8_t *buf,
1018 uint8_t *priv_data,
1019 uint32_t len)
1020 {
1021 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1022 uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ?
1023 RX_BE_PADDING0_BYTES : len;
1024
1025 qdf_mem_copy(pkt_tlvs->rx_padding0, priv_data, copy_len);
1026 }
1027
1028 /**
1029 * hal_rx_priv_info_get_from_tlv_be() - retrieve the private data from
1030 * the reserved bytes of rx_tlv_hdr.
1031 * @buf: start of rx_tlv_hdr
1032 * @priv_data: Handle to get the private data, output parameter.
1033 * @len: length of the private data
1034 * Return: void
1035 */
hal_rx_priv_info_get_from_tlv_be(uint8_t * buf,uint8_t * priv_data,uint32_t len)1036 static inline void hal_rx_priv_info_get_from_tlv_be(uint8_t *buf,
1037 uint8_t *priv_data,
1038 uint32_t len)
1039 {
1040 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1041 uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ?
1042 RX_BE_PADDING0_BYTES : len;
1043
1044 qdf_mem_copy(priv_data, pkt_tlvs->rx_padding0, copy_len);
1045 }
1046
1047 /**
1048 * hal_rx_tlv_l3_type_get_be() - API to get the l3 type from
1049 * rx_msdu_start TLV
1050 * @buf: pointer to the start of RX PKT TLV headers
1051 *
1052 * Return: uint32_t(l3 type)
1053 */
hal_rx_tlv_l3_type_get_be(uint8_t * buf)1054 static inline uint32_t hal_rx_tlv_l3_type_get_be(uint8_t *buf)
1055 {
1056 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1057
1058 return HAL_RX_TLV_L3_TYPE_GET(rx_pkt_tlvs);
1059 }
1060
1061 /**
1062 * hal_rx_hw_desc_get_ppduid_get_be() - retrieve ppdu id
1063 * @rx_tlv_hdr: start address of rx_pkt_tlvs
1064 * @rxdma_dst_ring_desc: Rx HW descriptor
1065 *
1066 * Return: ppdu id
1067 */
1068 static inline uint32_t
hal_rx_hw_desc_get_ppduid_get_be(void * rx_tlv_hdr,void * rxdma_dst_ring_desc)1069 hal_rx_hw_desc_get_ppduid_get_be(void *rx_tlv_hdr, void *rxdma_dst_ring_desc)
1070 {
1071 struct rx_pkt_tlvs *rx_pkt_tlvs =
1072 (struct rx_pkt_tlvs *)rx_tlv_hdr;
1073
1074 return HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs);
1075 }
1076
1077 /**
1078 * hal_rx_tlv_phy_ppdu_id_get_be() - get phy_ppdu_id value
1079 * from rx attention
1080 * @buf: pointer to rx_pkt_tlvs
1081 *
1082 * Return: phy_ppdu_id
1083 */
hal_rx_tlv_phy_ppdu_id_get_be(uint8_t * buf)1084 static inline uint16_t hal_rx_tlv_phy_ppdu_id_get_be(uint8_t *buf)
1085 {
1086 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1087
1088 return HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs);
1089 }
1090
1091 /**
1092 * hal_rx_attn_phy_ppdu_id_get_be() - get phy_ppdu_id value
1093 * from rx attention
1094 * @buf: pointer to rx_pkt_tlvs
1095 *
1096 * Return: phy_ppdu_id
1097 */
hal_rx_attn_phy_ppdu_id_get_be(uint8_t * buf)1098 static inline uint16_t hal_rx_attn_phy_ppdu_id_get_be(uint8_t *buf)
1099 {
1100 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1101 uint16_t phy_ppdu_id;
1102
1103 phy_ppdu_id = HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs);
1104
1105 return phy_ppdu_id;
1106 }
1107
1108 static inline uint32_t
hal_rx_get_ppdu_id_be(uint8_t * buf)1109 hal_rx_get_ppdu_id_be(uint8_t *buf)
1110 {
1111 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1112
1113 return HAL_RX_GET_PPDU_ID(rx_pkt_tlvs);
1114 }
1115
1116 /**
1117 * hal_rx_mpdu_peer_meta_data_set_be() - set peer meta data in RX mpdu start tlv
1118 * @buf: rx_tlv_hdr of the received packet
1119 * @peer_mdata: peer meta data to be set.
1120 *
1121 * Return: void
1122 */
1123 static inline void
hal_rx_mpdu_peer_meta_data_set_be(uint8_t * buf,uint32_t peer_mdata)1124 hal_rx_mpdu_peer_meta_data_set_be(uint8_t *buf, uint32_t peer_mdata)
1125 {
1126 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1127
1128 HAL_RX_TLV_PEER_META_DATA_GET(rx_pkt_tlvs) = peer_mdata;
1129 }
1130
1131 /*
1132 * Get peer_meta_data from RX_MPDU_INFO within RX_MPDU_START
1133 */
1134
hal_rx_mpdu_peer_meta_data_get_be(uint8_t * buf)1135 static inline uint32_t hal_rx_mpdu_peer_meta_data_get_be(uint8_t *buf)
1136 {
1137 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1138
1139 return HAL_RX_TLV_PEER_META_DATA_GET(rx_pkt_tlvs);
1140 }
1141
hal_rx_get_filter_category_be(uint8_t * buf)1142 static inline uint8_t hal_rx_get_filter_category_be(uint8_t *buf)
1143 {
1144 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1145
1146 return HAL_RX_GET_FILTER_CATEGORY(rx_pkt_tlvs);
1147 }
1148
1149 /**
1150 * hal_rx_is_unicast_be() - check packet is unicast frame or not.
1151 * @buf: pointer to rx pkt TLV.
1152 *
1153 * Return: true on unicast.
1154 */
hal_rx_is_unicast_be(uint8_t * buf)1155 static inline bool hal_rx_is_unicast_be(uint8_t *buf)
1156 {
1157 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1158 uint32_t grp_id;
1159
1160 grp_id = HAL_RX_TLV_SW_FRAME_GROUP_ID_GET(rx_pkt_tlvs);
1161
1162 return (HAL_MPDU_SW_FRAME_GROUP_UNICAST_DATA == grp_id) ? true : false;
1163 }
1164
1165 #else
1166 #define IS_ADDR_MULTICAST(_a) (*(_a) & 0x01)
hal_rx_is_unicast_be(uint8_t * buf)1167 static inline bool hal_rx_is_unicast_be(uint8_t *buf)
1168 {
1169 uint8_t mac[QDF_MAC_ADDR_SIZE] = {0};
1170
1171 hal_rx_mpdu_get_addr1_be(buf, &mac[0]);
1172
1173 return !IS_ADDR_MULTICAST(mac);
1174 }
1175
1176 /**
1177 * hal_rx_priv_info_set_in_tlv_be() - Save the private info to
1178 * the reserved bytes of rx_tlv_hdr
1179 * @buf: start of rx_tlv_hdr
1180 * @priv_data: hal_wbm_err_desc_info structure
1181 * @len: length of the private data
1182 *
1183 * Return: void
1184 */
hal_rx_priv_info_set_in_tlv_be(uint8_t * buf,uint8_t * priv_data,uint32_t len)1185 static inline void hal_rx_priv_info_set_in_tlv_be(uint8_t *buf,
1186 uint8_t *priv_data,
1187 uint32_t len)
1188 {
1189 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1190 uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ?
1191 RX_BE_PADDING0_BYTES : len;
1192
1193 qdf_mem_copy(&(HAL_RX_MSDU_END(pkt_tlvs).ppdu_start_timestamp_63_32),
1194 priv_data, copy_len);
1195 }
1196
1197 /**
1198 * hal_rx_priv_info_get_from_tlv_be() - retrieve the private data from
1199 * the reserved bytes of rx_tlv_hdr.
1200 * @buf: start of rx_tlv_hdr
1201 * @priv_data: Handle to get the private data, output parameter.
1202 * @len: length of the private data
1203 *
1204 * Return: void
1205 */
hal_rx_priv_info_get_from_tlv_be(uint8_t * buf,uint8_t * priv_data,uint32_t len)1206 static inline void hal_rx_priv_info_get_from_tlv_be(uint8_t *buf,
1207 uint8_t *priv_data,
1208 uint32_t len)
1209 {
1210 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1211 uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ?
1212 RX_BE_PADDING0_BYTES : len;
1213
1214 qdf_mem_copy(priv_data,
1215 &(HAL_RX_MSDU_END(pkt_tlvs).ppdu_start_timestamp_63_32),
1216 copy_len);
1217 }
1218
1219 /**
1220 * hal_rx_print_pn_be() - Prints the PN of rx packet.
1221 * @buf: rx_tlv_hdr of the received packet
1222 *
1223 * Return: void
1224 */
hal_rx_print_pn_be(uint8_t * buf)1225 static inline void hal_rx_print_pn_be(uint8_t *buf)
1226 {
1227 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1228
1229 uint32_t pn_31_0 = HAL_RX_TLV_MPDU_PN_31_0_GET(rx_pkt_tlvs);
1230 uint32_t pn_63_32 = HAL_RX_TLV_MPDU_PN_63_32_GET(rx_pkt_tlvs);
1231 uint32_t pn_95_64 = HAL_RX_TLV_MPDU_PN_95_64_GET(rx_pkt_tlvs);
1232
1233 hal_debug("PN number pn_95_64 0x%x pn_63_32 0x%x pn_31_0 0x%x",
1234 pn_95_64, pn_63_32, pn_31_0);
1235 }
1236
hal_rx_tlv_get_pn_num_be(uint8_t * buf,uint64_t * pn_num)1237 static inline void hal_rx_tlv_get_pn_num_be(uint8_t *buf, uint64_t *pn_num)
1238 {
1239 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1240
1241 pn_num[0] = HAL_RX_TLV_MPDU_PN_31_0_GET(pkt_tlvs);
1242 pn_num[0] |= ((uint64_t)HAL_RX_TLV_MPDU_PN_63_32_GET(pkt_tlvs) << 32);
1243
1244 pn_num[1] = HAL_RX_TLV_MPDU_PN_95_64_GET(pkt_tlvs);
1245 }
1246
1247 #ifdef NO_RX_PKT_HDR_TLV
1248 static inline uint32_t
hal_rx_get_ppdu_id_be(uint8_t * buf)1249 hal_rx_get_ppdu_id_be(uint8_t *buf)
1250 {
1251 /* If CONFIG_WORD_BASED_TLV and NO_RX_PKT_HDR_TLV are enabled
1252 * phy_ppdu_id is not available
1253 */
1254 hal_alert_rl("PPDU_ID is not subscribed check build flags");
1255 return 0;
1256 }
1257 #else
1258 static inline uint32_t
hal_rx_get_ppdu_id_be(uint8_t * buf)1259 hal_rx_get_ppdu_id_be(uint8_t *buf)
1260 {
1261 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1262
1263 return HAL_RX_PKT_HDR_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs);
1264 }
1265 #endif
1266 #endif
1267
1268 /**
1269 * hal_rx_tlv_msdu_len_get_be() - API to get the MSDU length from
1270 * rx_msdu_start TLV
1271 * @buf: pointer to the start of RX PKT TLV headers
1272 *
1273 * Return: msdu length
1274 */
hal_rx_tlv_msdu_len_get_be(uint8_t * buf)1275 static inline uint32_t hal_rx_tlv_msdu_len_get_be(uint8_t *buf)
1276 {
1277 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1278
1279 return HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs);
1280 }
1281
1282 /**
1283 * hal_rx_tlv_msdu_len_set_be() - API to set the MSDU length from
1284 * rx_msdu_start TLV
1285 * @buf: pointer to the start of RX PKT TLV headers
1286 * @len: msdu length
1287 *
1288 * Return: none
1289 */
hal_rx_tlv_msdu_len_set_be(uint8_t * buf,uint32_t len)1290 static inline void hal_rx_tlv_msdu_len_set_be(uint8_t *buf, uint32_t len)
1291 {
1292 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1293
1294 HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs) = len;
1295 }
1296
1297 /**
1298 * hal_rx_tlv_bw_get_be() - API to get the Bandwidth Interval from
1299 * rx_msdu_start
1300 * @buf: pointer to the start of RX PKT TLV header
1301 *
1302 * Return: uint32_t(bw)
1303 */
hal_rx_tlv_bw_get_be(uint8_t * buf)1304 static inline uint32_t hal_rx_tlv_bw_get_be(uint8_t *buf)
1305 {
1306 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1307
1308 return HAL_RX_TLV_BW_GET(rx_pkt_tlvs);
1309 }
1310
1311 /**
1312 * hal_rx_tlv_toeplitz_get_be() - API to get the toeplitz hash from
1313 * rx_msdu_start TLV
1314 * @buf: pointer to the start of RX PKT TLV headers
1315 *
1316 * Return: toeplitz hash
1317 */
hal_rx_tlv_toeplitz_get_be(uint8_t * buf)1318 static inline uint32_t hal_rx_tlv_toeplitz_get_be(uint8_t *buf)
1319 {
1320 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1321
1322 return HAL_RX_TLV_FLOWID_TOEPLITZ_GET(rx_pkt_tlvs);
1323 }
1324
1325 /**
1326 * hal_rx_tlv_sgi_get_be() - API to get the Short Guard Interval from
1327 * rx_msdu_start TLV
1328 * @buf: pointer to the start of RX PKT TLV headers
1329 *
1330 * Return: uint32_t(sgi)
1331 */
hal_rx_tlv_sgi_get_be(uint8_t * buf)1332 static inline uint32_t hal_rx_tlv_sgi_get_be(uint8_t *buf)
1333 {
1334 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1335
1336 return HAL_RX_TLV_SGI_GET(rx_pkt_tlvs);
1337 }
1338
1339 /**
1340 * hal_rx_tlv_rate_mcs_get_be() - API to get the MCS rate from
1341 * rx_msdu_start TLV
1342 * @buf: pointer to the start of RX PKT TLV headers
1343 *
1344 * Return: uint32_t(rate_mcs)
1345 */
hal_rx_tlv_rate_mcs_get_be(uint8_t * buf)1346 static inline uint32_t hal_rx_tlv_rate_mcs_get_be(uint8_t *buf)
1347 {
1348 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1349 uint32_t rate_mcs;
1350
1351 rate_mcs = HAL_RX_TLV_RATE_MCS_GET(rx_pkt_tlvs);
1352
1353 return rate_mcs;
1354 }
1355
1356 /**
1357 * hal_rx_msdu_get_keyid_be() - API to get the key id of the decrypted packet
1358 * from rx_msdu_end
1359 * @buf: pointer to the start of RX PKT TLV header
1360 *
1361 * Return: uint32_t(key id)
1362 */
1363
hal_rx_msdu_get_keyid_be(uint8_t * buf)1364 static inline uint8_t hal_rx_msdu_get_keyid_be(uint8_t *buf)
1365 {
1366 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1367 uint32_t keyid_octet;
1368
1369 keyid_octet = HAL_RX_TLV_KEYID_OCTET_GET(rx_pkt_tlvs);
1370
1371 return keyid_octet & 0x3;
1372 }
1373
1374 /**
1375 * hal_rx_tlv_get_rssi_be() - API to get the rssi of received pkt from
1376 * rx_msdu_start
1377 * @buf: pointer to the start of RX PKT TLV header
1378 *
1379 * Return: uint32_t(rssi)
1380 */
1381
hal_rx_tlv_get_rssi_be(uint8_t * buf)1382 static inline uint32_t hal_rx_tlv_get_rssi_be(uint8_t *buf)
1383 {
1384 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1385 uint32_t rssi;
1386
1387 rssi = HAL_RX_TLV_RSSI_GET(rx_pkt_tlvs);
1388
1389 return rssi;
1390 }
1391
1392 /**
1393 * hal_rx_tlv_get_freq_be() - API to get the frequency of operating
1394 * channel from rx_msdu_start
1395 * @buf: pointer to the start of RX PKT TLV header
1396 *
1397 * Return: uint32_t(frequency)
1398 */
1399
hal_rx_tlv_get_freq_be(uint8_t * buf)1400 static inline uint32_t hal_rx_tlv_get_freq_be(uint8_t *buf)
1401 {
1402 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1403 uint32_t freq;
1404
1405 freq = HAL_RX_TLV_FREQ_GET(rx_pkt_tlvs);
1406
1407 return freq;
1408 }
1409
1410
1411 /**
1412 * hal_rx_tlv_get_pkt_type_be() - API to get the pkt type from
1413 * rx_msdu_start
1414 * @buf: pointer to the start of RX PKT TLV header
1415 *
1416 * Return: uint32_t(pkt type)
1417 */
1418
hal_rx_tlv_get_pkt_type_be(uint8_t * buf)1419 static inline uint32_t hal_rx_tlv_get_pkt_type_be(uint8_t *buf)
1420 {
1421 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1422 uint32_t pkt_type;
1423
1424 pkt_type = HAL_RX_TLV_PKT_TYPE_GET(rx_pkt_tlvs);
1425
1426 return pkt_type;
1427 }
1428
1429 /*******************************************************************************
1430 * RX ERROR APIS
1431 ******************************************************************************/
1432
1433 /**
1434 * hal_rx_tlv_decrypt_err_get_be() - API to get the Decrypt ERR from
1435 * rx_mpdu_end TLV
1436 * @buf: pointer to the start of RX PKT TLV headers
1437 *
1438 * Return: uint32_t(decrypt_err)
1439 */
hal_rx_tlv_decrypt_err_get_be(uint8_t * buf)1440 static inline uint32_t hal_rx_tlv_decrypt_err_get_be(uint8_t *buf)
1441 {
1442 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1443 uint32_t decrypt_err;
1444
1445 decrypt_err = HAL_RX_TLV_DECRYPT_ERR_GET(rx_pkt_tlvs);
1446
1447 return decrypt_err;
1448 }
1449
1450 /**
1451 * hal_rx_tlv_mic_err_get_be() - API to get the MIC ERR from rx_tlv TLV
1452 * @buf: pointer to the start of RX PKT TLV headers
1453 *
1454 * Return: uint32_t(mic_err)
1455 */
hal_rx_tlv_mic_err_get_be(uint8_t * buf)1456 static inline uint32_t hal_rx_tlv_mic_err_get_be(uint8_t *buf)
1457 {
1458 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1459 uint32_t mic_err;
1460
1461 mic_err = HAL_RX_TLV_MIC_ERR_GET(rx_pkt_tlvs);
1462
1463 return mic_err;
1464 }
1465
1466 /**
1467 * hal_get_reo_ent_desc_qdesc_addr_be() - API to get qdesc address of
1468 * reo entrance ring desc
1469 * @desc: reo entrance ring descriptor
1470 *
1471 * Return: qdesc address
1472 */
hal_get_reo_ent_desc_qdesc_addr_be(uint8_t * desc)1473 static inline uint8_t *hal_get_reo_ent_desc_qdesc_addr_be(uint8_t *desc)
1474 {
1475 return desc + REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET;
1476 }
1477
1478 /**
1479 * hal_set_reo_ent_desc_reo_dest_ind_be() - API to set reo destination
1480 * indication of reo entrance ring desc
1481 * @desc: reo ent ring descriptor
1482 * @dst_ind: reo destination indication value
1483 *
1484 * Return: None
1485 */
1486 static inline void
hal_set_reo_ent_desc_reo_dest_ind_be(uint8_t * desc,uint32_t dst_ind)1487 hal_set_reo_ent_desc_reo_dest_ind_be(uint8_t *desc, uint32_t dst_ind)
1488 {
1489 HAL_RX_FLD_SET(desc, REO_ENTRANCE_RING,
1490 REO_DESTINATION_INDICATION, dst_ind);
1491 }
1492
1493 /**
1494 * hal_rx_mpdu_sequence_number_get_be() - Get mpdu sequence number
1495 * @buf: pointer to packet buffer
1496 *
1497 * Return: mpdu sequence
1498 */
hal_rx_mpdu_sequence_number_get_be(uint8_t * buf)1499 static inline int hal_rx_mpdu_sequence_number_get_be(uint8_t *buf)
1500 {
1501 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1502
1503 return HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs);
1504 }
1505
1506 /**
1507 * hal_rx_msdu_packet_metadata_get_generic_be() - API to get the msdu
1508 * information from
1509 * rx_msdu_end TLV
1510 * @buf: pointer to the start of RX PKT TLV headers
1511 * @pkt_msdu_metadata: pointer to the msdu info structure
1512 */
1513 static inline void
hal_rx_msdu_packet_metadata_get_generic_be(uint8_t * buf,void * pkt_msdu_metadata)1514 hal_rx_msdu_packet_metadata_get_generic_be(uint8_t *buf,
1515 void *pkt_msdu_metadata)
1516 {
1517 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1518 struct hal_rx_msdu_metadata *msdu_metadata =
1519 (struct hal_rx_msdu_metadata *)pkt_msdu_metadata;
1520
1521 msdu_metadata->l3_hdr_pad =
1522 HAL_RX_TLV_L3_HEADER_PADDING_GET(rx_pkt_tlvs);
1523 msdu_metadata->sa_idx = HAL_RX_TLV_SA_IDX_GET(rx_pkt_tlvs);
1524 msdu_metadata->da_idx = HAL_RX_TLV_DA_IDX_GET(rx_pkt_tlvs);
1525 msdu_metadata->sa_sw_peer_id =
1526 HAL_RX_TLV_SA_SW_PEER_ID_GET(rx_pkt_tlvs);
1527 }
1528
1529 /**
1530 * hal_rx_tlv_nss_get_be() - API to get the NSS Interval from
1531 * rx_msdu_start
1532 * @buf: pointer to the start of RX PKT TLV header
1533 *
1534 * Return: uint32_t(nss)
1535 */
hal_rx_tlv_nss_get_be(uint8_t * buf)1536 static inline uint32_t hal_rx_tlv_nss_get_be(uint8_t *buf)
1537 {
1538 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1539 uint8_t mimo_ss_bitmap;
1540
1541 mimo_ss_bitmap = HAL_RX_TLV_MIMO_SS_BITMAP(rx_pkt_tlvs);
1542
1543 return qdf_get_hweight8(mimo_ss_bitmap);
1544 }
1545
1546 #ifdef GET_MSDU_AGGREGATION
1547 #define HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs)\
1548 {\
1549 bool first_msdu, last_msdu; \
1550 first_msdu = HAL_RX_TLV_FIRST_MSDU_GET(rx_desc);\
1551 last_msdu = HAL_RX_TLV_LAST_MSDU_GET(rx_desc);\
1552 if (first_msdu && last_msdu)\
1553 rs->rs_flags &= (~IEEE80211_AMSDU_FLAG);\
1554 else\
1555 rs->rs_flags |= (IEEE80211_AMSDU_FLAG); \
1556 } \
1557
1558 #define HAL_RX_SET_MSDU_AGGREGATION((rs_mpdu), (rs_ppdu))\
1559 {\
1560 if (rs_mpdu->rs_flags & IEEE80211_AMSDU_FLAG)\
1561 rs_ppdu->rs_flags |= IEEE80211_AMSDU_FLAG;\
1562 } \
1563
1564 #else
1565 #define HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs)
1566 #define HAL_RX_SET_MSDU_AGGREGATION(rs_mpdu, rs_ppdu)
1567 #endif
1568
1569 /**
1570 * hal_rx_mon_hw_desc_get_mpdu_status_be() - Retrieve MPDU status
1571 * @hw_desc_addr: Start address of Rx HW TLVs
1572 * @rs: Status for monitor mode
1573 *
1574 * Return: void
1575 */
1576 static inline void
hal_rx_mon_hw_desc_get_mpdu_status_be(void * hw_desc_addr,struct mon_rx_status * rs)1577 hal_rx_mon_hw_desc_get_mpdu_status_be(void *hw_desc_addr,
1578 struct mon_rx_status *rs)
1579 {
1580 uint32_t reg_value;
1581 struct rx_pkt_tlvs *rx_desc =
1582 (struct rx_pkt_tlvs *)hw_desc_addr;
1583 const uint32_t sgi_hw_to_cdp[] = {
1584 CDP_SGI_0_8_US,
1585 CDP_SGI_0_4_US,
1586 CDP_SGI_1_6_US,
1587 CDP_SGI_3_2_US,
1588 };
1589
1590 HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs);
1591
1592 rs->ant_signal_db = HAL_RX_TLV_ANT_SIGNAL_DB_GET(rx_desc);
1593 rs->is_stbc = HAL_RX_TLV_STBC_GET(rx_desc);
1594
1595 reg_value = HAL_RX_TLV_SGI_GET(rx_desc);
1596 rs->sgi = sgi_hw_to_cdp[reg_value];
1597
1598 reg_value = HAL_RX_TLV_RECEPTION_TYPE_GET(rx_desc);
1599 rs->beamformed = (reg_value == HAL_RX_RECEPTION_TYPE_MU_MIMO) ? 1 : 0;
1600 /* TODO: rs->beamformed should be set for SU beamforming also */
1601 }
1602
hal_rx_tlv_tid_get_be(uint8_t * buf)1603 static inline uint32_t hal_rx_tlv_tid_get_be(uint8_t *buf)
1604 {
1605 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1606 uint32_t tid;
1607
1608 tid = HAL_RX_TLV_TID_GET(rx_pkt_tlvs);
1609
1610 return tid;
1611 }
1612
1613 /**
1614 * hal_rx_tlv_reception_type_get_be() - API to get the reception type
1615 * Interval from rx_msdu_start
1616 * @buf: pointer to the start of RX PKT TLV header
1617 *
1618 * Return: uint32_t(reception_type)
1619 */
1620 static inline
hal_rx_tlv_reception_type_get_be(uint8_t * buf)1621 uint32_t hal_rx_tlv_reception_type_get_be(uint8_t *buf)
1622 {
1623 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1624 uint32_t reception_type;
1625
1626 reception_type = HAL_RX_TLV_RECEPTION_TYPE_GET(rx_pkt_tlvs);
1627
1628 return reception_type;
1629 }
1630
1631 /**
1632 * hal_rx_msdu_end_da_idx_get_be() - API to get da_idx from
1633 * rx_msdu_end TLV
1634 * @buf: pointer to the start of RX PKT TLV headers
1635 *
1636 * Return: da index
1637 */
hal_rx_msdu_end_da_idx_get_be(uint8_t * buf)1638 static inline uint16_t hal_rx_msdu_end_da_idx_get_be(uint8_t *buf)
1639 {
1640 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1641 uint16_t da_idx;
1642
1643 da_idx = HAL_RX_TLV_DA_IDX_GET(rx_pkt_tlvs);
1644
1645 return da_idx;
1646 }
1647
1648 /**
1649 * hal_rx_get_rx_fragment_number_be() - Function to retrieve rx fragment number
1650 * @buf: Network buffer
1651 *
1652 * Return: rx fragment number
1653 */
1654 static inline
hal_rx_get_rx_fragment_number_be(uint8_t * buf)1655 uint8_t hal_rx_get_rx_fragment_number_be(uint8_t *buf)
1656 {
1657 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1658
1659 /* Return first 4 bits as fragment number */
1660 return (HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs) &
1661 DOT11_SEQ_FRAG_MASK);
1662 }
1663
1664 /**
1665 * hal_rx_tlv_da_is_mcbc_get_be() - API to check if pkt is MCBC from
1666 * rx_msdu_end TLV
1667 * @buf: pointer to the start of RX PKT TLV headers
1668 *
1669 * Return: da_is_mcbc
1670 */
1671 static inline uint8_t
hal_rx_tlv_da_is_mcbc_get_be(uint8_t * buf)1672 hal_rx_tlv_da_is_mcbc_get_be(uint8_t *buf)
1673 {
1674 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1675
1676 return HAL_RX_TLV_DA_IS_MCBC_GET(rx_pkt_tlvs);
1677 }
1678
1679 /**
1680 * hal_rx_tlv_is_tkip_mic_err_get_be() - API to get tkip Mic error
1681 * from rx_msdu_end TLV
1682 * @buf: pointer to the start of RX PKT TLV headers
1683 *
1684 * Return: tkip_mic_err
1685 */
1686 static inline uint8_t
hal_rx_tlv_is_tkip_mic_err_get_be(uint8_t * buf)1687 hal_rx_tlv_is_tkip_mic_err_get_be(uint8_t *buf)
1688 {
1689 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1690
1691 return HAL_RX_TLV_IS_TKIP_MIC_ERR_GET(rx_pkt_tlvs);
1692 }
1693
1694 /**
1695 * hal_rx_tlv_sa_is_valid_get_be() - API to get the sa_is_valid bit from
1696 * rx_msdu_end TLV
1697 * @buf: pointer to the start of RX PKT TLV headers
1698 *
1699 * Return: sa_is_valid bit
1700 */
1701 static inline uint8_t
hal_rx_tlv_sa_is_valid_get_be(uint8_t * buf)1702 hal_rx_tlv_sa_is_valid_get_be(uint8_t *buf)
1703 {
1704 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1705 uint8_t sa_is_valid;
1706
1707 sa_is_valid = HAL_RX_TLV_SA_IS_VALID_GET(rx_pkt_tlvs);
1708
1709 return sa_is_valid;
1710 }
1711
1712 /**
1713 * hal_rx_tlv_sa_idx_get_be() - API to get the sa_idx from rx_msdu_end TLV
1714 * @buf: pointer to the start of RX PKT TLV headers
1715 *
1716 * Return: sa_idx (SA AST index)
1717 */
1718 static inline
hal_rx_tlv_sa_idx_get_be(uint8_t * buf)1719 uint16_t hal_rx_tlv_sa_idx_get_be(uint8_t *buf)
1720 {
1721 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1722 uint16_t sa_idx;
1723
1724 sa_idx = HAL_RX_TLV_SA_IDX_GET(rx_pkt_tlvs);
1725
1726 return sa_idx;
1727 }
1728
1729 /**
1730 * hal_rx_desc_is_first_msdu_be() - Check if first msdu
1731 * @hw_desc_addr: hardware descriptor address
1732 *
1733 * Return: 0 - success/ non-zero failure
1734 */
hal_rx_desc_is_first_msdu_be(void * hw_desc_addr)1735 static inline uint32_t hal_rx_desc_is_first_msdu_be(void *hw_desc_addr)
1736 {
1737 struct rx_pkt_tlvs *rx_pkt_tlvs =
1738 (struct rx_pkt_tlvs *)hw_desc_addr;
1739
1740 return HAL_RX_TLV_FIRST_MSDU_GET(rx_pkt_tlvs);
1741 }
1742
1743 /**
1744 * hal_rx_tlv_l3_hdr_padding_get_be() - API to get the l3_header padding
1745 * from rx_msdu_end TLV
1746 * @buf: pointer to the start of RX PKT TLV headers
1747 *
1748 * Return: number of l3 header padding bytes
1749 */
hal_rx_tlv_l3_hdr_padding_get_be(uint8_t * buf)1750 static inline uint32_t hal_rx_tlv_l3_hdr_padding_get_be(uint8_t *buf)
1751 {
1752 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1753 uint32_t l3_header_padding;
1754
1755 l3_header_padding = HAL_RX_TLV_L3_HEADER_PADDING_GET(rx_pkt_tlvs);
1756
1757 return l3_header_padding;
1758 }
1759
1760 /**
1761 * hal_rx_encryption_info_valid_be() - Returns encryption type.
1762 * @buf: rx_tlv_hdr of the received packet
1763 *
1764 * Return: encryption type
1765 */
hal_rx_encryption_info_valid_be(uint8_t * buf)1766 static inline uint32_t hal_rx_encryption_info_valid_be(uint8_t *buf)
1767 {
1768 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1769 uint32_t encryption_info =
1770 HAL_RX_TLV_MPDU_ENCRYPTION_INFO_VALID(rx_pkt_tlvs);
1771
1772 return encryption_info;
1773 }
1774
1775 /**
1776 * hal_rx_tlv_first_msdu_get_be() - API to get first msdu status from
1777 * rx_msdu_end TLV
1778 * @buf: pointer to the start of RX PKT TLV headers
1779 *
1780 * Return: first_msdu
1781 */
hal_rx_tlv_first_msdu_get_be(uint8_t * buf)1782 static inline uint8_t hal_rx_tlv_first_msdu_get_be(uint8_t *buf)
1783 {
1784 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1785 uint8_t first_msdu;
1786
1787 first_msdu = HAL_RX_TLV_FIRST_MSDU_GET(rx_pkt_tlvs);
1788
1789 return first_msdu;
1790 }
1791
1792 /**
1793 * hal_rx_tlv_da_is_valid_get_be() - API to check if da is valid from
1794 * rx_msdu_end TLV
1795 * @buf: pointer to the start of RX PKT TLV headers
1796 *
1797 * Return: da_is_valid
1798 */
hal_rx_tlv_da_is_valid_get_be(uint8_t * buf)1799 static inline uint8_t hal_rx_tlv_da_is_valid_get_be(uint8_t *buf)
1800 {
1801 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1802 uint8_t da_is_valid;
1803
1804 da_is_valid = HAL_RX_TLV_DA_IS_VALID_GET(rx_pkt_tlvs);
1805
1806 return da_is_valid;
1807 }
1808
1809 /**
1810 * hal_rx_tlv_last_msdu_get_be() - API to get last msdu status from
1811 * rx_msdu_end TLV
1812 * @buf: pointer to the start of RX PKT TLV headers
1813 *
1814 * Return: last_msdu
1815 */
hal_rx_tlv_last_msdu_get_be(uint8_t * buf)1816 static inline uint8_t hal_rx_tlv_last_msdu_get_be(uint8_t *buf)
1817 {
1818 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1819 uint8_t last_msdu;
1820
1821 last_msdu = HAL_RX_TLV_LAST_MSDU_GET(rx_pkt_tlvs);
1822
1823 return last_msdu;
1824 }
1825
1826 /**
1827 * hal_rx_get_mpdu_mac_ad4_valid_be() - Retrieves if mpdu 4th addr is valid
1828 * @buf: Network buffer
1829 *
1830 * Return: value of mpdu 4th address valid field
1831 */
hal_rx_get_mpdu_mac_ad4_valid_be(uint8_t * buf)1832 static inline bool hal_rx_get_mpdu_mac_ad4_valid_be(uint8_t *buf)
1833 {
1834 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1835 bool ad4_valid = 0;
1836
1837 ad4_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(rx_pkt_tlvs);
1838
1839 return ad4_valid;
1840 }
1841
1842 /**
1843 * hal_rx_mpdu_start_sw_peer_id_get_be() - Retrieve sw peer_id
1844 * @buf: network buffer
1845 *
1846 * Return: sw peer_id
1847 */
hal_rx_mpdu_start_sw_peer_id_get_be(uint8_t * buf)1848 static inline uint32_t hal_rx_mpdu_start_sw_peer_id_get_be(uint8_t *buf)
1849 {
1850 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1851
1852 return HAL_RX_TLV_SW_PEER_ID_GET(rx_pkt_tlvs);
1853 }
1854
1855 /**
1856 * hal_rx_mpdu_get_to_ds_be() - API to get the tods info
1857 * from rx_mpdu_start
1858 *
1859 * @buf: pointer to the start of RX PKT TLV header
1860 * Return: uint32_t(to_ds)
1861 */
hal_rx_mpdu_get_to_ds_be(uint8_t * buf)1862 static inline uint32_t hal_rx_mpdu_get_to_ds_be(uint8_t *buf)
1863 {
1864 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1865
1866 return HAL_RX_TLV_MPDU_GET_TODS(rx_pkt_tlvs);
1867 }
1868
1869 /**
1870 * hal_rx_mpdu_get_fr_ds_be() - API to get the from ds info
1871 * from rx_mpdu_start
1872 * @buf: pointer to the start of RX PKT TLV header
1873 *
1874 * Return: uint32_t(fr_ds)
1875 */
hal_rx_mpdu_get_fr_ds_be(uint8_t * buf)1876 static inline uint32_t hal_rx_mpdu_get_fr_ds_be(uint8_t *buf)
1877 {
1878 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1879
1880 return HAL_RX_TLV_MPDU_GET_FROMDS(rx_pkt_tlvs);
1881 }
1882
1883 /**
1884 * hal_rx_get_mpdu_frame_control_valid_be() - Retrieves mpdu frame
1885 * control valid
1886 * @buf: Network buffer
1887 *
1888 * Return: value of frame control valid field
1889 */
hal_rx_get_mpdu_frame_control_valid_be(uint8_t * buf)1890 static inline uint8_t hal_rx_get_mpdu_frame_control_valid_be(uint8_t *buf)
1891 {
1892 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1893
1894 return HAL_RX_TLV_MPDU_GET_FRAME_CONTROL_VALID(rx_pkt_tlvs);
1895 }
1896
1897 /**
1898 * hal_rx_phy_legacy_get_rssi_be() - API to get RSSI from TLV
1899 * WIFIPHYRX_RSSI_LEGACY_E
1900 * @buf: pointer to the start of WIFIPHYRX_RSSI_LEGACY_E TLV
1901 *
1902 * Return: value of RSSI
1903 */
hal_rx_phy_legacy_get_rssi_be(uint8_t * buf)1904 static inline int8_t hal_rx_phy_legacy_get_rssi_be(uint8_t *buf)
1905 {
1906 return HAL_RX_GET_64(buf, PHYRX_RSSI_LEGACY, RSSI_COMB);
1907 }
1908
1909 /**
1910 * hal_rx_mpdu_get_addr2_be() - API to check get address2 of the mpdu
1911 * in the packet
1912 * @buf: pointer to the start of RX PKT TLV header
1913 * @mac_addr: pointer to mac address
1914 *
1915 * Return: success/failure
1916 */
hal_rx_mpdu_get_addr2_be(uint8_t * buf,uint8_t * mac_addr)1917 static inline QDF_STATUS hal_rx_mpdu_get_addr2_be(uint8_t *buf,
1918 uint8_t *mac_addr)
1919 {
1920 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1921 struct __attribute__((__packed__)) hal_addr2 {
1922 uint16_t ad2_15_0;
1923 uint32_t ad2_47_16;
1924 };
1925 struct hal_addr2 *addr = (struct hal_addr2 *)mac_addr;
1926 uint32_t mac_addr_ad2_valid;
1927
1928 mac_addr_ad2_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(rx_pkt_tlvs);
1929
1930 if (mac_addr_ad2_valid) {
1931 addr->ad2_15_0 = HAL_RX_TLV_MPDU_AD2_15_0_GET(rx_pkt_tlvs);
1932 addr->ad2_47_16 = HAL_RX_TLV_MPDU_AD2_47_16_GET(rx_pkt_tlvs);
1933 return QDF_STATUS_SUCCESS;
1934 }
1935
1936 return QDF_STATUS_E_FAILURE;
1937 }
1938
1939 /**
1940 * hal_rx_mpdu_get_addr3_be() - API to get address3 of the mpdu in the
1941 * packet
1942 * @buf: pointer to the start of RX PKT TLV header
1943 * @mac_addr: pointer to mac address
1944 *
1945 * Return: success/failure
1946 */
hal_rx_mpdu_get_addr3_be(uint8_t * buf,uint8_t * mac_addr)1947 static inline QDF_STATUS hal_rx_mpdu_get_addr3_be(uint8_t *buf,
1948 uint8_t *mac_addr)
1949 {
1950 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1951 struct __attribute__((__packed__)) hal_addr3 {
1952 uint32_t ad3_31_0;
1953 uint16_t ad3_47_32;
1954 };
1955 struct hal_addr3 *addr = (struct hal_addr3 *)mac_addr;
1956 uint32_t mac_addr_ad3_valid;
1957
1958 mac_addr_ad3_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD3_VALID_GET(rx_pkt_tlvs);
1959
1960 if (mac_addr_ad3_valid) {
1961 addr->ad3_31_0 = HAL_RX_TLV_MPDU_AD3_31_0_GET(rx_pkt_tlvs);
1962 addr->ad3_47_32 = HAL_RX_TLV_MPDU_AD3_47_32_GET(rx_pkt_tlvs);
1963 return QDF_STATUS_SUCCESS;
1964 }
1965
1966 return QDF_STATUS_E_FAILURE;
1967 }
1968
1969 /**
1970 * hal_rx_get_mpdu_sequence_control_valid_be() - Get mpdu sequence
1971 * control valid
1972 * @buf: Network buffer
1973 *
1974 * Return: value of sequence control valid field
1975 */
hal_rx_get_mpdu_sequence_control_valid_be(uint8_t * buf)1976 static inline uint8_t hal_rx_get_mpdu_sequence_control_valid_be(uint8_t *buf)
1977 {
1978 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1979
1980 return HAL_RX_TLV_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_pkt_tlvs);
1981 }
1982
1983 /**
1984 * hal_rx_tid_get_be() - get tid based on qos control valid.
1985 * @hal_soc_hdl: hal_soc handle
1986 * @buf: pointer to rx pkt TLV.
1987 *
1988 * Return: tid
1989 */
hal_rx_tid_get_be(hal_soc_handle_t hal_soc_hdl,uint8_t * buf)1990 static inline uint32_t hal_rx_tid_get_be(hal_soc_handle_t hal_soc_hdl,
1991 uint8_t *buf)
1992 {
1993 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
1994 uint8_t qos_control_valid =
1995 HAL_RX_TLV_MPDU_QOS_CONTROL_VALID_GET(rx_pkt_tlvs);
1996
1997 if (qos_control_valid)
1998 return hal_rx_tlv_tid_get_be(buf);
1999
2000 return HAL_RX_NON_QOS_TID;
2001 }
2002
2003 static inline
hal_rx_get_fc_valid_be(uint8_t * buf)2004 uint8_t hal_rx_get_fc_valid_be(uint8_t *buf)
2005 {
2006 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2007
2008 return HAL_RX_TLV_GET_FC_VALID(rx_pkt_tlvs);
2009 }
2010
hal_rx_get_to_ds_flag_be(uint8_t * buf)2011 static inline uint8_t hal_rx_get_to_ds_flag_be(uint8_t *buf)
2012 {
2013 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2014
2015 return HAL_RX_TLV_GET_TO_DS_FLAG(rx_pkt_tlvs);
2016 }
2017
hal_rx_get_mac_addr2_valid_be(uint8_t * buf)2018 static inline uint8_t hal_rx_get_mac_addr2_valid_be(uint8_t *buf)
2019 {
2020 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2021
2022 return HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(rx_pkt_tlvs);
2023 }
2024
2025 /**
2026 * hal_rx_msdu_flow_idx_get_be() - API to get flow index from
2027 * rx_msdu_end TLV
2028 * @buf: pointer to the start of RX PKT TLV headers
2029 *
2030 * Return: flow index value from MSDU END TLV
2031 */
hal_rx_msdu_flow_idx_get_be(uint8_t * buf)2032 static inline uint32_t hal_rx_msdu_flow_idx_get_be(uint8_t *buf)
2033 {
2034 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2035
2036 return HAL_RX_TLV_FLOW_IDX_GET(pkt_tlvs);
2037 }
2038
2039 /**
2040 * hal_rx_msdu_get_reo_destination_indication_be() - API to get
2041 * reo_destination_indication
2042 * from rx_msdu_end
2043 * TLV
2044 * @buf: pointer to the start of RX PKT TLV headers
2045 * @reo_destination_indication: pointer to return value of
2046 * reo_destination_indication
2047 *
2048 * Return: none
2049 */
2050 static inline void
hal_rx_msdu_get_reo_destination_indication_be(uint8_t * buf,uint32_t * reo_destination_indication)2051 hal_rx_msdu_get_reo_destination_indication_be(uint8_t *buf,
2052 uint32_t *reo_destination_indication)
2053 {
2054 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2055
2056 *reo_destination_indication = HAL_RX_TLV_REO_DEST_IND_GET(pkt_tlvs);
2057 }
2058
2059 /**
2060 * hal_rx_msdu_flow_idx_invalid_be() - API to get flow index invalid
2061 * from rx_msdu_end TLV
2062 * @buf: pointer to the start of RX PKT TLV headers
2063 *
2064 * Return: flow index invalid value from MSDU END TLV
2065 */
hal_rx_msdu_flow_idx_invalid_be(uint8_t * buf)2066 static inline bool hal_rx_msdu_flow_idx_invalid_be(uint8_t *buf)
2067 {
2068 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2069
2070 return HAL_RX_TLV_FLOW_IDX_INVALID_GET(pkt_tlvs);
2071 }
2072
2073 /**
2074 * hal_rx_msdu_flow_idx_timeout_be() - API to get flow index timeout
2075 * from rx_msdu_end TLV
2076 * @buf: pointer to the start of RX PKT TLV headers
2077 *
2078 * Return: flow index timeout value from MSDU END TLV
2079 */
hal_rx_msdu_flow_idx_timeout_be(uint8_t * buf)2080 static inline bool hal_rx_msdu_flow_idx_timeout_be(uint8_t *buf)
2081 {
2082 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2083
2084 return HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(pkt_tlvs);
2085 }
2086
2087 /**
2088 * hal_rx_msdu_fse_metadata_get_be() - API to get FSE metadata from
2089 * rx_msdu_end TLV
2090 * @buf: pointer to the start of RX PKT TLV headers
2091 *
2092 * Return: fse metadata value from MSDU END TLV
2093 */
hal_rx_msdu_fse_metadata_get_be(uint8_t * buf)2094 static inline uint32_t hal_rx_msdu_fse_metadata_get_be(uint8_t *buf)
2095 {
2096 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2097
2098 return HAL_RX_TLV_FSE_METADATA_GET(pkt_tlvs);
2099 }
2100
2101 /**
2102 * hal_rx_msdu_cce_metadata_get_be() - API to get CCE metadata from
2103 * rx_msdu_end TLV
2104 * @buf: pointer to the start of RX PKT TLV headers
2105 *
2106 * Return: cce_metadata
2107 */
2108 static inline uint16_t
hal_rx_msdu_cce_metadata_get_be(uint8_t * buf)2109 hal_rx_msdu_cce_metadata_get_be(uint8_t *buf)
2110 {
2111 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2112
2113 return HAL_RX_TLV_CCE_METADATA_GET(pkt_tlvs);
2114 }
2115
2116 /**
2117 * hal_rx_msdu_get_flow_params_be() - API to get flow index, flow
2118 * index invalid and flow index
2119 * timeout from rx_msdu_end TLV
2120 * @buf: pointer to the start of RX PKT TLV headers
2121 * @flow_invalid: pointer to return value of flow_idx_valid
2122 * @flow_timeout: pointer to return value of flow_idx_timeout
2123 * @flow_index: pointer to return value of flow_idx
2124 *
2125 * Return: none
2126 */
2127 static inline void
hal_rx_msdu_get_flow_params_be(uint8_t * buf,bool * flow_invalid,bool * flow_timeout,uint32_t * flow_index)2128 hal_rx_msdu_get_flow_params_be(uint8_t *buf,
2129 bool *flow_invalid,
2130 bool *flow_timeout,
2131 uint32_t *flow_index)
2132 {
2133 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2134
2135 *flow_invalid = HAL_RX_TLV_FLOW_IDX_INVALID_GET(pkt_tlvs);
2136 *flow_timeout = HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(pkt_tlvs);
2137 *flow_index = HAL_RX_TLV_FLOW_IDX_GET(pkt_tlvs);
2138 }
2139
2140 /**
2141 * hal_rx_tlv_get_tcp_chksum_be() - API to get tcp checksum
2142 * @buf: rx_tlv_hdr
2143 *
2144 * Return: tcp checksum
2145 */
2146 static inline uint16_t
hal_rx_tlv_get_tcp_chksum_be(uint8_t * buf)2147 hal_rx_tlv_get_tcp_chksum_be(uint8_t *buf)
2148 {
2149 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2150
2151 return HAL_RX_TLV_GET_TCP_CHKSUM(rx_pkt_tlvs);
2152 }
2153
2154 /**
2155 * hal_rx_get_rx_sequence_be() - Function to retrieve rx sequence number
2156 * @buf: Network buffer
2157 *
2158 * Return: rx sequence number
2159 */
2160 static inline
hal_rx_get_rx_sequence_be(uint8_t * buf)2161 uint16_t hal_rx_get_rx_sequence_be(uint8_t *buf)
2162 {
2163 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2164
2165 return HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs);
2166 }
2167
2168 #ifdef RECEIVE_OFFLOAD
2169 #ifdef QCA_WIFI_KIWI_V2
2170 static inline
hal_rx_get_fisa_cumulative_l4_checksum_be(uint8_t * buf)2171 uint16_t hal_rx_get_fisa_cumulative_l4_checksum_be(uint8_t *buf)
2172 {
2173 /*
2174 * cumulative l4 checksum is not supported in V2 and
2175 * cumulative_l4_checksum field is not present
2176 */
2177 return 0;
2178 }
2179 #else
2180 /**
2181 * hal_rx_get_fisa_cumulative_l4_checksum_be() - Retrieve cumulative
2182 * checksum
2183 * @buf: buffer pointer
2184 *
2185 * Return: cumulative checksum
2186 */
2187 static inline
hal_rx_get_fisa_cumulative_l4_checksum_be(uint8_t * buf)2188 uint16_t hal_rx_get_fisa_cumulative_l4_checksum_be(uint8_t *buf)
2189 {
2190 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2191
2192 return HAL_RX_TLV_GET_FISA_CUMULATIVE_L4_CHECKSUM(rx_pkt_tlvs);
2193 }
2194 #endif
2195
2196 /**
2197 * hal_rx_get_fisa_cumulative_ip_length_be() - Retrieve cumulative
2198 * ip length
2199 * @buf: buffer pointer
2200 *
2201 * Return: cumulative length
2202 */
2203 static inline
hal_rx_get_fisa_cumulative_ip_length_be(uint8_t * buf)2204 uint16_t hal_rx_get_fisa_cumulative_ip_length_be(uint8_t *buf)
2205 {
2206 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2207
2208 return HAL_RX_TLV_GET_FISA_CUMULATIVE_IP_LENGTH(rx_pkt_tlvs);
2209 }
2210
2211 /**
2212 * hal_rx_get_udp_proto_be() - Retrieve udp proto value
2213 * @buf: buffer
2214 *
2215 * Return: udp proto bit
2216 */
2217 static inline
hal_rx_get_udp_proto_be(uint8_t * buf)2218 bool hal_rx_get_udp_proto_be(uint8_t *buf)
2219 {
2220 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2221
2222 return HAL_RX_TLV_GET_UDP_PROTO(rx_pkt_tlvs);
2223 }
2224 #endif
2225
2226 /**
2227 * hal_rx_get_flow_agg_continuation_be() - retrieve flow agg
2228 * continuation
2229 * @buf: buffer
2230 *
2231 * Return: flow agg
2232 */
2233 static inline
hal_rx_get_flow_agg_continuation_be(uint8_t * buf)2234 bool hal_rx_get_flow_agg_continuation_be(uint8_t *buf)
2235 {
2236 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2237
2238 return HAL_RX_TLV_GET_FLOW_AGGR_CONT(rx_pkt_tlvs);
2239 }
2240
2241 /**
2242 * hal_rx_get_flow_agg_count_be()- Retrieve flow agg count
2243 * @buf: buffer
2244 *
2245 * Return: flow agg count
2246 */
2247 static inline
hal_rx_get_flow_agg_count_be(uint8_t * buf)2248 uint8_t hal_rx_get_flow_agg_count_be(uint8_t *buf)
2249 {
2250 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2251
2252 return HAL_RX_TLV_GET_FLOW_AGGR_COUNT(rx_pkt_tlvs);
2253 }
2254
2255 /**
2256 * hal_rx_get_fisa_timeout_be() - Retrieve fisa timeout
2257 * @buf: buffer
2258 *
2259 * Return: fisa timeout
2260 */
2261 static inline
hal_rx_get_fisa_timeout_be(uint8_t * buf)2262 bool hal_rx_get_fisa_timeout_be(uint8_t *buf)
2263 {
2264 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2265
2266 return HAL_RX_TLV_GET_FISA_TIMEOUT(rx_pkt_tlvs);
2267 }
2268
2269 /**
2270 * hal_rx_mpdu_start_tlv_tag_valid_be () - API to check if RX_MPDU_START
2271 * tlv tag is valid
2272 *
2273 *@rx_tlv_hdr: start address of rx_pkt_tlvs
2274 *
2275 * Return: true if RX_MPDU_START is valid, else false.
2276 */
hal_rx_mpdu_start_tlv_tag_valid_be(void * rx_tlv_hdr)2277 static inline uint8_t hal_rx_mpdu_start_tlv_tag_valid_be(void *rx_tlv_hdr)
2278 {
2279 struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)rx_tlv_hdr;
2280 uint32_t tlv_tag;
2281
2282 tlv_tag = HAL_RX_GET_USER_TLV32_TYPE(&rx_desc->mpdu_start_tlv);
2283
2284 return tlv_tag == WIFIRX_MPDU_START_E ? true : false;
2285 }
2286
2287 /**
2288 * hal_rx_msdu_end_offset_get_generic() - API to get the
2289 * msdu_end structure offset rx_pkt_tlv structure
2290 *
2291 * NOTE: API returns offset of msdu_end TLV from structure
2292 * rx_pkt_tlvs
2293 */
hal_rx_msdu_end_offset_get_generic(void)2294 static inline uint32_t hal_rx_msdu_end_offset_get_generic(void)
2295 {
2296 return RX_PKT_TLV_OFFSET(msdu_end_tlv);
2297 }
2298
2299 /**
2300 * hal_rx_mpdu_start_offset_get_generic() - API to get the
2301 * mpdu_start structure offset rx_pkt_tlv structure
2302 *
2303 * NOTE: API returns offset of attn TLV from structure
2304 * rx_pkt_tlvs
2305 */
hal_rx_mpdu_start_offset_get_generic(void)2306 static inline uint32_t hal_rx_mpdu_start_offset_get_generic(void)
2307 {
2308 return RX_PKT_TLV_OFFSET(mpdu_start_tlv);
2309 }
2310
2311 #ifndef NO_RX_PKT_HDR_TLV
hal_rx_pkt_tlv_offset_get_generic(void)2312 static inline uint32_t hal_rx_pkt_tlv_offset_get_generic(void)
2313 {
2314 return RX_PKT_TLV_OFFSET(pkt_hdr_tlv);
2315 }
2316 #endif
2317
2318 #ifdef CONFIG_WORD_BASED_TLV
2319 #define MPDU_START_WMASK 0x074C
2320 #define MSDU_END_WMASK 0x13FC1
2321
2322 /**
2323 * hal_rx_mpdu_start_wmask_get_be() - API to get the mpdu_start_tlv word mask
2324 *
2325 * return: Word mask for MPDU start tlv
2326 */
hal_rx_mpdu_start_wmask_get_be(void)2327 static inline uint32_t hal_rx_mpdu_start_wmask_get_be(void)
2328 {
2329 return MPDU_START_WMASK;
2330 }
2331
2332 /**
2333 * hal_rx_msdu_end_wmask_get_be() - API to get the msdu_end_tlv word mask
2334 *
2335 * return: Word mask for MSDU end tlv
2336 */
hal_rx_msdu_end_wmask_get_be(void)2337 static inline uint32_t hal_rx_msdu_end_wmask_get_be(void)
2338 {
2339 return MSDU_END_WMASK;
2340 }
2341 #endif
2342
2343 #ifdef RECEIVE_OFFLOAD
2344 static inline int
hal_rx_tlv_get_offload_info_be(uint8_t * rx_tlv,struct hal_offload_info * offload_info)2345 hal_rx_tlv_get_offload_info_be(uint8_t *rx_tlv,
2346 struct hal_offload_info *offload_info)
2347 {
2348 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)rx_tlv;
2349
2350 offload_info->lro_eligible = HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_pkt_tlvs);
2351 offload_info->flow_id = HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_pkt_tlvs);
2352 offload_info->ipv6_proto = HAL_RX_TLV_GET_IPV6(rx_pkt_tlvs);
2353 offload_info->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(rx_pkt_tlvs);
2354
2355 if (offload_info->tcp_proto) {
2356 offload_info->tcp_pure_ack =
2357 HAL_RX_TLV_GET_TCP_PURE_ACK(rx_pkt_tlvs);
2358 offload_info->tcp_offset =
2359 HAL_RX_TLV_GET_TCP_OFFSET(rx_pkt_tlvs);
2360 offload_info->tcp_win = HAL_RX_TLV_GET_TCP_WIN(rx_pkt_tlvs);
2361 offload_info->tcp_seq_num = HAL_RX_TLV_GET_TCP_SEQ(rx_pkt_tlvs);
2362 offload_info->tcp_ack_num = HAL_RX_TLV_GET_TCP_ACK(rx_pkt_tlvs);
2363 }
2364 return 0;
2365 }
2366
hal_rx_get_proto_params_be(uint8_t * buf,void * proto_params)2367 static inline int hal_rx_get_proto_params_be(uint8_t *buf, void *proto_params)
2368 {
2369 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2370 struct hal_proto_params *param =
2371 (struct hal_proto_params *)proto_params;
2372
2373 param->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(rx_pkt_tlvs);
2374 param->udp_proto = HAL_RX_TLV_GET_UDP_PROTO(rx_pkt_tlvs);
2375 param->ipv6_proto = HAL_RX_TLV_GET_IPV6(rx_pkt_tlvs);
2376
2377 return 0;
2378 }
2379
hal_rx_get_l3_l4_offsets_be(uint8_t * buf,uint32_t * l3_hdr_offset,uint32_t * l4_hdr_offset)2380 static inline int hal_rx_get_l3_l4_offsets_be(uint8_t *buf,
2381 uint32_t *l3_hdr_offset,
2382 uint32_t *l4_hdr_offset)
2383 {
2384 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2385
2386 *l3_hdr_offset = HAL_RX_TLV_GET_IP_OFFSET(rx_pkt_tlvs);
2387 *l4_hdr_offset = HAL_RX_TLV_GET_TCP_OFFSET(rx_pkt_tlvs);
2388
2389 return 0;
2390 }
2391 #endif
2392
2393 /**
2394 * hal_rx_msdu_start_msdu_len_get_be() - API to get the MSDU length from
2395 * rx_msdu_start TLV
2396 * @buf: pointer to the start of RX PKT TLV headers
2397 *
2398 * Return: msdu length
2399 */
hal_rx_msdu_start_msdu_len_get_be(uint8_t * buf)2400 static inline uint32_t hal_rx_msdu_start_msdu_len_get_be(uint8_t *buf)
2401 {
2402 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2403 uint32_t msdu_len;
2404
2405 msdu_len = HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs);
2406
2407 return msdu_len;
2408 }
2409
2410 /**
2411 * hal_rx_get_frame_ctrl_field_be() - Function to retrieve frame control field
2412 * @buf: Network buffer
2413 *
2414 * Return: frame control field
2415 */
hal_rx_get_frame_ctrl_field_be(uint8_t * buf)2416 static inline uint16_t hal_rx_get_frame_ctrl_field_be(uint8_t *buf)
2417 {
2418 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2419 uint16_t frame_ctrl = 0;
2420
2421 frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(rx_pkt_tlvs);
2422
2423 return frame_ctrl;
2424 }
2425
2426 /**
2427 * hal_rx_tlv_get_is_decrypted_be() - API to get the decrypt status of
2428 * the packet from msdu_end
2429 * @buf: pointer to the start of RX PKT TLV header
2430 *
2431 * Return: uint32_t(decryt status)
2432 */
hal_rx_tlv_get_is_decrypted_be(uint8_t * buf)2433 static inline uint32_t hal_rx_tlv_get_is_decrypted_be(uint8_t *buf)
2434 {
2435 struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2436 uint32_t is_decrypt = 0;
2437 uint32_t decrypt_status;
2438
2439 decrypt_status = HAL_RX_TLV_DECRYPT_STATUS_GET(rx_pkt_tlvs);
2440
2441 if (!decrypt_status)
2442 is_decrypt = 1;
2443
2444 return is_decrypt;
2445 }
2446
2447 #ifdef NO_RX_PKT_HDR_TLV
2448 /**
2449 * hal_rx_pkt_hdr_get_be() - API to get 80211 header
2450 * @buf: start of rx_pkt_tlv
2451 *
2452 * If NO_RX_PKT_HDR_TLV is enabled, then this API assume caller gives a raw
2453 * data, get 80211 header from packet data directly.
2454 * If NO_RX_PKT_HDR_TLV is disabled, then get it from rx_pkt_hdr_tlv in
2455 * rx_pkt_tlvs.
2456 *
2457 * Return: pointer to start of 80211 header
2458 */
hal_rx_pkt_hdr_get_be(uint8_t * buf)2459 static inline uint8_t *hal_rx_pkt_hdr_get_be(uint8_t *buf)
2460 {
2461 return buf + RX_PKT_TLVS_LEN;
2462 }
2463 #else
hal_rx_pkt_hdr_get_be(uint8_t * buf)2464 static inline uint8_t *hal_rx_pkt_hdr_get_be(uint8_t *buf)
2465 {
2466 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2467
2468 return pkt_tlvs->pkt_hdr_tlv.rx_pkt_hdr;
2469 }
2470 #endif
2471
2472 /**
2473 * hal_rx_tlv_csum_err_get_be() - Get IP and tcp-udp checksum fail flag
2474 * @rx_tlv_hdr: start address of rx_tlv_hdr
2475 * @ip_csum_err: buffer to return ip_csum_fail flag
2476 * @tcp_udp_csum_err: placeholder to return tcp-udp checksum fail flag
2477 *
2478 * Return: None
2479 */
2480 static inline void
hal_rx_tlv_csum_err_get_be(uint8_t * rx_tlv_hdr,uint32_t * ip_csum_err,uint32_t * tcp_udp_csum_err)2481 hal_rx_tlv_csum_err_get_be(uint8_t *rx_tlv_hdr, uint32_t *ip_csum_err,
2482 uint32_t *tcp_udp_csum_err)
2483 {
2484 struct rx_pkt_tlvs *rx_pkt_tlvs =
2485 (struct rx_pkt_tlvs *)rx_tlv_hdr;
2486
2487 *ip_csum_err = HAL_RX_TLV_IP_CSUM_FAIL_GET(rx_pkt_tlvs);
2488 *tcp_udp_csum_err = HAL_RX_TLV_TCP_UDP_CSUM_FAIL_GET(rx_pkt_tlvs);
2489 }
2490
2491 static inline
hal_rx_tlv_mpdu_len_err_get_be(void * hw_desc_addr)2492 uint32_t hal_rx_tlv_mpdu_len_err_get_be(void *hw_desc_addr)
2493 {
2494 struct rx_pkt_tlvs *rx_pkt_tlvs =
2495 (struct rx_pkt_tlvs *)hw_desc_addr;
2496
2497 return HAL_RX_TLV_MPDU_LEN_ERR_GET(rx_pkt_tlvs);
2498 }
2499
2500 static inline
hal_rx_tlv_mpdu_fcs_err_get_be(void * hw_desc_addr)2501 uint32_t hal_rx_tlv_mpdu_fcs_err_get_be(void *hw_desc_addr)
2502 {
2503 struct rx_pkt_tlvs *rx_pkt_tlvs =
2504 (struct rx_pkt_tlvs *)hw_desc_addr;
2505
2506 return HAL_RX_TLV_MPDU_FCS_ERR_GET(rx_pkt_tlvs);
2507 }
2508
2509 /**
2510 * hal_rx_get_rx_more_frag_bit() - Function to retrieve more fragment bit
2511 * @buf: Network buffer
2512 *
2513 * Return: rx more fragment bit
2514 */
2515 static inline
hal_rx_get_rx_more_frag_bit(uint8_t * buf)2516 uint8_t hal_rx_get_rx_more_frag_bit(uint8_t *buf)
2517 {
2518 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2519 uint16_t frame_ctrl = 0;
2520
2521 frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(pkt_tlvs) >>
2522 DOT11_FC1_MORE_FRAG_OFFSET;
2523
2524 /* more fragment bit if at offset bit 4 */
2525 return frame_ctrl;
2526 }
2527
2528 /**
2529 * hal_rx_msdu_is_wlan_mcast_generic_be() - Check if the buffer is for
2530 * multicast address
2531 * @nbuf: Network buffer
2532 *
2533 * Return: flag to indicate whether the nbuf has MC/BC address
2534 */
hal_rx_msdu_is_wlan_mcast_generic_be(qdf_nbuf_t nbuf)2535 static inline uint32_t hal_rx_msdu_is_wlan_mcast_generic_be(qdf_nbuf_t nbuf)
2536 {
2537 uint8_t *buf = qdf_nbuf_data(nbuf);
2538
2539 return HAL_RX_TLV_IS_MCAST_GET(buf);;
2540 }
2541
2542 /**
2543 * hal_rx_msdu_start_msdu_len_set_be() - API to set the MSDU length
2544 * from rx_msdu_start TLV
2545 * @buf: pointer to the start of RX PKT TLV headers
2546 * @len: msdu length
2547 *
2548 * Return: none
2549 */
2550 static inline void
hal_rx_msdu_start_msdu_len_set_be(uint8_t * buf,uint32_t len)2551 hal_rx_msdu_start_msdu_len_set_be(uint8_t *buf, uint32_t len)
2552 {
2553 HAL_RX_TLV_MSDU_LEN_GET(buf) = len;
2554 }
2555
2556 /**
2557 * hal_rx_mpdu_start_mpdu_qos_control_valid_get_be() -
2558 * Retrieve qos control valid bit from the tlv.
2559 * @buf: pointer to rx pkt TLV.
2560 *
2561 * Return: qos control value.
2562 */
2563 static inline uint32_t
hal_rx_mpdu_start_mpdu_qos_control_valid_get_be(uint8_t * buf)2564 hal_rx_mpdu_start_mpdu_qos_control_valid_get_be(uint8_t *buf)
2565 {
2566 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2567
2568 return HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET(pkt_tlvs);
2569 }
2570
2571 /**
2572 * hal_rx_msdu_end_sa_sw_peer_id_get_be() - API to get the
2573 * sa_sw_peer_id from rx_msdu_end TLV
2574 * @buf: pointer to the start of RX PKT TLV headers
2575 *
2576 * Return: sa_sw_peer_id index
2577 */
2578 static inline uint32_t
hal_rx_msdu_end_sa_sw_peer_id_get_be(uint8_t * buf)2579 hal_rx_msdu_end_sa_sw_peer_id_get_be(uint8_t *buf)
2580 {
2581 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
2582
2583 hal_rx_msdu_end_t *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
2584
2585 return HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(msdu_end);
2586 }
2587
2588 /**
2589 * hal_rx_parse_eht_sig_hdr_be()
2590 * - process eht sig header
2591 * @hal_soc: HAL soc handle
2592 * @tlv: pointer to EHT SIG TLV buffer
2593 * @ppdu_info_handle: pointer to ppdu_info
2594 *
2595 * Return: None
2596 */
2597 static inline
hal_rx_parse_eht_sig_hdr_be(struct hal_soc * hal_soc,uint8_t * tlv,void * ppdu_info_handle)2598 void hal_rx_parse_eht_sig_hdr_be(struct hal_soc *hal_soc, uint8_t *tlv,
2599 void *ppdu_info_handle)
2600 {
2601 }
2602 #endif /* _HAL_BE_RX_TLV_H_ */
2603