1 /*
2  * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
3  * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for
6  * any purpose with or without fee is hereby granted, provided that the
7  * above copyright notice and this permission notice appear in all
8  * copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17  * PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 #ifndef _HAL_LI_RX_H_
21 #define _HAL_LI_RX_H_
22 
23 #include <hal_rx.h>
24 
25 /*
26  * macro to set the cookie into the rxdma ring entry
27  */
28 #define HAL_RXDMA_COOKIE_SET(buff_addr_info, cookie) \
29 		((*(((unsigned int *)buff_addr_info) + \
30 		(BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET >> 2))) &= \
31 		~BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK); \
32 		((*(((unsigned int *)buff_addr_info) + \
33 		(BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET >> 2))) |= \
34 		((cookie) << BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_LSB) & \
35 		BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK)
36 
37 /*
38  * macro to set the manager into the rxdma ring entry
39  */
40 #define HAL_RXDMA_MANAGER_SET(buff_addr_info, manager) \
41 		((*(((unsigned int *)buff_addr_info) + \
42 		(BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET >> 2))) &= \
43 		~BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK); \
44 		((*(((unsigned int *)buff_addr_info) + \
45 		(BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET >> 2))) |= \
46 		((manager) << BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_LSB) & \
47 		BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK)
48 
49 #define HAL_RX_ERROR_STATUS_GET(reo_desc)			\
50 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(reo_desc,		\
51 		REO_DESTINATION_RING_7_REO_PUSH_REASON_OFFSET)),\
52 		REO_DESTINATION_RING_7_REO_PUSH_REASON_MASK,	\
53 		REO_DESTINATION_RING_7_REO_PUSH_REASON_LSB))
54 
55 #define HAL_RX_BUF_COOKIE_GET(buff_addr_info)			\
56 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(buff_addr_info,		\
57 		BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET)),	\
58 		BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK,	\
59 		BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_LSB))
60 
61 #define HAL_RX_BUF_RBM_GET(buff_addr_info)			\
62 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(buff_addr_info,		\
63 		BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET)),\
64 		BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK,	\
65 		BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_LSB))
66 
67 /* TODO: Convert the following structure fields accesseses to offsets */
68 
69 #define HAL_RX_REO_BUF_COOKIE_GET(reo_desc)	\
70 	(HAL_RX_BUF_COOKIE_GET(&		\
71 	(((struct reo_destination_ring *)	\
72 		reo_desc)->buf_or_link_desc_addr_info)))
73 
74 #define HAL_RX_MPDU_SEQUENCE_NUMBER_GET(mpdu_info_ptr)	\
75 	((mpdu_info_ptr					\
76 	[RX_MPDU_DESC_INFO_0_MPDU_SEQUENCE_NUMBER_OFFSET >> 2] & \
77 	RX_MPDU_DESC_INFO_0_MPDU_SEQUENCE_NUMBER_MASK) >> \
78 	RX_MPDU_DESC_INFO_0_MPDU_SEQUENCE_NUMBER_LSB)
79 
80 #define HAL_RX_MPDU_DESC_PEER_META_DATA_GET(mpdu_info_ptr)	\
81 	((mpdu_info_ptr					\
82 	[RX_MPDU_DESC_INFO_1_PEER_META_DATA_OFFSET >> 2] & \
83 	RX_MPDU_DESC_INFO_1_PEER_META_DATA_MASK) >> \
84 	RX_MPDU_DESC_INFO_1_PEER_META_DATA_LSB)
85 
86 #define HAL_RX_MPDU_MSDU_COUNT_GET(mpdu_info_ptr) \
87 	((mpdu_info_ptr[RX_MPDU_DESC_INFO_0_MSDU_COUNT_OFFSET >> 2] & \
88 	RX_MPDU_DESC_INFO_0_MSDU_COUNT_MASK) >> \
89 	RX_MPDU_DESC_INFO_0_MSDU_COUNT_LSB)
90 
91 #define HAL_RX_MPDU_FRAGMENT_FLAG_GET(mpdu_info_ptr) \
92 	(mpdu_info_ptr[RX_MPDU_DESC_INFO_0_FRAGMENT_FLAG_OFFSET >> 2] & \
93 	RX_MPDU_DESC_INFO_0_FRAGMENT_FLAG_MASK)
94 
95 #define HAL_RX_MPDU_RETRY_BIT_GET(mpdu_info_ptr) \
96 	(mpdu_info_ptr[RX_MPDU_DESC_INFO_0_MPDU_RETRY_BIT_OFFSET >> 2] & \
97 	RX_MPDU_DESC_INFO_0_MPDU_RETRY_BIT_MASK)
98 
99 #define HAL_RX_MPDU_AMPDU_FLAG_GET(mpdu_info_ptr) \
100 	(mpdu_info_ptr[RX_MPDU_DESC_INFO_0_AMPDU_FLAG_OFFSET >> 2] & \
101 	RX_MPDU_DESC_INFO_0_AMPDU_FLAG_MASK)
102 
103 #define HAL_RX_MPDU_RAW_MPDU_GET(mpdu_info_ptr) \
104 	(mpdu_info_ptr[RX_MPDU_DESC_INFO_0_RAW_MPDU_OFFSET >> 2] & \
105 	RX_MPDU_DESC_INFO_0_RAW_MPDU_MASK)
106 
107 #define HAL_RX_MPDU_FLAGS_GET(mpdu_info_ptr) \
108 	(HAL_RX_MPDU_FRAGMENT_FLAG_GET(mpdu_info_ptr) | \
109 	HAL_RX_MPDU_RETRY_BIT_GET(mpdu_info_ptr) |	\
110 	HAL_RX_MPDU_AMPDU_FLAG_GET(mpdu_info_ptr) |	\
111 	HAL_RX_MPDU_RAW_MPDU_GET(mpdu_info_ptr))
112 
113 #define HAL_RX_MPDU_BAR_FRAME_GET(mpdu_info_ptr) \
114 	((mpdu_info_ptr[RX_MPDU_DESC_INFO_0_BAR_FRAME_OFFSET >> 2] & \
115 	RX_MPDU_DESC_INFO_0_BAR_FRAME_MASK) >> \
116 	RX_MPDU_DESC_INFO_0_BAR_FRAME_LSB)
117 
118 /*
119  * NOTE: None of the following _GET macros need a right
120  * shift by the corresponding _LSB. This is because, they are
121  * finally taken and "OR'ed" into a single word again.
122  */
123 #define HAL_RX_MSDU_CONTINUATION_FLAG_SET(msdu_info_ptr, val)		\
124 	((*(((uint32_t *)msdu_info_ptr) +				\
125 		(RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_OFFSET >> 2))) |= \
126 		((val) << RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_LSB) & \
127 		RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_MASK)
128 
129 #define HAL_RX_MSDU_CONTINUATION_FLAG_GET(msdu_info_ptr)	\
130 	((*_OFFSET_TO_WORD_PTR(msdu_info_ptr,			\
131 		RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_OFFSET)) & \
132 		RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_MASK)
133 
134 #define HAL_RX_MSDU_REO_DST_IND_GET(msdu_info_ptr)	\
135 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(msdu_info_ptr,	\
136 	RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_OFFSET)),	\
137 	RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_MASK,		\
138 	RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_LSB))
139 
140 #define HAL_RX_MSDU_SA_IS_VALID_FLAG_GET(msdu_info_ptr)		\
141 	((*_OFFSET_TO_WORD_PTR(msdu_info_ptr,			\
142 		RX_MSDU_DESC_INFO_0_SA_IS_VALID_OFFSET)) &	\
143 		RX_MSDU_DESC_INFO_0_SA_IS_VALID_MASK)
144 
145 #define HAL_RX_MSDU_SA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr)	\
146 	((*_OFFSET_TO_WORD_PTR(msdu_info_ptr,			\
147 		RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_OFFSET)) &	\
148 		RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_MASK)
149 
150 #define HAL_RX_MSDU_DA_IS_VALID_FLAG_GET(msdu_info_ptr)		\
151 	((*_OFFSET_TO_WORD_PTR(msdu_info_ptr,			\
152 		RX_MSDU_DESC_INFO_0_DA_IS_VALID_OFFSET)) &	\
153 		RX_MSDU_DESC_INFO_0_DA_IS_VALID_MASK)
154 
155 #define HAL_RX_MSDU_DA_IS_MCBC_FLAG_GET(msdu_info_ptr)		\
156 	((*_OFFSET_TO_WORD_PTR(msdu_info_ptr,			\
157 		RX_MSDU_DESC_INFO_0_DA_IS_MCBC_OFFSET)) &	\
158 		RX_MSDU_DESC_INFO_0_DA_IS_MCBC_MASK)
159 
160 #define HAL_RX_MSDU_DA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr) \
161 	((*_OFFSET_TO_WORD_PTR(msdu_info_ptr,			\
162 		RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_OFFSET)) &	\
163 		RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_MASK)
164 
165 #define HAL_RX_REO_MSDU_REO_DST_IND_GET(reo_desc)	\
166 	(HAL_RX_MSDU_REO_DST_IND_GET(&		\
167 	(((struct reo_destination_ring *)	\
168 	   reo_desc)->rx_msdu_desc_info_details)))
169 
170 #define HAL_RX_MPDU_ENCRYPT_TYPE_GET(_rx_mpdu_info)	\
171 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info,	\
172 	RX_MPDU_INFO_3_ENCRYPT_TYPE_OFFSET)),		\
173 	RX_MPDU_INFO_3_ENCRYPT_TYPE_MASK,		\
174 	RX_MPDU_INFO_3_ENCRYPT_TYPE_LSB))
175 
176 #define HAL_RX_MSDU_DESC_INFO_SET(_msdu_info_ptr, _field, _val)		\
177 	HAL_RX_FLD_SET(_msdu_info_ptr, RX_MSDU_DESC_INFO_0,		\
178 			_field, _val)
179 
180 #define HAL_RX_MPDU_DESC_INFO_SET(_mpdu_info_ptr, _field, _val)		\
181 	HAL_RX_FLD_SET(_mpdu_info_ptr, RX_MPDU_DESC_INFO_0,		\
182 			_field, _val)
183 
184 /*
185  * Structures & Macros to obtain fields from the TLV's in the Rx packet
186  * pre-header.
187  */
188 
189 /*
190  * Every Rx packet starts at an offset from the top of the buffer.
191  * If the host hasn't subscribed to any specific TLV, there is
192  * still space reserved for the following TLV's from the start of
193  * the buffer:
194  *	-- RX ATTENTION
195  *	-- RX MPDU START
196  *	-- RX MSDU START
197  *	-- RX MSDU END
198  *	-- RX MPDU END
199  *	-- RX PACKET HEADER (802.11)
200  * If the host subscribes to any of the TLV's above, that TLV
201  * if populated by the HW
202  */
203 
204 #define NUM_DWORDS_TAG		1
205 
206 /* By default the packet header TLV is 128 bytes */
207 #define  NUM_OF_BYTES_RX_802_11_HDR_TLV		128
208 #define  NUM_OF_DWORDS_RX_802_11_HDR_TLV	\
209 		(NUM_OF_BYTES_RX_802_11_HDR_TLV >> 2)
210 
211 #define RX_PKT_OFFSET_WORDS					\
212 	(							\
213 	 NUM_OF_DWORDS_RX_ATTENTION + NUM_DWORDS_TAG		\
214 	 NUM_OF_DWORDS_RX_MPDU_START + NUM_DWORDS_TAG		\
215 	 NUM_OF_DWORDS_RX_MSDU_START + NUM_DWORDS_TAG		\
216 	 NUM_OF_DWORDS_RX_MSDU_END + NUM_DWORDS_TAG		\
217 	 NUM_OF_DWORDS_RX_MPDU_END + NUM_DWORDS_TAG		\
218 	 NUM_OF_DWORDS_RX_802_11_HDR_TLV + NUM_DWORDS_TAG	\
219 	)
220 
221 #define RX_PKT_OFFSET_BYTES			\
222 	(RX_PKT_OFFSET_WORDS << 2)
223 
224 #define RX_PKT_HDR_TLV_LEN		120
225 
226 /*
227  * Each RX descriptor TLV is preceded by 1 DWORD "tag"
228  */
229 struct rx_attention_tlv {
230 	uint32_t tag;
231 	struct rx_attention rx_attn;
232 };
233 
234 struct rx_mpdu_start_tlv {
235 	uint32_t tag;
236 	struct rx_mpdu_start rx_mpdu_start;
237 };
238 
239 struct rx_msdu_start_tlv {
240 	uint32_t tag;
241 	struct rx_msdu_start rx_msdu_start;
242 };
243 
244 struct rx_msdu_end_tlv {
245 	uint32_t tag;
246 	struct rx_msdu_end rx_msdu_end;
247 };
248 
249 struct rx_mpdu_end_tlv {
250 	uint32_t tag;
251 	struct rx_mpdu_end rx_mpdu_end;
252 };
253 
254 struct rx_pkt_hdr_tlv {
255 	uint32_t tag;				/* 4 B */
256 	uint32_t phy_ppdu_id;                   /* 4 B */
257 	char rx_pkt_hdr[RX_PKT_HDR_TLV_LEN];	/* 120 B */
258 };
259 
260 /* rx_pkt_tlvs structure should be used to process Data buffers, monitor status
261  * buffers, monitor destination buffers and monitor descriptor buffers.
262  */
263 #ifdef RXDMA_OPTIMIZATION
264 /*
265  * The RX_PADDING_BYTES is required so that the TLV's don't
266  * spread across the 128 byte boundary
267  * RXDMA optimization requires:
268  * 1) MSDU_END & ATTENTION TLV's follow in that order
269  * 2) TLV's don't span across 128 byte lines
270  * 3) Rx Buffer is nicely aligned on the 128 byte boundary
271  */
272 #define RX_PADDING0_BYTES	4
273 #define RX_PADDING1_BYTES	16
274 #if defined(IPA_OFFLOAD) && defined(IPA_WDS_EASYMESH_FEATURE)
275 struct rx_pkt_tlvs {
276 	struct rx_msdu_end_tlv   msdu_end_tlv;	/*  72 bytes */
277 	struct rx_attention_tlv  attn_tlv;	/*  16 bytes */
278 	struct rx_mpdu_start_tlv mpdu_start_tlv;/*  96 bytes */
279 	struct rx_msdu_start_tlv msdu_start_tlv;/*  40 bytes */
280 	uint8_t rx_padding0[RX_PADDING0_BYTES];	/*   4 bytes */
281 	struct rx_mpdu_end_tlv   mpdu_end_tlv;	/*  12 bytes */
282 	uint8_t rx_padding1[RX_PADDING1_BYTES];	/*  16 bytes */
283 #ifndef NO_RX_PKT_HDR_TLV
284 	struct rx_pkt_hdr_tlv	 pkt_hdr_tlv;	/* 128 bytes */
285 #endif
286 };
287 #else
288 struct rx_pkt_tlvs {
289 	struct rx_msdu_end_tlv   msdu_end_tlv;	/*  72 bytes */
290 	struct rx_attention_tlv  attn_tlv;	/*  16 bytes */
291 	struct rx_msdu_start_tlv msdu_start_tlv;/*  40 bytes */
292 	uint8_t rx_padding0[RX_PADDING0_BYTES];	/*   4 bytes */
293 	struct rx_mpdu_start_tlv mpdu_start_tlv;/*  96 bytes */
294 	struct rx_mpdu_end_tlv   mpdu_end_tlv;	/*  12 bytes */
295 	uint8_t rx_padding1[RX_PADDING1_BYTES];	/*  16 bytes */
296 #ifndef NO_RX_PKT_HDR_TLV
297 	struct rx_pkt_hdr_tlv	 pkt_hdr_tlv;	/* 128 bytes */
298 #endif
299 };
300 #endif
301 #else /* RXDMA_OPTIMIZATION */
302 struct rx_pkt_tlvs {
303 	struct rx_attention_tlv  attn_tlv;
304 	struct rx_mpdu_start_tlv mpdu_start_tlv;
305 	struct rx_msdu_start_tlv msdu_start_tlv;
306 	struct rx_msdu_end_tlv   msdu_end_tlv;
307 	struct rx_mpdu_end_tlv   mpdu_end_tlv;
308 	struct rx_pkt_hdr_tlv	 pkt_hdr_tlv;
309 };
310 #endif /* RXDMA_OPTIMIZATION */
311 
312 /* rx_mon_pkt_tlvs structure should be used to process monitor data buffers */
313 #ifdef RXDMA_OPTIMIZATION
314 struct rx_mon_pkt_tlvs {
315 	struct rx_msdu_end_tlv   msdu_end_tlv;	/*  72 bytes */
316 	struct rx_attention_tlv  attn_tlv;	/*  16 bytes */
317 	struct rx_msdu_start_tlv msdu_start_tlv;/*  40 bytes */
318 	uint8_t rx_padding0[RX_PADDING0_BYTES];	/*   4 bytes */
319 	struct rx_mpdu_start_tlv mpdu_start_tlv;/*  96 bytes */
320 	struct rx_mpdu_end_tlv   mpdu_end_tlv;	/*  12 bytes */
321 	uint8_t rx_padding1[RX_PADDING1_BYTES];	/*  16 bytes */
322 	struct rx_pkt_hdr_tlv	 pkt_hdr_tlv;	/* 128 bytes */
323 };
324 #else /* RXDMA_OPTIMIZATION */
325 struct rx_mon_pkt_tlvs {
326 	struct rx_attention_tlv  attn_tlv;
327 	struct rx_mpdu_start_tlv mpdu_start_tlv;
328 	struct rx_msdu_start_tlv msdu_start_tlv;
329 	struct rx_msdu_end_tlv   msdu_end_tlv;
330 	struct rx_mpdu_end_tlv   mpdu_end_tlv;
331 	struct rx_pkt_hdr_tlv	 pkt_hdr_tlv;
332 };
333 #endif
334 
335 #define SIZE_OF_MONITOR_TLV sizeof(struct rx_mon_pkt_tlvs)
336 #define SIZE_OF_DATA_RX_TLV sizeof(struct rx_pkt_tlvs)
337 
338 #define RX_PKT_TLVS_LEN		SIZE_OF_DATA_RX_TLV
339 
340 #define RX_PKT_TLV_OFFSET(field) qdf_offsetof(struct rx_pkt_tlvs, field)
341 
342 #define HAL_RX_PKT_TLV_MPDU_START_OFFSET(hal_soc) \
343 					RX_PKT_TLV_OFFSET(mpdu_start_tlv)
344 #define HAL_RX_PKT_TLV_MPDU_END_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(mpdu_end_tlv)
345 #define HAL_RX_PKT_TLV_MSDU_START_OFFSET(hal_soc) \
346 					RX_PKT_TLV_OFFSET(msdu_start_tlv)
347 #define HAL_RX_PKT_TLV_MSDU_END_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(msdu_end_tlv)
348 #define HAL_RX_PKT_TLV_ATTN_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(attn_tlv)
349 #define HAL_RX_PKT_TLV_PKT_HDR_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(pkt_hdr_tlv)
350 
351 /**
352  * hal_rx_get_pkt_tlvs(): Function to retrieve pkt tlvs from nbuf
353  * @rx_buf_start: Pointer to data buffer field
354  *
355  * Return: pointer to rx_pkt_tlvs
356  */
357 static inline
hal_rx_get_pkt_tlvs(uint8_t * rx_buf_start)358 struct rx_pkt_tlvs *hal_rx_get_pkt_tlvs(uint8_t *rx_buf_start)
359 {
360 	return (struct rx_pkt_tlvs *)rx_buf_start;
361 }
362 
363 /**
364  * hal_rx_get_mpdu_info(): Function to retrieve mpdu info from pkt tlvs
365  * @pkt_tlvs: Pointer to pkt_tlvs
366  *
367  * Return: pointer to rx_mpdu_info structure
368  */
369 static inline
hal_rx_get_mpdu_info(struct rx_pkt_tlvs * pkt_tlvs)370 struct rx_mpdu_info *hal_rx_get_mpdu_info(struct rx_pkt_tlvs *pkt_tlvs)
371 {
372 	return &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start.rx_mpdu_info_details;
373 }
374 
375 /**
376  * hal_rx_mon_dest_get_buffer_info_from_tlv(): Retrieve mon dest frame info
377  * from the reserved bytes of rx_tlv_hdr.
378  * @buf: start of rx_tlv_hdr
379  * @buf_info: hal_rx_mon_dest_buf_info structure
380  *
381  * Return: void
382  */
hal_rx_mon_dest_get_buffer_info_from_tlv(uint8_t * buf,struct hal_rx_mon_dest_buf_info * buf_info)383 static inline void hal_rx_mon_dest_get_buffer_info_from_tlv(
384 				uint8_t *buf,
385 				struct hal_rx_mon_dest_buf_info *buf_info)
386 {
387 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
388 
389 	qdf_mem_copy(buf_info, pkt_tlvs->rx_padding0,
390 		     sizeof(struct hal_rx_mon_dest_buf_info));
391 }
392 
393 /*
394  * Get msdu_done bit from the RX_ATTENTION TLV
395  */
396 #define HAL_RX_ATTN_MSDU_DONE_GET(_rx_attn)		\
397 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn,	\
398 		RX_ATTENTION_2_MSDU_DONE_OFFSET)),	\
399 		RX_ATTENTION_2_MSDU_DONE_MASK,		\
400 		RX_ATTENTION_2_MSDU_DONE_LSB))
401 
402 #define HAL_RX_ATTN_FIRST_MPDU_GET(_rx_attn)		\
403 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn,	\
404 		RX_ATTENTION_1_FIRST_MPDU_OFFSET)),	\
405 		RX_ATTENTION_1_FIRST_MPDU_MASK,		\
406 		RX_ATTENTION_1_FIRST_MPDU_LSB))
407 
408 #define HAL_RX_ATTN_TCP_UDP_CKSUM_FAIL_GET(_rx_attn)		\
409 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn,		\
410 		RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_OFFSET)),	\
411 		RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_MASK,	\
412 		RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_LSB))
413 
414 /**
415  * hal_rx_attn_tcp_udp_cksum_fail_get() - get tcp_udp cksum fail bit
416  *                                        from rx attention
417  * @buf: pointer to rx_pkt_tlvs
418  *
419  * Return: tcp_udp_cksum_fail
420  */
421 static inline bool
hal_rx_attn_tcp_udp_cksum_fail_get(uint8_t * buf)422 hal_rx_attn_tcp_udp_cksum_fail_get(uint8_t *buf)
423 {
424 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
425 	struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
426 	uint8_t tcp_udp_cksum_fail;
427 
428 	tcp_udp_cksum_fail = HAL_RX_ATTN_TCP_UDP_CKSUM_FAIL_GET(rx_attn);
429 
430 	return !!tcp_udp_cksum_fail;
431 }
432 
433 #define HAL_RX_ATTN_IP_CKSUM_FAIL_GET(_rx_attn)		\
434 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn,	\
435 		RX_ATTENTION_1_IP_CHKSUM_FAIL_OFFSET)),	\
436 		RX_ATTENTION_1_IP_CHKSUM_FAIL_MASK,	\
437 		RX_ATTENTION_1_IP_CHKSUM_FAIL_LSB))
438 
439 /**
440  * hal_rx_attn_ip_cksum_fail_get() - get ip cksum fail bit
441  *                                   from rx attention
442  * @buf: pointer to rx_pkt_tlvs
443  *
444  * Return: ip_cksum_fail
445  */
446 static inline bool
hal_rx_attn_ip_cksum_fail_get(uint8_t * buf)447 hal_rx_attn_ip_cksum_fail_get(uint8_t *buf)
448 {
449 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
450 	struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
451 	uint8_t	 ip_cksum_fail;
452 
453 	ip_cksum_fail = HAL_RX_ATTN_IP_CKSUM_FAIL_GET(rx_attn);
454 
455 	return !!ip_cksum_fail;
456 }
457 
458 #define HAL_RX_ATTN_PHY_PPDU_ID_GET(_rx_attn)		\
459 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn,	\
460 		RX_ATTENTION_0_PHY_PPDU_ID_OFFSET)),	\
461 		RX_ATTENTION_0_PHY_PPDU_ID_MASK,	\
462 		RX_ATTENTION_0_PHY_PPDU_ID_LSB))
463 
464 #define HAL_RX_ATTN_CCE_MATCH_GET(_rx_attn)		\
465 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn,	\
466 		RX_ATTENTION_1_CCE_MATCH_OFFSET)),		\
467 		RX_ATTENTION_1_CCE_MATCH_MASK,			\
468 		RX_ATTENTION_1_CCE_MATCH_LSB))
469 
470 /**
471  * hal_rx_msdu_cce_match_get_li() - get CCE match bit
472  *                                  from rx attention
473  * @buf: pointer to rx_pkt_tlvs
474  *
475  * Return: CCE match value
476  */
477 static inline bool
hal_rx_msdu_cce_match_get_li(uint8_t * buf)478 hal_rx_msdu_cce_match_get_li(uint8_t *buf)
479 {
480 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
481 	struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
482 	uint8_t cce_match_val;
483 
484 	cce_match_val = HAL_RX_ATTN_CCE_MATCH_GET(rx_attn);
485 	return !!cce_match_val;
486 }
487 
488 /*
489  * Get peer_meta_data from RX_MPDU_INFO within RX_MPDU_START
490  */
491 #define HAL_RX_MPDU_PEER_META_DATA_GET(_rx_mpdu_info)	\
492 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info,	\
493 		RX_MPDU_INFO_8_PEER_META_DATA_OFFSET)),	\
494 		RX_MPDU_INFO_8_PEER_META_DATA_MASK,	\
495 		RX_MPDU_INFO_8_PEER_META_DATA_LSB))
496 
497 static inline uint32_t
hal_rx_mpdu_peer_meta_data_get_li(uint8_t * buf)498 hal_rx_mpdu_peer_meta_data_get_li(uint8_t *buf)
499 {
500 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
501 	struct rx_mpdu_start *mpdu_start =
502 				 &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
503 
504 	struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details;
505 	uint32_t peer_meta_data;
506 
507 	peer_meta_data = HAL_RX_MPDU_PEER_META_DATA_GET(mpdu_info);
508 
509 	return peer_meta_data;
510 }
511 
512 #define HAL_RX_MPDU_INFO_AMPDU_FLAG_GET(_rx_mpdu_info)	\
513 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info,	\
514 		RX_MPDU_INFO_12_AMPDU_FLAG_OFFSET)),	\
515 		RX_MPDU_INFO_12_AMPDU_FLAG_MASK,	\
516 		RX_MPDU_INFO_12_AMPDU_FLAG_LSB))
517 
518 #define HAL_RX_MPDU_PEER_META_DATA_SET(_rx_mpdu_info, peer_mdata)	\
519 		((*(((uint32_t *)_rx_mpdu_info) +			\
520 		(RX_MPDU_INFO_8_PEER_META_DATA_OFFSET >> 2))) =		\
521 		((peer_mdata) << RX_MPDU_INFO_8_PEER_META_DATA_LSB) &	\
522 		RX_MPDU_INFO_8_PEER_META_DATA_MASK)
523 
524 /**
525  * hal_rx_mpdu_peer_meta_data_set() - set peer meta data in RX mpdu
526  *                                    start tlv
527  * @buf: rx_tlv_hdr of the received packet
528  * @peer_mdata: peer meta data to be set.
529  *
530  * Return: void
531  */
532 static inline void
hal_rx_mpdu_peer_meta_data_set(uint8_t * buf,uint32_t peer_mdata)533 hal_rx_mpdu_peer_meta_data_set(uint8_t *buf, uint32_t peer_mdata)
534 {
535 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
536 	struct rx_mpdu_start *mpdu_start =
537 				 &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
538 
539 	struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details;
540 
541 	HAL_RX_MPDU_PEER_META_DATA_SET(mpdu_info, peer_mdata);
542 }
543 
544 /*
545  * LRO information needed from the TLVs
546  */
547 #define HAL_RX_TLV_GET_LRO_ELIGIBLE(buf) \
548 	(_HAL_MS( \
549 		 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
550 			 msdu_end_tlv.rx_msdu_end), \
551 			 RX_MSDU_END_9_LRO_ELIGIBLE_OFFSET)), \
552 		RX_MSDU_END_9_LRO_ELIGIBLE_MASK, \
553 		RX_MSDU_END_9_LRO_ELIGIBLE_LSB))
554 
555 #define HAL_RX_TLV_GET_TCP_ACK(buf) \
556 	(_HAL_MS( \
557 		 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
558 			 msdu_end_tlv.rx_msdu_end), \
559 			 RX_MSDU_END_8_TCP_ACK_NUMBER_OFFSET)), \
560 		RX_MSDU_END_8_TCP_ACK_NUMBER_MASK, \
561 		RX_MSDU_END_8_TCP_ACK_NUMBER_LSB))
562 
563 #define HAL_RX_TLV_GET_TCP_SEQ(buf) \
564 	(_HAL_MS( \
565 		 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
566 			 msdu_end_tlv.rx_msdu_end), \
567 			 RX_MSDU_END_7_TCP_SEQ_NUMBER_OFFSET)), \
568 		RX_MSDU_END_7_TCP_SEQ_NUMBER_MASK, \
569 		RX_MSDU_END_7_TCP_SEQ_NUMBER_LSB))
570 
571 #define HAL_RX_TLV_GET_TCP_WIN(buf) \
572 	(_HAL_MS( \
573 		 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
574 			 msdu_end_tlv.rx_msdu_end), \
575 			 RX_MSDU_END_9_WINDOW_SIZE_OFFSET)), \
576 		RX_MSDU_END_9_WINDOW_SIZE_MASK, \
577 		RX_MSDU_END_9_WINDOW_SIZE_LSB))
578 
579 #define HAL_RX_TLV_GET_TCP_PURE_ACK(buf) \
580 	(_HAL_MS( \
581 		 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
582 			 msdu_start_tlv.rx_msdu_start), \
583 			 RX_MSDU_START_2_TCP_ONLY_ACK_OFFSET)), \
584 		RX_MSDU_START_2_TCP_ONLY_ACK_MASK, \
585 		RX_MSDU_START_2_TCP_ONLY_ACK_LSB))
586 
587 #define HAL_RX_TLV_GET_TCP_PROTO(buf) \
588 	(_HAL_MS( \
589 		 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
590 			 msdu_start_tlv.rx_msdu_start), \
591 			 RX_MSDU_START_2_TCP_PROTO_OFFSET)), \
592 		RX_MSDU_START_2_TCP_PROTO_MASK, \
593 		RX_MSDU_START_2_TCP_PROTO_LSB))
594 
595 #define HAL_RX_TLV_GET_UDP_PROTO(buf) \
596 	(_HAL_MS( \
597 		 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
598 			 msdu_start_tlv.rx_msdu_start), \
599 			 RX_MSDU_START_2_UDP_PROTO_OFFSET)), \
600 		RX_MSDU_START_2_UDP_PROTO_MASK, \
601 		RX_MSDU_START_2_UDP_PROTO_LSB))
602 
603 #define HAL_RX_TLV_GET_IPV6(buf) \
604 	(_HAL_MS( \
605 		 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
606 			 msdu_start_tlv.rx_msdu_start), \
607 			 RX_MSDU_START_2_IPV6_PROTO_OFFSET)), \
608 		RX_MSDU_START_2_IPV6_PROTO_MASK, \
609 		RX_MSDU_START_2_IPV6_PROTO_LSB))
610 
611 #define HAL_RX_TLV_GET_IP_OFFSET(buf) \
612 	(_HAL_MS( \
613 		 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
614 			 msdu_start_tlv.rx_msdu_start), \
615 			 RX_MSDU_START_1_L3_OFFSET_OFFSET)), \
616 		RX_MSDU_START_1_L3_OFFSET_MASK, \
617 		RX_MSDU_START_1_L3_OFFSET_LSB))
618 
619 #define HAL_RX_TLV_GET_TCP_OFFSET(buf) \
620 	(_HAL_MS( \
621 		 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
622 			 msdu_start_tlv.rx_msdu_start), \
623 			 RX_MSDU_START_1_L4_OFFSET_OFFSET)), \
624 		RX_MSDU_START_1_L4_OFFSET_MASK, \
625 		RX_MSDU_START_1_L4_OFFSET_LSB))
626 
627 #define HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(buf) \
628 	(_HAL_MS( \
629 		 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
630 			 msdu_start_tlv.rx_msdu_start), \
631 			 RX_MSDU_START_4_FLOW_ID_TOEPLITZ_OFFSET)), \
632 		RX_MSDU_START_4_FLOW_ID_TOEPLITZ_MASK, \
633 		RX_MSDU_START_4_FLOW_ID_TOEPLITZ_LSB))
634 
635 #define HAL_RX_MSDU_START_MSDU_LEN_GET(_rx_msdu_start)		\
636 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start,		\
637 		RX_MSDU_START_1_MSDU_LENGTH_OFFSET)),		\
638 		RX_MSDU_START_1_MSDU_LENGTH_MASK,		\
639 		RX_MSDU_START_1_MSDU_LENGTH_LSB))
640 
641 #define HAL_RX_MSDU_START_BW_GET(_rx_msdu_start)     \
642 	(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
643 	RX_MSDU_START_5_RECEIVE_BANDWIDTH_OFFSET)), \
644 	RX_MSDU_START_5_RECEIVE_BANDWIDTH_MASK,     \
645 	RX_MSDU_START_5_RECEIVE_BANDWIDTH_LSB))
646 
647 #define HAL_RX_MSDU_START_FLOWID_TOEPLITZ_GET(_rx_msdu_start)	\
648 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start,		\
649 		RX_MSDU_START_4_FLOW_ID_TOEPLITZ_OFFSET)),	\
650 		RX_MSDU_START_4_FLOW_ID_TOEPLITZ_MASK,		\
651 		RX_MSDU_START_4_FLOW_ID_TOEPLITZ_LSB))
652 
653 /**
654  * hal_rx_msdu_start_toeplitz_get() - API to get the toeplitz hash
655  *                                    from rx_msdu_start TLV
656  * @buf: pointer to the start of RX PKT TLV headers
657  *
658  * Return: toeplitz hash
659  */
660 static inline uint32_t
hal_rx_msdu_start_toeplitz_get(uint8_t * buf)661 hal_rx_msdu_start_toeplitz_get(uint8_t *buf)
662 {
663 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
664 	struct rx_msdu_start *msdu_start =
665 			&pkt_tlvs->msdu_start_tlv.rx_msdu_start;
666 
667 	return HAL_RX_MSDU_START_FLOWID_TOEPLITZ_GET(msdu_start);
668 }
669 
670 #define HAL_RX_MSDU_START_SGI_GET(_rx_msdu_start)	\
671 	(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
672 		RX_MSDU_START_5_SGI_OFFSET)),		\
673 		RX_MSDU_START_5_SGI_MASK,		\
674 		RX_MSDU_START_5_SGI_LSB))
675 
676 #define HAL_RX_MSDU_START_RATE_MCS_GET(_rx_msdu_start)	\
677 	(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
678 		RX_MSDU_START_5_RATE_MCS_OFFSET)),	\
679 		RX_MSDU_START_5_RATE_MCS_MASK,		\
680 		RX_MSDU_START_5_RATE_MCS_LSB))
681 
682 #define HAL_RX_ATTN_DECRYPT_STATUS_GET(_rx_attn)		\
683 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn,		\
684 		RX_ATTENTION_2_DECRYPT_STATUS_CODE_OFFSET)),	\
685 		RX_ATTENTION_2_DECRYPT_STATUS_CODE_MASK,	\
686 		RX_ATTENTION_2_DECRYPT_STATUS_CODE_LSB))
687 
688 /*
689  * Get key index from RX_MSDU_END
690  */
691 #define HAL_RX_MSDU_END_KEYID_OCTET_GET(_rx_msdu_end)	\
692 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end,	\
693 		RX_MSDU_END_2_KEY_ID_OCTET_OFFSET)),	\
694 		RX_MSDU_END_2_KEY_ID_OCTET_MASK,	\
695 		RX_MSDU_END_2_KEY_ID_OCTET_LSB))
696 
697 #define HAL_RX_MSDU_START_RSSI_GET(_rx_msdu_start)	\
698 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start,  \
699 		RX_MSDU_START_5_USER_RSSI_OFFSET)),	\
700 		RX_MSDU_START_5_USER_RSSI_MASK,		\
701 		RX_MSDU_START_5_USER_RSSI_LSB))
702 
703 /**
704  * hal_rx_msdu_start_get_rssi() - API to get the rssi of received pkt
705  *                                from rx_msdu_start
706  *
707  * @buf: pointer to the start of RX PKT TLV header
708  *
709  * Return: uint32_t(rssi)
710  */
711 static inline uint32_t
hal_rx_msdu_start_get_rssi(uint8_t * buf)712 hal_rx_msdu_start_get_rssi(uint8_t *buf)
713 {
714 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
715 	struct rx_msdu_start *msdu_start =
716 				&pkt_tlvs->msdu_start_tlv.rx_msdu_start;
717 	uint32_t rssi;
718 
719 	rssi = HAL_RX_MSDU_START_RSSI_GET(msdu_start);
720 
721 	return rssi;
722 }
723 
724 #define HAL_RX_MSDU_START_FREQ_GET(_rx_msdu_start)		\
725 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start,		\
726 		RX_MSDU_START_7_SW_PHY_META_DATA_OFFSET)),      \
727 		RX_MSDU_START_7_SW_PHY_META_DATA_MASK,		\
728 		RX_MSDU_START_7_SW_PHY_META_DATA_LSB))
729 
730 #define HAL_RX_MSDU_START_PKT_TYPE_GET(_rx_msdu_start)	\
731 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start,  \
732 		RX_MSDU_START_5_PKT_TYPE_OFFSET)),      \
733 		RX_MSDU_START_5_PKT_TYPE_MASK,		\
734 		RX_MSDU_START_5_PKT_TYPE_LSB))
735 
736 #define HAL_RX_MPDU_AD4_31_0_GET(_rx_mpdu_info)	\
737 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
738 		RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_OFFSET)), \
739 		RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_MASK,	\
740 		RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_LSB))
741 
742 #define HAL_RX_MPDU_AD4_47_32_GET(_rx_mpdu_info)	\
743 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
744 		RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_OFFSET)), \
745 		RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_MASK,	\
746 		RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_LSB))
747 
748 /*******************************************************************************
749  * RX ERROR APIS
750  ******************************************************************************/
751 
752 #define HAL_RX_MPDU_END_DECRYPT_ERR_GET(_rx_mpdu_end)	\
753 	(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_mpdu_end),\
754 		RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_OFFSET)),	\
755 		RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_MASK,	\
756 		RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_LSB))
757 
758 #define HAL_RX_MPDU_END_MIC_ERR_GET(_rx_mpdu_end)	\
759 	(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_mpdu_end),\
760 		RX_MPDU_END_1_TKIP_MIC_ERR_OFFSET)),	\
761 		RX_MPDU_END_1_TKIP_MIC_ERR_MASK,	\
762 		RX_MPDU_END_1_TKIP_MIC_ERR_LSB))
763 
764 
765 /*******************************************************************************
766  * RX REO ERROR APIS
767  ******************************************************************************/
768 
769 
770 #define HAL_RX_REO_BUF_TYPE_GET(reo_desc) (((*(((uint32_t *)reo_desc) + \
771 		(REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_OFFSET >> 2))) & \
772 		REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_MASK) >> \
773 		REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_LSB)
774 
775 #define HAL_RX_REO_QUEUE_NUMBER_GET(reo_desc) (((*(((uint32_t *)reo_desc) + \
776 		(REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_OFFSET >> 2))) & \
777 		REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_MASK) >> \
778 		REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_LSB)
779 
780 #define HAL_RX_REO_ERROR_GET(reo_desc) (((*(((uint32_t *)reo_desc) + \
781 		(REO_DESTINATION_RING_7_REO_ERROR_CODE_OFFSET >> 2))) & \
782 		REO_DESTINATION_RING_7_REO_ERROR_CODE_MASK) >> \
783 		REO_DESTINATION_RING_7_REO_ERROR_CODE_LSB)
784 
785 /**
786  * hal_rx_msdu_link_desc_reinject() - Re-injects the MSDU link
787  *                                    descriptor to REO entrance ring
788  *
789  * @soc: HAL version of the SOC pointer
790  * @pa: Physical address of the MSDU Link Descriptor
791  * @cookie: SW cookie to get to the virtual address
792  * @error_enabled_reo_q: Argument to determine whether this needs to go
793  * to the error enabled REO queue
794  *
795  * Return: void
796  */
797 static inline
hal_rx_msdu_link_desc_reinject(struct hal_soc * soc,uint64_t pa,uint32_t cookie,bool error_enabled_reo_q)798 void hal_rx_msdu_link_desc_reinject(struct hal_soc *soc,
799 				    uint64_t pa,
800 				    uint32_t cookie,
801 				    bool error_enabled_reo_q)
802 {
803 	/* TODO */
804 }
805 
806 #define HAL_RX_WBM_FIRST_MSDU_GET(wbm_desc)		\
807 	(((*(((uint32_t *)wbm_desc) +			\
808 	(WBM_RELEASE_RING_4_FIRST_MSDU_OFFSET >> 2))) & \
809 	WBM_RELEASE_RING_4_FIRST_MSDU_MASK) >>		\
810 	WBM_RELEASE_RING_4_FIRST_MSDU_LSB)
811 
812 #define HAL_RX_WBM_LAST_MSDU_GET(wbm_desc)		\
813 	(((*(((uint32_t *)wbm_desc) +			\
814 	(WBM_RELEASE_RING_4_LAST_MSDU_OFFSET >> 2))) &  \
815 	WBM_RELEASE_RING_4_LAST_MSDU_MASK) >>		\
816 	WBM_RELEASE_RING_4_LAST_MSDU_LSB)
817 
818 #define HAL_RX_WBM_BUF_COOKIE_GET(wbm_desc) \
819 	HAL_RX_BUF_COOKIE_GET(&((struct wbm_release_ring *) \
820 	wbm_desc)->released_buff_or_desc_addr_info)
821 
822 #define HAL_RX_WBM_BUF_ADDR_39_32_GET(wbm_desc)	\
823 	(HAL_RX_BUFFER_ADDR_39_32_GET(&			\
824 	(((struct wbm_release_ring *) \
825 	wbm_desc)->released_buff_or_desc_addr_info)))
826 
827 #define HAL_RX_WBM_BUF_ADDR_31_0_GET(wbm_desc)	\
828 	(HAL_RX_BUFFER_ADDR_31_0_GET(&			\
829 	(((struct wbm_release_ring *) \
830 	wbm_desc)->released_buff_or_desc_addr_info)))
831 
832 static inline
833 uint32_t
HAL_RX_DESC_GET_DECAP_FORMAT(void * hw_desc_addr)834 HAL_RX_DESC_GET_DECAP_FORMAT(void *hw_desc_addr) {
835 	struct rx_msdu_start *rx_msdu_start;
836 	struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)hw_desc_addr;
837 
838 	rx_msdu_start = &rx_desc->msdu_start_tlv.rx_msdu_start;
839 
840 	return HAL_RX_GET(rx_msdu_start, RX_MSDU_START_2, DECAP_FORMAT);
841 }
842 
843 #define HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(_rx_mpdu_info)	\
844 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info,	\
845 		RX_MPDU_INFO_14_MPDU_FRAME_CONTROL_FIELD_OFFSET)),	\
846 		RX_MPDU_INFO_14_MPDU_FRAME_CONTROL_FIELD_MASK,	\
847 		RX_MPDU_INFO_14_MPDU_FRAME_CONTROL_FIELD_LSB))
848 /**
849  * hal_rx_get_rx_more_frag_bit(): Function to retrieve more fragment bit
850  * @buf: Network buffer
851  *
852  * Return: rx more fragment bit
853  */
854 static inline
hal_rx_get_rx_more_frag_bit(uint8_t * buf)855 uint8_t hal_rx_get_rx_more_frag_bit(uint8_t *buf)
856 {
857 	struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf);
858 	struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs);
859 	uint16_t frame_ctrl = 0;
860 
861 	frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(rx_mpdu_info) >>
862 		DOT11_FC1_MORE_FRAG_OFFSET;
863 
864 	/* more fragment bit if at offset bit 4 */
865 	return frame_ctrl;
866 }
867 
868 static inline
hal_rx_mpdu_desc_info_get_li(void * desc_addr,void * mpdu_desc_info_hdl)869 void hal_rx_mpdu_desc_info_get_li(void *desc_addr,
870 				  void *mpdu_desc_info_hdl)
871 {
872 	struct reo_destination_ring *reo_dst_ring;
873 	struct hal_rx_mpdu_desc_info *mpdu_desc_info =
874 		(struct hal_rx_mpdu_desc_info *)mpdu_desc_info_hdl;
875 	uint32_t *mpdu_info;
876 
877 	reo_dst_ring = (struct reo_destination_ring *)desc_addr;
878 
879 	mpdu_info = (uint32_t *)&reo_dst_ring->rx_mpdu_desc_info_details;
880 
881 	mpdu_desc_info->msdu_count = HAL_RX_MPDU_MSDU_COUNT_GET(mpdu_info);
882 	mpdu_desc_info->mpdu_seq = HAL_RX_MPDU_SEQUENCE_NUMBER_GET(mpdu_info);
883 	mpdu_desc_info->mpdu_flags = HAL_RX_MPDU_FLAGS_GET(mpdu_info);
884 	mpdu_desc_info->peer_meta_data =
885 		HAL_RX_MPDU_DESC_PEER_META_DATA_GET(mpdu_info);
886 	mpdu_desc_info->bar_frame = HAL_RX_MPDU_BAR_FRAME_GET(mpdu_info);
887 }
888 
889 /**
890  * hal_rx_attn_msdu_done_get_li() - Get msdi done flag from RX TLV
891  * @buf: RX tlv address
892  *
893  * Return: msdu done flag
894  */
hal_rx_attn_msdu_done_get_li(uint8_t * buf)895 static inline uint32_t hal_rx_attn_msdu_done_get_li(uint8_t *buf)
896 {
897 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
898 	struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
899 	uint32_t msdu_done;
900 
901 	msdu_done = HAL_RX_ATTN_MSDU_DONE_GET(rx_attn);
902 
903 	return msdu_done;
904 }
905 
906 #define HAL_RX_MSDU_FLAGS_GET(msdu_info_ptr) \
907 	(HAL_RX_FIRST_MSDU_IN_MPDU_FLAG_GET(msdu_info_ptr) | \
908 	HAL_RX_LAST_MSDU_IN_MPDU_FLAG_GET(msdu_info_ptr) | \
909 	HAL_RX_MSDU_CONTINUATION_FLAG_GET(msdu_info_ptr) | \
910 	HAL_RX_MSDU_SA_IS_VALID_FLAG_GET(msdu_info_ptr) | \
911 	HAL_RX_MSDU_SA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr) | \
912 	HAL_RX_MSDU_DA_IS_VALID_FLAG_GET(msdu_info_ptr) | \
913 	HAL_RX_MSDU_DA_IS_MCBC_FLAG_GET(msdu_info_ptr) | \
914 	HAL_RX_MSDU_DA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr))
915 
916 /**
917  * hal_rx_msdu_flags_get_li() - Get msdu flags from ring desc
918  * @msdu_desc_info_hdl: msdu desc info handle
919  *
920  * Return: msdu flags
921  */
922 static inline
hal_rx_msdu_flags_get_li(rx_msdu_desc_info_t msdu_desc_info_hdl)923 uint32_t hal_rx_msdu_flags_get_li(rx_msdu_desc_info_t msdu_desc_info_hdl)
924 {
925 	struct rx_msdu_desc_info *msdu_desc_info =
926 		(struct rx_msdu_desc_info *)msdu_desc_info_hdl;
927 
928 	return HAL_RX_MSDU_FLAGS_GET(msdu_desc_info);
929 }
930 
931 /**
932  * hal_rx_msdu_desc_info_get_li() - Gets the flags related to MSDU descriptor.
933  * @desc_addr: REO ring descriptor addr
934  * @msdu_desc_info: Holds MSDU descriptor info from HAL Rx descriptor
935  *
936  * Specifically flags needed are: first_msdu_in_mpdu,
937  * last_msdu_in_mpdu, msdu_continuation, sa_is_valid,
938  * sa_idx_timeout, da_is_valid, da_idx_timeout, da_is_MCBC
939  *
940  * Return: void
941  */
942 static inline void
hal_rx_msdu_desc_info_get_li(void * desc_addr,struct hal_rx_msdu_desc_info * msdu_desc_info)943 hal_rx_msdu_desc_info_get_li(void *desc_addr,
944 			     struct hal_rx_msdu_desc_info *msdu_desc_info)
945 {
946 	struct reo_destination_ring *reo_dst_ring;
947 	uint32_t *msdu_info;
948 
949 	reo_dst_ring = (struct reo_destination_ring *)desc_addr;
950 
951 	msdu_info = (uint32_t *)&reo_dst_ring->rx_msdu_desc_info_details;
952 	msdu_desc_info->msdu_flags =
953 		hal_rx_msdu_flags_get_li((struct rx_msdu_desc_info *)msdu_info);
954 	msdu_desc_info->msdu_len = HAL_RX_MSDU_PKT_LENGTH_GET(msdu_info);
955 }
956 
957 #define HAL_RX_MSDU_START_NSS_GET(_rx_msdu_start)		\
958 	(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),	\
959 	RX_MSDU_START_5_NSS_OFFSET)),				\
960 	RX_MSDU_START_5_NSS_MASK,				\
961 	RX_MSDU_START_5_NSS_LSB))
962 
963 #define HAL_RX_ATTN_MSDU_LEN_ERR_GET(_rx_attn)		\
964 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn,	\
965 		RX_ATTENTION_1_MSDU_LENGTH_ERR_OFFSET)),	\
966 		RX_ATTENTION_1_MSDU_LENGTH_ERR_MASK,		\
967 		RX_ATTENTION_1_MSDU_LENGTH_ERR_LSB))
968 
969 /**
970  * hal_rx_attn_msdu_len_err_get_li() - Get msdu_len_err value from rx
971  *                                     attention tlvs
972  * @buf: pointer to rx pkt tlvs hdr
973  *
974  * Return: msdu_len_err value
975  */
976 static inline uint32_t
hal_rx_attn_msdu_len_err_get_li(uint8_t * buf)977 hal_rx_attn_msdu_len_err_get_li(uint8_t *buf)
978 {
979 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
980 	struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
981 
982 	return HAL_RX_ATTN_MSDU_LEN_ERR_GET(rx_attn);
983 }
984 #endif /* _HAL_LI_RX_H_ */
985