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Searched defs:gmu (Results 1 – 19 of 19) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/msm/adreno/
Da6xx_gmu.c20 static void a6xx_gmu_fault(struct a6xx_gmu *gmu) in a6xx_gmu_fault()
38 struct a6xx_gmu *gmu = data; in a6xx_gmu_irq() local
62 struct a6xx_gmu *gmu = data; in a6xx_hfi_irq() local
77 bool a6xx_gmu_sptprac_is_on(struct a6xx_gmu *gmu) in a6xx_gmu_sptprac_is_on()
93 bool a6xx_gmu_gx_is_on(struct a6xx_gmu *gmu) in a6xx_gmu_gx_is_on()
113 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_gmu_set_freq() local
173 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_gmu_get_freq() local
178 static bool a6xx_gmu_check_idle_level(struct a6xx_gmu *gmu) in a6xx_gmu_check_idle_level()
199 int a6xx_gmu_wait_for_idle(struct a6xx_gmu *gmu) in a6xx_gmu_wait_for_idle()
204 static int a6xx_gmu_start(struct a6xx_gmu *gmu) in a6xx_gmu_start()
[all …]
Da6xx_hfi.c28 static int a6xx_hfi_queue_read(struct a6xx_gmu *gmu, in a6xx_hfi_queue_read()
66 static int a6xx_hfi_queue_write(struct a6xx_gmu *gmu, in a6xx_hfi_queue_write()
102 static int a6xx_hfi_wait_for_ack(struct a6xx_gmu *gmu, u32 id, u32 seqnum, in a6xx_hfi_wait_for_ack()
171 static int a6xx_hfi_send_msg(struct a6xx_gmu *gmu, int id, in a6xx_hfi_send_msg()
194 static int a6xx_hfi_send_gmu_init(struct a6xx_gmu *gmu, int boot_state) in a6xx_hfi_send_gmu_init()
206 static int a6xx_hfi_get_fw_version(struct a6xx_gmu *gmu, u32 *version) in a6xx_hfi_get_fw_version()
217 static int a6xx_hfi_send_perf_table_v1(struct a6xx_gmu *gmu) in a6xx_hfi_send_perf_table_v1()
239 static int a6xx_hfi_send_perf_table(struct a6xx_gmu *gmu) in a6xx_hfi_send_perf_table()
631 static int a6xx_hfi_send_bw_table(struct a6xx_gmu *gmu) in a6xx_hfi_send_bw_table()
662 static int a6xx_hfi_send_test(struct a6xx_gmu *gmu) in a6xx_hfi_send_test()
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Da6xx_gmu.h104 static inline u32 gmu_read(struct a6xx_gmu *gmu, u32 offset) in gmu_read()
109 static inline void gmu_write(struct a6xx_gmu *gmu, u32 offset, u32 value) in gmu_write()
115 gmu_write_bulk(struct a6xx_gmu *gmu, u32 offset, const u32 *data, u32 size) in gmu_write_bulk()
121 static inline void gmu_rmw(struct a6xx_gmu *gmu, u32 reg, u32 mask, u32 or) in gmu_rmw()
130 static inline u64 gmu_read64(struct a6xx_gmu *gmu, u32 lo, u32 hi) in gmu_read64()
140 #define gmu_poll_timeout(gmu, addr, val, cond, interval, timeout) \ argument
144 static inline u32 gmu_read_rscc(struct a6xx_gmu *gmu, u32 offset) in gmu_read_rscc()
149 static inline void gmu_write_rscc(struct a6xx_gmu *gmu, u32 offset, u32 value) in gmu_write_rscc()
154 #define gmu_poll_timeout_rscc(gmu, addr, val, cond, interval, timeout) \ argument
Da6xx_gpu.c412 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_set_hwcg() local
865 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in hw_init() local
1228 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_recover() local
1844 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_pm_resume() local
1922 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_pm_suspend() local
Da6xx_gpu.h37 struct a6xx_gmu gmu; member
Da6xx_gpu_state.c1181 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in _a6xx_get_gmu_registers() local
1268 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_snapshot_gmu_hfi_history() local
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsm6350.dtsi1446 gmu: gmu@3d6a000 { label
Dsc8180x.dtsi2322 gmu: gmu@2c6a000 { label
Dsm8350.dtsi1974 gmu: gmu@3d6a000 { label
Dsc8280xp.dtsi2512 gmu: gmu@3d6a000 { label
Dsm8650.dtsi2706 gmu: gmu@3d6a000 { label
Dsm8550.dtsi2168 gmu: gmu@3d6a000 { label
Dsm8450.dtsi2253 gmu: gmu@3d6a000 { label
Dx1e80100.dtsi3393 gmu: gmu@3d6a000 { label
Dsc7180.dtsi2268 gmu: gmu@506a000 { label
Dsm8150.dtsi2306 gmu: gmu@2c6a000 { label
Dsdm845.dtsi4925 gmu: gmu@506a000 { label
Dsm8250.dtsi2991 gmu: gmu@3d6a000 { label
Dsc7280.dtsi2899 gmu: gmu@3d6a000 { label