1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /* Synopsys DesignWare 8250 library header file. */
3
4 #include <linux/io.h>
5 #include <linux/types.h>
6
7 #include "8250.h"
8
9 struct dw8250_port_data {
10 /* Port properties */
11 int line;
12
13 /* DMA operations */
14 struct uart_8250_dma dma;
15
16 /* Hardware configuration */
17 u32 cpr_value;
18 u8 dlf_size;
19
20 /* RS485 variables */
21 bool hw_rs485_support;
22 };
23
24 void dw8250_do_set_termios(struct uart_port *p, struct ktermios *termios, const struct ktermios *old);
25 void dw8250_setup_port(struct uart_port *p);
26
dw8250_readl_ext(struct uart_port * p,int offset)27 static inline u32 dw8250_readl_ext(struct uart_port *p, int offset)
28 {
29 if (p->iotype == UPIO_MEM32BE)
30 return ioread32be(p->membase + offset);
31 return readl(p->membase + offset);
32 }
33
dw8250_writel_ext(struct uart_port * p,int offset,u32 reg)34 static inline void dw8250_writel_ext(struct uart_port *p, int offset, u32 reg)
35 {
36 if (p->iotype == UPIO_MEM32BE)
37 iowrite32be(reg, p->membase + offset);
38 else
39 writel(reg, p->membase + offset);
40 }
41