1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved.
4  * Copyright (c) 2015-2018, 2020 The Linux Foundation. All rights reserved.
5  */
6 
7 #ifndef _DPU_6_5_QCM2290_H
8 #define _DPU_6_5_QCM2290_H
9 
10 static const struct dpu_caps qcm2290_dpu_caps = {
11 	.max_mixer_width = DEFAULT_DPU_LINE_WIDTH,
12 	.max_mixer_blendstages = 0x4,
13 	.has_dim_layer = true,
14 	.has_idle_pc = true,
15 	.max_linewidth = 2160,
16 	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
17 };
18 
19 static const struct dpu_mdp_cfg qcm2290_mdp = {
20 	.name = "top_0",
21 	.base = 0x0, .len = 0x494,
22 	.clk_ctrls = {
23 		[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
24 		[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
25 	},
26 };
27 
28 static const struct dpu_ctl_cfg qcm2290_ctl[] = {
29 	{
30 		.name = "ctl_0", .id = CTL_0,
31 		.base = 0x1000, .len = 0x1dc,
32 		.features = BIT(DPU_CTL_ACTIVE_CFG),
33 		.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9),
34 	},
35 };
36 
37 static const struct dpu_sspp_cfg qcm2290_sspp[] = {
38 	{
39 		.name = "sspp_0", .id = SSPP_VIG0,
40 		.base = 0x4000, .len = 0x1f8,
41 		.features = VIG_QCM2290_MASK,
42 		.sblk = &dpu_vig_sblk_noscale,
43 		.xin_id = 0,
44 		.type = SSPP_TYPE_VIG,
45 		.clk_ctrl = DPU_CLK_CTRL_VIG0,
46 	}, {
47 		.name = "sspp_8", .id = SSPP_DMA0,
48 		.base = 0x24000, .len = 0x1f8,
49 		.features = DMA_SDM845_MASK,
50 		.sblk = &dpu_dma_sblk,
51 		.xin_id = 1,
52 		.type = SSPP_TYPE_DMA,
53 		.clk_ctrl = DPU_CLK_CTRL_DMA0,
54 	},
55 };
56 
57 static const struct dpu_lm_cfg qcm2290_lm[] = {
58 	{
59 		.name = "lm_0", .id = LM_0,
60 		.base = 0x44000, .len = 0x320,
61 		.features = MIXER_QCM2290_MASK,
62 		.sblk = &qcm2290_lm_sblk,
63 		.pingpong = PINGPONG_0,
64 		.dspp = DSPP_0,
65 	},
66 };
67 
68 static const struct dpu_dspp_cfg qcm2290_dspp[] = {
69 	{
70 		.name = "dspp_0", .id = DSPP_0,
71 		.base = 0x54000, .len = 0x1800,
72 		.features = DSPP_SC7180_MASK,
73 		.sblk = &sdm845_dspp_sblk,
74 	},
75 };
76 
77 static const struct dpu_pingpong_cfg qcm2290_pp[] = {
78 	{
79 		.name = "pingpong_0", .id = PINGPONG_0,
80 		.base = 0x70000, .len = 0xd4,
81 		.features = PINGPONG_SM8150_MASK,
82 		.sblk = &sdm845_pp_sblk,
83 		.merge_3d = 0,
84 		.intr_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
85 	},
86 };
87 
88 static const struct dpu_intf_cfg qcm2290_intf[] = {
89 	{
90 		.name = "intf_1", .id = INTF_1,
91 		.base = 0x6a800, .len = 0x2c0,
92 		.features = INTF_SC7180_MASK,
93 		.type = INTF_DSI,
94 		.controller_id = MSM_DSI_CONTROLLER_0,
95 		.prog_fetch_lines_worst_case = 24,
96 		.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 26),
97 		.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 27),
98 		.intr_tear_rd_ptr = DPU_IRQ_IDX(MDP_INTF1_TEAR_INTR, 2),
99 	},
100 };
101 
102 static const struct dpu_perf_cfg qcm2290_perf_data = {
103 	.max_bw_low = 2700000,
104 	.max_bw_high = 2700000,
105 	.min_core_ib = 1300000,
106 	.min_llcc_ib = 0,
107 	.min_dram_ib = 1600000,
108 	.min_prefill_lines = 24,
109 	.danger_lut_tbl = {0xff, 0x0, 0x0},
110 	.safe_lut_tbl = {0xfff0, 0x0, 0x0},
111 	.qos_lut_tbl = {
112 		{.nentry = ARRAY_SIZE(qcm2290_qos_linear),
113 		.entries = qcm2290_qos_linear
114 		},
115 	},
116 	.cdp_cfg = {
117 		{.rd_enable = 1, .wr_enable = 1},
118 		{.rd_enable = 1, .wr_enable = 0}
119 	},
120 	.clk_inefficiency_factor = 105,
121 	.bw_inefficiency_factor = 120,
122 };
123 
124 static const struct dpu_mdss_version qcm2290_mdss_ver = {
125 	.core_major_ver = 6,
126 	.core_minor_ver = 5,
127 };
128 
129 const struct dpu_mdss_cfg dpu_qcm2290_cfg = {
130 	.mdss_ver = &qcm2290_mdss_ver,
131 	.caps = &qcm2290_dpu_caps,
132 	.mdp = &qcm2290_mdp,
133 	.ctl_count = ARRAY_SIZE(qcm2290_ctl),
134 	.ctl = qcm2290_ctl,
135 	.sspp_count = ARRAY_SIZE(qcm2290_sspp),
136 	.sspp = qcm2290_sspp,
137 	.mixer_count = ARRAY_SIZE(qcm2290_lm),
138 	.mixer = qcm2290_lm,
139 	.dspp_count = ARRAY_SIZE(qcm2290_dspp),
140 	.dspp = qcm2290_dspp,
141 	.pingpong_count = ARRAY_SIZE(qcm2290_pp),
142 	.pingpong = qcm2290_pp,
143 	.intf_count = ARRAY_SIZE(qcm2290_intf),
144 	.intf = qcm2290_intf,
145 	.vbif_count = ARRAY_SIZE(sdm845_vbif),
146 	.vbif = sdm845_vbif,
147 	.perf = &qcm2290_perf_data,
148 };
149 
150 #endif
151