1 // SPDX-License-Identifier: MIT
2 //
3 // Copyright 2024 Advanced Micro Devices, Inc.
4 
5 #include "dml2_pmo_factory.h"
6 #include "dml2_pmo_dcn4_fams2.h"
7 #include "dml2_pmo_dcn3.h"
8 #include "dml2_external_lib_deps.h"
9 
dummy_init_for_stutter(struct dml2_pmo_init_for_stutter_in_out * in_out)10 static bool dummy_init_for_stutter(struct dml2_pmo_init_for_stutter_in_out *in_out)
11 {
12 	return false;
13 }
14 
dummy_test_for_stutter(struct dml2_pmo_test_for_stutter_in_out * in_out)15 static bool dummy_test_for_stutter(struct dml2_pmo_test_for_stutter_in_out *in_out)
16 {
17 	return true;
18 }
19 
dummy_optimize_for_stutter(struct dml2_pmo_optimize_for_stutter_in_out * in_out)20 static bool dummy_optimize_for_stutter(struct dml2_pmo_optimize_for_stutter_in_out *in_out)
21 {
22 	return false;
23 }
24 
dml2_pmo_create(enum dml2_project_id project_id,struct dml2_pmo_instance * out)25 bool dml2_pmo_create(enum dml2_project_id project_id, struct dml2_pmo_instance *out)
26 {
27 	bool result = false;
28 
29 	if (out == 0)
30 		return false;
31 
32 	memset(out, 0, sizeof(struct dml2_pmo_instance));
33 
34 	switch (project_id) {
35 	case dml2_project_dcn4x_stage1:
36 		out->initialize = pmo_dcn4_fams2_initialize;
37 		out->optimize_dcc_mcache = pmo_dcn4_fams2_optimize_dcc_mcache;
38 		result = true;
39 		break;
40 	case dml2_project_dcn4x_stage2:
41 		out->initialize = pmo_dcn3_initialize;
42 
43 		out->optimize_dcc_mcache = pmo_dcn3_optimize_dcc_mcache;
44 
45 		out->init_for_vmin = pmo_dcn3_init_for_vmin;
46 		out->test_for_vmin = pmo_dcn3_test_for_vmin;
47 		out->optimize_for_vmin = pmo_dcn3_optimize_for_vmin;
48 
49 		out->init_for_uclk_pstate = pmo_dcn3_init_for_pstate_support;
50 		out->test_for_uclk_pstate = pmo_dcn3_test_for_pstate_support;
51 		out->optimize_for_uclk_pstate = pmo_dcn3_optimize_for_pstate_support;
52 
53 		out->init_for_stutter = dummy_init_for_stutter;
54 		out->test_for_stutter = dummy_test_for_stutter;
55 		out->optimize_for_stutter = dummy_optimize_for_stutter;
56 
57 		result = true;
58 		break;
59 	case dml2_project_dcn4x_stage2_auto_drr_svp:
60 		out->initialize = pmo_dcn4_fams2_initialize;
61 
62 		out->optimize_dcc_mcache = pmo_dcn4_fams2_optimize_dcc_mcache;
63 
64 		out->init_for_vmin = pmo_dcn4_fams2_init_for_vmin;
65 		out->test_for_vmin = pmo_dcn4_fams2_test_for_vmin;
66 		out->optimize_for_vmin = pmo_dcn4_fams2_optimize_for_vmin;
67 
68 		out->init_for_uclk_pstate = pmo_dcn4_fams2_init_for_pstate_support;
69 		out->test_for_uclk_pstate = pmo_dcn4_fams2_test_for_pstate_support;
70 		out->optimize_for_uclk_pstate = pmo_dcn4_fams2_optimize_for_pstate_support;
71 
72 		out->init_for_stutter = pmo_dcn4_fams2_init_for_stutter;
73 		out->test_for_stutter = pmo_dcn4_fams2_test_for_stutter;
74 		out->optimize_for_stutter = pmo_dcn4_fams2_optimize_for_stutter;
75 
76 		result = true;
77 		break;
78 	case dml2_project_invalid:
79 	default:
80 		break;
81 	}
82 
83 	return result;
84 }
85