Searched defs:dig_encoder_link_setup_parameters_v1_5 (Results 1 – 1 of 1) sorted by relevance
4306 struct dig_encoder_link_setup_parameters_v1_5 struct4308 uint8_t digid; // 0~6 map to DIG0~DIG6 enum atom_dig_encoder_control_v5_digid4309 uint8_t action; // = ATOM_ENOCODER_CMD_LINK_SETUP 4310 uint8_t digmode; // ATOM_ENCODER_MODE_DP/ATOM_ENCODER_MODE_DVI/ATOM_ENCODER_MODE_HDMI4311 uint8_t lanenum; // Lane number 4312 uint8_t symclk_10khz; // Symbol Clock in 10Khz4313 uint8_t hpd_sel;4314 uint8_t digfe_sel; // DIG stream( front-end ) selection, bit0 means DIG0 FE is enable, 4315 uint8_t reserved[2];