1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
2 /* Copyright (c) 2021, NVIDIA CORPORATION & AFFILIATES. All rights reserved. */
3 
4 #define MLX5DR_DEBUG_DUMP_BUFF_SIZE (64 * 1024 * 1024)
5 #define MLX5DR_DEBUG_DUMP_BUFF_LENGTH 512
6 
7 enum {
8 	MLX5DR_DEBUG_DUMP_STATE_FREE,
9 	MLX5DR_DEBUG_DUMP_STATE_IN_PROGRESS,
10 };
11 
12 struct mlx5dr_dbg_dump_buff {
13 	char *buff;
14 	u32 index;
15 	struct list_head node;
16 };
17 
18 struct mlx5dr_dbg_dump_data {
19 	struct list_head buff_list;
20 };
21 
22 struct mlx5dr_dbg_dump_info {
23 	struct mutex dbg_mutex; /* protect dbg lists */
24 	struct dentry *steering_debugfs;
25 	struct dentry *fdb_debugfs;
26 	struct mlx5dr_dbg_dump_data *dump_data;
27 	atomic_t state;
28 };
29 
30 void mlx5dr_dbg_init_dump(struct mlx5dr_domain *dmn);
31 void mlx5dr_dbg_uninit_dump(struct mlx5dr_domain *dmn);
32 void mlx5dr_dbg_tbl_add(struct mlx5dr_table *tbl);
33 void mlx5dr_dbg_tbl_del(struct mlx5dr_table *tbl);
34 void mlx5dr_dbg_rule_add(struct mlx5dr_rule *rule);
35 void mlx5dr_dbg_rule_del(struct mlx5dr_rule *rule);
36