1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #include "dm_services.h"
27 
28 #include "ObjectID.h"
29 #include "atomfirmware.h"
30 
31 #include "include/bios_parser_types.h"
32 
33 #include "command_table_helper2.h"
34 
dal_bios_parser_init_cmd_tbl_helper2(const struct command_table_helper ** h,enum dce_version dce)35 bool dal_bios_parser_init_cmd_tbl_helper2(
36 	const struct command_table_helper **h,
37 	enum dce_version dce)
38 {
39 	switch (dce) {
40 #if defined(CONFIG_DRM_AMD_DC_SI)
41 	case DCE_VERSION_6_0:
42 	case DCE_VERSION_6_1:
43 	case DCE_VERSION_6_4:
44 		*h = dal_cmd_tbl_helper_dce60_get_table();
45 		return true;
46 #endif
47 
48 	case DCE_VERSION_8_0:
49 	case DCE_VERSION_8_1:
50 	case DCE_VERSION_8_3:
51 		*h = dal_cmd_tbl_helper_dce80_get_table();
52 		return true;
53 
54 	case DCE_VERSION_10_0:
55 		*h = dal_cmd_tbl_helper_dce110_get_table();
56 		return true;
57 
58 	case DCE_VERSION_11_0:
59 		*h = dal_cmd_tbl_helper_dce110_get_table();
60 		return true;
61 
62 	case DCE_VERSION_11_2:
63 	case DCE_VERSION_11_22:
64 	case DCE_VERSION_12_0:
65 	case DCE_VERSION_12_1:
66 		*h = dal_cmd_tbl_helper_dce112_get_table2();
67 		return true;
68 	case DCN_VERSION_1_0:
69 	case DCN_VERSION_1_01:
70 	case DCN_VERSION_2_0:
71 	case DCN_VERSION_2_1:
72 	case DCN_VERSION_2_01:
73 	case DCN_VERSION_3_0:
74 	case DCN_VERSION_3_01:
75 	case DCN_VERSION_3_02:
76 	case DCN_VERSION_3_03:
77 	case DCN_VERSION_3_1:
78 	case DCN_VERSION_3_14:
79 	case DCN_VERSION_3_15:
80 	case DCN_VERSION_3_16:
81 	case DCN_VERSION_3_2:
82 	case DCN_VERSION_3_21:
83 	case DCN_VERSION_3_5:
84 	case DCN_VERSION_3_51:
85 	case DCN_VERSION_4_01:
86 		*h = dal_cmd_tbl_helper_dce112_get_table2();
87 		return true;
88 
89 	default:
90 		/* Unsupported DCE */
91 		BREAK_TO_DEBUGGER();
92 		return false;
93 	}
94 }
95 
96 /* real implementations */
97 
dal_cmd_table_helper_controller_id_to_atom2(enum controller_id id,uint8_t * atom_id)98 bool dal_cmd_table_helper_controller_id_to_atom2(
99 	enum controller_id id,
100 	uint8_t *atom_id)
101 {
102 	if (atom_id == NULL) {
103 		BREAK_TO_DEBUGGER();
104 		return false;
105 	}
106 
107 	switch (id) {
108 	case CONTROLLER_ID_D0:
109 		*atom_id = ATOM_CRTC1;
110 		return true;
111 	case CONTROLLER_ID_D1:
112 		*atom_id = ATOM_CRTC2;
113 		return true;
114 	case CONTROLLER_ID_D2:
115 		*atom_id = ATOM_CRTC3;
116 		return true;
117 	case CONTROLLER_ID_D3:
118 		*atom_id = ATOM_CRTC4;
119 		return true;
120 	case CONTROLLER_ID_D4:
121 		*atom_id = ATOM_CRTC5;
122 		return true;
123 	case CONTROLLER_ID_D5:
124 		*atom_id = ATOM_CRTC6;
125 		return true;
126 	/* TODO :case CONTROLLER_ID_UNDERLAY0:
127 		*atom_id = ATOM_UNDERLAY_PIPE0;
128 		return true;
129 	*/
130 	case CONTROLLER_ID_UNDEFINED:
131 		*atom_id = ATOM_CRTC_INVALID;
132 		return true;
133 	default:
134 		/* Wrong controller id */
135 		BREAK_TO_DEBUGGER();
136 		return false;
137 	}
138 }
139 
140 /**
141  * dal_cmd_table_helper_transmitter_bp_to_atom2 - Translate the Transmitter to the
142  *                                     corresponding ATOM BIOS value
143  *  @t: transmitter
144  *  returns: digitalTransmitter
145  *    // =00: Digital Transmitter1 ( UNIPHY linkAB )
146  *    // =01: Digital Transmitter2 ( UNIPHY linkCD )
147  *    // =02: Digital Transmitter3 ( UNIPHY linkEF )
148  */
dal_cmd_table_helper_transmitter_bp_to_atom2(enum transmitter t)149 uint8_t dal_cmd_table_helper_transmitter_bp_to_atom2(
150 	enum transmitter t)
151 {
152 	switch (t) {
153 	case TRANSMITTER_UNIPHY_A:
154 	case TRANSMITTER_UNIPHY_B:
155 	case TRANSMITTER_TRAVIS_LCD:
156 		return 0;
157 	case TRANSMITTER_UNIPHY_C:
158 	case TRANSMITTER_UNIPHY_D:
159 		return 1;
160 	case TRANSMITTER_UNIPHY_E:
161 	case TRANSMITTER_UNIPHY_F:
162 		return 2;
163 	default:
164 		/* Invalid Transmitter Type! */
165 		BREAK_TO_DEBUGGER();
166 		return 0;
167 	}
168 }
169 
dal_cmd_table_helper_encoder_mode_bp_to_atom2(enum signal_type s,bool enable_dp_audio)170 uint32_t dal_cmd_table_helper_encoder_mode_bp_to_atom2(
171 	enum signal_type s,
172 	bool enable_dp_audio)
173 {
174 	switch (s) {
175 	case SIGNAL_TYPE_DVI_SINGLE_LINK:
176 	case SIGNAL_TYPE_DVI_DUAL_LINK:
177 		return ATOM_ENCODER_MODE_DVI;
178 	case SIGNAL_TYPE_HDMI_TYPE_A:
179 		return ATOM_ENCODER_MODE_HDMI;
180 	case SIGNAL_TYPE_LVDS:
181 		return ATOM_ENCODER_MODE_LVDS;
182 	case SIGNAL_TYPE_EDP:
183 	case SIGNAL_TYPE_DISPLAY_PORT_MST:
184 	case SIGNAL_TYPE_DISPLAY_PORT:
185 	case SIGNAL_TYPE_VIRTUAL:
186 		if (enable_dp_audio)
187 			return ATOM_ENCODER_MODE_DP_AUDIO;
188 		else
189 			return ATOM_ENCODER_MODE_DP;
190 	case SIGNAL_TYPE_RGB:
191 		return ATOM_ENCODER_MODE_CRT;
192 	default:
193 		return ATOM_ENCODER_MODE_CRT;
194 	}
195 }
196 
dal_cmd_table_helper_clock_source_id_to_ref_clk_src2(enum clock_source_id id,uint32_t * ref_clk_src_id)197 bool dal_cmd_table_helper_clock_source_id_to_ref_clk_src2(
198 	enum clock_source_id id,
199 	uint32_t *ref_clk_src_id)
200 {
201 	if (ref_clk_src_id == NULL) {
202 		BREAK_TO_DEBUGGER();
203 		return false;
204 	}
205 
206 	switch (id) {
207 	case CLOCK_SOURCE_ID_PLL1:
208 		*ref_clk_src_id = ENCODER_REFCLK_SRC_P1PLL;
209 		return true;
210 	case CLOCK_SOURCE_ID_PLL2:
211 		*ref_clk_src_id = ENCODER_REFCLK_SRC_P2PLL;
212 		return true;
213 	/*TODO:case CLOCK_SOURCE_ID_DCPLL:
214 		*ref_clk_src_id = ENCODER_REFCLK_SRC_DCPLL;
215 		return true;
216 	*/
217 	case CLOCK_SOURCE_ID_EXTERNAL:
218 		*ref_clk_src_id = ENCODER_REFCLK_SRC_EXTCLK;
219 		return true;
220 	case CLOCK_SOURCE_ID_UNDEFINED:
221 		*ref_clk_src_id = ENCODER_REFCLK_SRC_INVALID;
222 		return true;
223 	default:
224 		/* Unsupported clock source id */
225 		BREAK_TO_DEBUGGER();
226 		return false;
227 	}
228 }
229 
dal_cmd_table_helper_encoder_id_to_atom2(enum encoder_id id)230 uint8_t dal_cmd_table_helper_encoder_id_to_atom2(
231 	enum encoder_id id)
232 {
233 	switch (id) {
234 	case ENCODER_ID_INTERNAL_LVDS:
235 		return ENCODER_OBJECT_ID_INTERNAL_LVDS;
236 	case ENCODER_ID_INTERNAL_TMDS1:
237 		return ENCODER_OBJECT_ID_INTERNAL_TMDS1;
238 	case ENCODER_ID_INTERNAL_TMDS2:
239 		return ENCODER_OBJECT_ID_INTERNAL_TMDS2;
240 	case ENCODER_ID_INTERNAL_DAC1:
241 		return ENCODER_OBJECT_ID_INTERNAL_DAC1;
242 	case ENCODER_ID_INTERNAL_DAC2:
243 		return ENCODER_OBJECT_ID_INTERNAL_DAC2;
244 	case ENCODER_ID_INTERNAL_LVTM1:
245 		return ENCODER_OBJECT_ID_INTERNAL_LVTM1;
246 	case ENCODER_ID_INTERNAL_HDMI:
247 		return ENCODER_OBJECT_ID_HDMI_INTERNAL;
248 	case ENCODER_ID_EXTERNAL_TRAVIS:
249 		return ENCODER_OBJECT_ID_TRAVIS;
250 	case ENCODER_ID_EXTERNAL_NUTMEG:
251 		return ENCODER_OBJECT_ID_NUTMEG;
252 	case ENCODER_ID_INTERNAL_KLDSCP_TMDS1:
253 		return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1;
254 	case ENCODER_ID_INTERNAL_KLDSCP_DAC1:
255 		return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1;
256 	case ENCODER_ID_INTERNAL_KLDSCP_DAC2:
257 		return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2;
258 	case ENCODER_ID_EXTERNAL_MVPU_FPGA:
259 		return ENCODER_OBJECT_ID_MVPU_FPGA;
260 	case ENCODER_ID_INTERNAL_DDI:
261 		return ENCODER_OBJECT_ID_INTERNAL_DDI;
262 	case ENCODER_ID_INTERNAL_UNIPHY:
263 		return ENCODER_OBJECT_ID_INTERNAL_UNIPHY;
264 	case ENCODER_ID_INTERNAL_KLDSCP_LVTMA:
265 		return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA;
266 	case ENCODER_ID_INTERNAL_UNIPHY1:
267 		return ENCODER_OBJECT_ID_INTERNAL_UNIPHY1;
268 	case ENCODER_ID_INTERNAL_UNIPHY2:
269 		return ENCODER_OBJECT_ID_INTERNAL_UNIPHY2;
270 	case ENCODER_ID_INTERNAL_UNIPHY3:
271 		return ENCODER_OBJECT_ID_INTERNAL_UNIPHY3;
272 	case ENCODER_ID_INTERNAL_WIRELESS:
273 		return ENCODER_OBJECT_ID_INTERNAL_VCE;
274 	case ENCODER_ID_INTERNAL_VIRTUAL:
275 		return ENCODER_OBJECT_ID_NONE;
276 	case ENCODER_ID_UNKNOWN:
277 		return ENCODER_OBJECT_ID_NONE;
278 	default:
279 		/* Invalid encoder id */
280 		BREAK_TO_DEBUGGER();
281 		return ENCODER_OBJECT_ID_NONE;
282 	}
283 }
284