1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 7 #include "bus.h" 8 #include "debug.h" 9 #include "pci.h" 10 cnss_get_dev_bus_type(struct device * dev)11 enum cnss_dev_bus_type cnss_get_dev_bus_type(struct device *dev) 12 { 13 if (!dev) 14 return CNSS_BUS_NONE; 15 16 if (!dev->bus) 17 return CNSS_BUS_NONE; 18 19 if (memcmp(dev->bus->name, "pci", 3) == 0) 20 return CNSS_BUS_PCI; 21 else 22 return CNSS_BUS_NONE; 23 } 24 cnss_get_bus_type(struct cnss_plat_data * plat_priv)25 enum cnss_dev_bus_type cnss_get_bus_type(struct cnss_plat_data *plat_priv) 26 { 27 int ret; 28 struct device *dev; 29 u32 bus_type_dt = CNSS_BUS_NONE; 30 31 if (plat_priv->dt_type == CNSS_DTT_MULTIEXCHG) { 32 dev = &plat_priv->plat_dev->dev; 33 ret = of_property_read_u32(dev->of_node, "qcom,bus-type", 34 &bus_type_dt); 35 if (!ret) 36 if (bus_type_dt < CNSS_BUS_MAX) 37 cnss_pr_dbg("Got bus type[%u] from dt\n", 38 bus_type_dt); 39 else 40 bus_type_dt = CNSS_BUS_NONE; 41 else 42 cnss_pr_err("No bus type for multi-exchg dt\n"); 43 44 return bus_type_dt; 45 } 46 47 switch (plat_priv->device_id) { 48 case QCA6174_DEVICE_ID: 49 case QCA6290_DEVICE_ID: 50 case QCA6390_DEVICE_ID: 51 case QCN7605_DEVICE_ID: 52 case QCA6490_DEVICE_ID: 53 case KIWI_DEVICE_ID: 54 case MANGO_DEVICE_ID: 55 case PEACH_DEVICE_ID: 56 return CNSS_BUS_PCI; 57 default: 58 cnss_pr_err("Unknown device_id: 0x%lx\n", plat_priv->device_id); 59 return CNSS_BUS_NONE; 60 } 61 } 62 cnss_bus_dev_to_bus_priv(struct device * dev)63 void *cnss_bus_dev_to_bus_priv(struct device *dev) 64 { 65 if (!dev) 66 return NULL; 67 68 switch (cnss_get_dev_bus_type(dev)) { 69 case CNSS_BUS_PCI: 70 return cnss_get_pci_priv(to_pci_dev(dev)); 71 default: 72 return NULL; 73 } 74 } 75 cnss_bus_dev_to_plat_priv(struct device * dev)76 struct cnss_plat_data *cnss_bus_dev_to_plat_priv(struct device *dev) 77 { 78 void *bus_priv; 79 80 if (!dev) 81 return cnss_get_plat_priv(NULL); 82 83 bus_priv = cnss_bus_dev_to_bus_priv(dev); 84 if (!bus_priv) 85 return NULL; 86 87 switch (cnss_get_dev_bus_type(dev)) { 88 case CNSS_BUS_PCI: 89 return cnss_pci_priv_to_plat_priv(bus_priv); 90 default: 91 return NULL; 92 } 93 } 94 cnss_bus_init(struct cnss_plat_data * plat_priv)95 int cnss_bus_init(struct cnss_plat_data *plat_priv) 96 { 97 if (!plat_priv) 98 return -ENODEV; 99 100 switch (plat_priv->bus_type) { 101 case CNSS_BUS_PCI: 102 return cnss_pci_init(plat_priv); 103 default: 104 cnss_pr_err("Unsupported bus type: %d\n", 105 plat_priv->bus_type); 106 return -EINVAL; 107 } 108 } 109 cnss_bus_deinit(struct cnss_plat_data * plat_priv)110 void cnss_bus_deinit(struct cnss_plat_data *plat_priv) 111 { 112 if (!plat_priv) 113 return; 114 115 switch (plat_priv->bus_type) { 116 case CNSS_BUS_PCI: 117 return cnss_pci_deinit(plat_priv); 118 default: 119 cnss_pr_err("Unsupported bus type: %d\n", 120 plat_priv->bus_type); 121 return; 122 } 123 } 124 cnss_bus_add_fw_prefix_name(struct cnss_plat_data * plat_priv,char * prefix_name,char * name)125 void cnss_bus_add_fw_prefix_name(struct cnss_plat_data *plat_priv, 126 char *prefix_name, char *name) 127 { 128 if (!plat_priv) 129 return; 130 131 switch (plat_priv->bus_type) { 132 case CNSS_BUS_PCI: 133 return cnss_pci_add_fw_prefix_name(plat_priv->bus_priv, 134 prefix_name, name); 135 default: 136 cnss_pr_err("Unsupported bus type: %d\n", 137 plat_priv->bus_type); 138 return; 139 } 140 } 141 cnss_bus_load_tme_patch(struct cnss_plat_data * plat_priv)142 int cnss_bus_load_tme_patch(struct cnss_plat_data *plat_priv) 143 { 144 if (!plat_priv) 145 return -ENODEV; 146 147 switch (plat_priv->bus_type) { 148 case CNSS_BUS_PCI: 149 return cnss_pci_load_tme_patch(plat_priv->bus_priv); 150 default: 151 cnss_pr_err("Unsupported bus type: %d\n", 152 plat_priv->bus_type); 153 return -EINVAL; 154 } 155 } 156 cnss_bus_load_tme_opt_file(struct cnss_plat_data * plat_priv,enum wlfw_tme_lite_file_type_v01 file)157 int cnss_bus_load_tme_opt_file(struct cnss_plat_data *plat_priv, 158 enum wlfw_tme_lite_file_type_v01 file) 159 { 160 if (!plat_priv) 161 return -ENODEV; 162 163 switch (plat_priv->bus_type) { 164 case CNSS_BUS_PCI: 165 return cnss_pci_load_tme_opt_file(plat_priv->bus_priv, file); 166 default: 167 cnss_pr_err("Unsupported bus type: %d\n", 168 plat_priv->bus_type); 169 return -EINVAL; 170 } 171 } 172 cnss_bus_load_m3(struct cnss_plat_data * plat_priv)173 int cnss_bus_load_m3(struct cnss_plat_data *plat_priv) 174 { 175 if (!plat_priv) 176 return -ENODEV; 177 178 switch (plat_priv->bus_type) { 179 case CNSS_BUS_PCI: 180 return cnss_pci_load_m3(plat_priv->bus_priv); 181 default: 182 cnss_pr_err("Unsupported bus type: %d\n", 183 plat_priv->bus_type); 184 return -EINVAL; 185 } 186 } 187 cnss_bus_load_aux(struct cnss_plat_data * plat_priv)188 int cnss_bus_load_aux(struct cnss_plat_data *plat_priv) 189 { 190 if (!plat_priv) 191 return -ENODEV; 192 193 switch (plat_priv->bus_type) { 194 case CNSS_BUS_PCI: 195 return cnss_pci_load_aux(plat_priv->bus_priv); 196 default: 197 cnss_pr_err("Unsupported bus type: %d\n", 198 plat_priv->bus_type); 199 return -EINVAL; 200 } 201 } 202 cnss_bus_handle_dev_sol_irq(struct cnss_plat_data * plat_priv)203 int cnss_bus_handle_dev_sol_irq(struct cnss_plat_data *plat_priv) 204 { 205 if (!plat_priv) 206 return -ENODEV; 207 208 switch (plat_priv->bus_type) { 209 case CNSS_BUS_PCI: 210 return cnss_pci_handle_dev_sol_irq(plat_priv->bus_priv); 211 default: 212 cnss_pr_err("Unsupported bus type: %d\n", 213 plat_priv->bus_type); 214 return -EINVAL; 215 } 216 } 217 cnss_bus_alloc_fw_mem(struct cnss_plat_data * plat_priv)218 int cnss_bus_alloc_fw_mem(struct cnss_plat_data *plat_priv) 219 { 220 if (!plat_priv) 221 return -ENODEV; 222 223 switch (plat_priv->bus_type) { 224 case CNSS_BUS_PCI: 225 return cnss_pci_alloc_fw_mem(plat_priv->bus_priv); 226 default: 227 cnss_pr_err("Unsupported bus type: %d\n", 228 plat_priv->bus_type); 229 return -EINVAL; 230 } 231 } 232 cnss_bus_alloc_qdss_mem(struct cnss_plat_data * plat_priv)233 int cnss_bus_alloc_qdss_mem(struct cnss_plat_data *plat_priv) 234 { 235 if (!plat_priv) 236 return -ENODEV; 237 238 switch (plat_priv->bus_type) { 239 case CNSS_BUS_PCI: 240 return cnss_pci_alloc_qdss_mem(plat_priv->bus_priv); 241 default: 242 cnss_pr_err("Unsupported bus type: %d\n", 243 plat_priv->bus_type); 244 return -EINVAL; 245 } 246 } 247 cnss_bus_free_qdss_mem(struct cnss_plat_data * plat_priv)248 void cnss_bus_free_qdss_mem(struct cnss_plat_data *plat_priv) 249 { 250 if (!plat_priv) 251 return; 252 253 switch (plat_priv->bus_type) { 254 case CNSS_BUS_PCI: 255 cnss_pci_free_qdss_mem(plat_priv->bus_priv); 256 return; 257 default: 258 cnss_pr_err("Unsupported bus type: %d\n", 259 plat_priv->bus_type); 260 return; 261 } 262 } 263 cnss_bus_get_wake_irq(struct cnss_plat_data * plat_priv)264 u32 cnss_bus_get_wake_irq(struct cnss_plat_data *plat_priv) 265 { 266 if (!plat_priv) 267 return -ENODEV; 268 269 switch (plat_priv->bus_type) { 270 case CNSS_BUS_PCI: 271 return cnss_pci_get_wake_msi(plat_priv->bus_priv); 272 default: 273 cnss_pr_err("Unsupported bus type: %d\n", 274 plat_priv->bus_type); 275 return -EINVAL; 276 } 277 } 278 cnss_bus_force_fw_assert_hdlr(struct cnss_plat_data * plat_priv)279 int cnss_bus_force_fw_assert_hdlr(struct cnss_plat_data *plat_priv) 280 { 281 if (!plat_priv) 282 return -ENODEV; 283 284 switch (plat_priv->bus_type) { 285 case CNSS_BUS_PCI: 286 return cnss_pci_force_fw_assert_hdlr(plat_priv->bus_priv); 287 default: 288 cnss_pr_err("Unsupported bus type: %d\n", 289 plat_priv->bus_type); 290 return -EINVAL; 291 } 292 } 293 cnss_bus_qmi_send_get(struct cnss_plat_data * plat_priv)294 int cnss_bus_qmi_send_get(struct cnss_plat_data *plat_priv) 295 { 296 if (!plat_priv) 297 return -ENODEV; 298 299 switch (plat_priv->bus_type) { 300 case CNSS_BUS_PCI: 301 return cnss_pci_qmi_send_get(plat_priv->bus_priv); 302 default: 303 cnss_pr_err("Unsupported bus type: %d\n", 304 plat_priv->bus_type); 305 return -EINVAL; 306 } 307 } 308 cnss_bus_qmi_send_put(struct cnss_plat_data * plat_priv)309 int cnss_bus_qmi_send_put(struct cnss_plat_data *plat_priv) 310 { 311 if (!plat_priv) 312 return -ENODEV; 313 314 switch (plat_priv->bus_type) { 315 case CNSS_BUS_PCI: 316 return cnss_pci_qmi_send_put(plat_priv->bus_priv); 317 default: 318 cnss_pr_err("Unsupported bus type: %d\n", 319 plat_priv->bus_type); 320 return -EINVAL; 321 } 322 } 323 cnss_bus_fw_boot_timeout_hdlr(struct timer_list * t)324 void cnss_bus_fw_boot_timeout_hdlr(struct timer_list *t) 325 { 326 struct cnss_plat_data *plat_priv = 327 from_timer(plat_priv, t, fw_boot_timer); 328 329 if (!plat_priv) 330 return; 331 332 switch (plat_priv->bus_type) { 333 case CNSS_BUS_PCI: 334 return cnss_pci_fw_boot_timeout_hdlr(plat_priv->bus_priv); 335 default: 336 cnss_pr_err("Unsupported bus type: %d\n", 337 plat_priv->bus_type); 338 return; 339 } 340 } 341 cnss_bus_collect_dump_info(struct cnss_plat_data * plat_priv,bool in_panic)342 void cnss_bus_collect_dump_info(struct cnss_plat_data *plat_priv, bool in_panic) 343 { 344 if (!plat_priv) 345 return; 346 347 switch (plat_priv->bus_type) { 348 case CNSS_BUS_PCI: 349 return cnss_pci_collect_dump_info(plat_priv->bus_priv, 350 in_panic); 351 default: 352 cnss_pr_err("Unsupported bus type: %d\n", 353 plat_priv->bus_type); 354 return; 355 } 356 } 357 cnss_bus_device_crashed(struct cnss_plat_data * plat_priv)358 void cnss_bus_device_crashed(struct cnss_plat_data *plat_priv) 359 { 360 if (!plat_priv) 361 return; 362 363 switch (plat_priv->bus_type) { 364 case CNSS_BUS_PCI: 365 return cnss_pci_device_crashed(plat_priv->bus_priv); 366 default: 367 cnss_pr_err("Unsupported bus type: %d\n", 368 plat_priv->bus_type); 369 return; 370 } 371 } 372 cnss_bus_call_driver_probe(struct cnss_plat_data * plat_priv)373 int cnss_bus_call_driver_probe(struct cnss_plat_data *plat_priv) 374 { 375 if (!plat_priv) 376 return -ENODEV; 377 378 switch (plat_priv->bus_type) { 379 case CNSS_BUS_PCI: 380 return cnss_pci_call_driver_probe(plat_priv->bus_priv); 381 default: 382 cnss_pr_err("Unsupported bus type: %d\n", 383 plat_priv->bus_type); 384 return -EINVAL; 385 } 386 } 387 cnss_bus_call_driver_remove(struct cnss_plat_data * plat_priv)388 int cnss_bus_call_driver_remove(struct cnss_plat_data *plat_priv) 389 { 390 if (!plat_priv) 391 return -ENODEV; 392 393 switch (plat_priv->bus_type) { 394 case CNSS_BUS_PCI: 395 return cnss_pci_call_driver_remove(plat_priv->bus_priv); 396 default: 397 cnss_pr_err("Unsupported bus type: %d\n", 398 plat_priv->bus_type); 399 return -EINVAL; 400 } 401 } 402 cnss_bus_dev_powerup(struct cnss_plat_data * plat_priv)403 int cnss_bus_dev_powerup(struct cnss_plat_data *plat_priv) 404 { 405 if (!plat_priv) 406 return -ENODEV; 407 408 switch (plat_priv->bus_type) { 409 case CNSS_BUS_PCI: 410 return cnss_pci_dev_powerup(plat_priv->bus_priv); 411 default: 412 cnss_pr_err("Unsupported bus type: %d\n", 413 plat_priv->bus_type); 414 return -EINVAL; 415 } 416 } 417 cnss_bus_dev_shutdown(struct cnss_plat_data * plat_priv)418 int cnss_bus_dev_shutdown(struct cnss_plat_data *plat_priv) 419 { 420 if (!plat_priv) 421 return -ENODEV; 422 423 switch (plat_priv->bus_type) { 424 case CNSS_BUS_PCI: 425 return cnss_pci_dev_shutdown(plat_priv->bus_priv); 426 default: 427 cnss_pr_err("Unsupported bus type: %d\n", 428 plat_priv->bus_type); 429 return -EINVAL; 430 } 431 } 432 cnss_bus_dev_crash_shutdown(struct cnss_plat_data * plat_priv)433 int cnss_bus_dev_crash_shutdown(struct cnss_plat_data *plat_priv) 434 { 435 if (!plat_priv) 436 return -ENODEV; 437 438 switch (plat_priv->bus_type) { 439 case CNSS_BUS_PCI: 440 return cnss_pci_dev_crash_shutdown(plat_priv->bus_priv); 441 default: 442 cnss_pr_err("Unsupported bus type: %d\n", 443 plat_priv->bus_type); 444 return -EINVAL; 445 } 446 } 447 cnss_bus_dev_ramdump(struct cnss_plat_data * plat_priv)448 int cnss_bus_dev_ramdump(struct cnss_plat_data *plat_priv) 449 { 450 if (!plat_priv) 451 return -ENODEV; 452 453 switch (plat_priv->bus_type) { 454 case CNSS_BUS_PCI: 455 return cnss_pci_dev_ramdump(plat_priv->bus_priv); 456 default: 457 cnss_pr_err("Unsupported bus type: %d\n", 458 plat_priv->bus_type); 459 return -EINVAL; 460 } 461 } 462 cnss_bus_register_driver_hdlr(struct cnss_plat_data * plat_priv,void * data)463 int cnss_bus_register_driver_hdlr(struct cnss_plat_data *plat_priv, void *data) 464 { 465 if (!plat_priv) 466 return -ENODEV; 467 468 switch (plat_priv->bus_type) { 469 case CNSS_BUS_PCI: 470 return cnss_pci_register_driver_hdlr(plat_priv->bus_priv, data); 471 default: 472 cnss_pr_err("Unsupported bus type: %d\n", 473 plat_priv->bus_type); 474 return -EINVAL; 475 } 476 } 477 cnss_bus_runtime_pm_get_sync(struct cnss_plat_data * plat_priv)478 int cnss_bus_runtime_pm_get_sync(struct cnss_plat_data *plat_priv) 479 { 480 if (!plat_priv) 481 return -ENODEV; 482 483 switch (plat_priv->bus_type) { 484 case CNSS_BUS_PCI: 485 return cnss_pci_pm_runtime_get_sync(plat_priv->bus_priv, RTPM_ID_CNSS); 486 default: 487 cnss_pr_err("Unsupported bus type: %d\n", 488 plat_priv->bus_type); 489 return -EINVAL; 490 } 491 } 492 cnss_bus_runtime_pm_put(struct cnss_plat_data * plat_priv)493 void cnss_bus_runtime_pm_put(struct cnss_plat_data *plat_priv) 494 { 495 if (!plat_priv) 496 return; 497 498 switch (plat_priv->bus_type) { 499 case CNSS_BUS_PCI: 500 cnss_pci_pm_runtime_mark_last_busy(plat_priv->bus_priv); 501 cnss_pci_pm_runtime_put_autosuspend(plat_priv->bus_priv, RTPM_ID_CNSS); 502 break; 503 default: 504 cnss_pr_err("Unsupported bus type: %d\n", 505 plat_priv->bus_type); 506 } 507 } 508 cnss_bus_unregister_driver_hdlr(struct cnss_plat_data * plat_priv)509 int cnss_bus_unregister_driver_hdlr(struct cnss_plat_data *plat_priv) 510 { 511 if (!plat_priv) 512 return -ENODEV; 513 514 switch (plat_priv->bus_type) { 515 case CNSS_BUS_PCI: 516 return cnss_pci_unregister_driver_hdlr(plat_priv->bus_priv); 517 default: 518 cnss_pr_err("Unsupported bus type: %d\n", 519 plat_priv->bus_type); 520 return -EINVAL; 521 } 522 } 523 cnss_bus_call_driver_modem_status(struct cnss_plat_data * plat_priv,int modem_current_status)524 int cnss_bus_call_driver_modem_status(struct cnss_plat_data *plat_priv, 525 int modem_current_status) 526 { 527 if (!plat_priv) 528 return -ENODEV; 529 530 switch (plat_priv->bus_type) { 531 case CNSS_BUS_PCI: 532 return cnss_pci_call_driver_modem_status(plat_priv->bus_priv, 533 modem_current_status); 534 default: 535 cnss_pr_err("Unsupported bus type: %d\n", 536 plat_priv->bus_type); 537 return -EINVAL; 538 } 539 } 540 cnss_bus_update_status(struct cnss_plat_data * plat_priv,enum cnss_driver_status status)541 int cnss_bus_update_status(struct cnss_plat_data *plat_priv, 542 enum cnss_driver_status status) 543 { 544 if (!plat_priv) 545 return -ENODEV; 546 547 switch (plat_priv->bus_type) { 548 case CNSS_BUS_PCI: 549 return cnss_pci_update_status(plat_priv->bus_priv, status); 550 default: 551 cnss_pr_err("Unsupported bus type: %d\n", 552 plat_priv->bus_type); 553 return -EINVAL; 554 } 555 } 556 cnss_bus_update_uevent(struct cnss_plat_data * plat_priv,enum cnss_driver_status status,void * data)557 int cnss_bus_update_uevent(struct cnss_plat_data *plat_priv, 558 enum cnss_driver_status status, void *data) 559 { 560 if (!plat_priv) 561 return -ENODEV; 562 563 switch (plat_priv->bus_type) { 564 case CNSS_BUS_PCI: 565 return cnss_pci_call_driver_uevent(plat_priv->bus_priv, 566 status, data); 567 default: 568 cnss_pr_err("Unsupported bus type: %d\n", 569 plat_priv->bus_type); 570 return -EINVAL; 571 } 572 } 573 cnss_bus_is_device_down(struct cnss_plat_data * plat_priv)574 int cnss_bus_is_device_down(struct cnss_plat_data *plat_priv) 575 { 576 if (!plat_priv) 577 return -ENODEV; 578 579 switch (plat_priv->bus_type) { 580 case CNSS_BUS_PCI: 581 return cnss_pcie_is_device_down(plat_priv->bus_priv); 582 default: 583 cnss_pr_dbg("Unsupported bus type: %d\n", 584 plat_priv->bus_type); 585 return 0; 586 } 587 } 588 cnss_bus_shutdown_cleanup(struct cnss_plat_data * plat_priv)589 int cnss_bus_shutdown_cleanup(struct cnss_plat_data *plat_priv) 590 { 591 if (!plat_priv) 592 return -ENODEV; 593 594 switch (plat_priv->bus_type) { 595 case CNSS_BUS_PCI: 596 return cnss_pci_shutdown_cleanup(plat_priv->bus_priv); 597 default: 598 cnss_pr_dbg("Unsupported bus type: %d\n", 599 plat_priv->bus_type); 600 return 0; 601 } 602 } 603 cnss_bus_check_link_status(struct cnss_plat_data * plat_priv)604 int cnss_bus_check_link_status(struct cnss_plat_data *plat_priv) 605 { 606 if (!plat_priv) 607 return -ENODEV; 608 609 switch (plat_priv->bus_type) { 610 case CNSS_BUS_PCI: 611 return cnss_pci_check_link_status(plat_priv->bus_priv); 612 default: 613 cnss_pr_dbg("Unsupported bus type: %d\n", 614 plat_priv->bus_type); 615 return 0; 616 } 617 } 618 cnss_bus_recover_link_down(struct cnss_plat_data * plat_priv)619 int cnss_bus_recover_link_down(struct cnss_plat_data *plat_priv) 620 { 621 if (!plat_priv) 622 return -ENODEV; 623 624 switch (plat_priv->bus_type) { 625 case CNSS_BUS_PCI: 626 return cnss_pci_recover_link_down(plat_priv->bus_priv); 627 default: 628 cnss_pr_dbg("Unsupported bus type: %d\n", 629 plat_priv->bus_type); 630 return -EINVAL; 631 } 632 } 633 cnss_bus_debug_reg_read(struct cnss_plat_data * plat_priv,u32 offset,u32 * val,bool raw_access)634 int cnss_bus_debug_reg_read(struct cnss_plat_data *plat_priv, u32 offset, 635 u32 *val, bool raw_access) 636 { 637 if (!plat_priv) 638 return -ENODEV; 639 640 switch (plat_priv->bus_type) { 641 case CNSS_BUS_PCI: 642 return cnss_pci_debug_reg_read(plat_priv->bus_priv, offset, 643 val, raw_access); 644 default: 645 cnss_pr_dbg("Unsupported bus type: %d\n", 646 plat_priv->bus_type); 647 return 0; 648 } 649 } 650 cnss_bus_debug_reg_write(struct cnss_plat_data * plat_priv,u32 offset,u32 val,bool raw_access)651 int cnss_bus_debug_reg_write(struct cnss_plat_data *plat_priv, u32 offset, 652 u32 val, bool raw_access) 653 { 654 if (!plat_priv) 655 return -ENODEV; 656 657 switch (plat_priv->bus_type) { 658 case CNSS_BUS_PCI: 659 return cnss_pci_debug_reg_write(plat_priv->bus_priv, offset, 660 val, raw_access); 661 default: 662 cnss_pr_dbg("Unsupported bus type: %d\n", 663 plat_priv->bus_type); 664 return 0; 665 } 666 } 667 cnss_bus_get_iova(struct cnss_plat_data * plat_priv,u64 * addr,u64 * size)668 int cnss_bus_get_iova(struct cnss_plat_data *plat_priv, u64 *addr, u64 *size) 669 { 670 if (!plat_priv) 671 return -ENODEV; 672 673 switch (plat_priv->bus_type) { 674 case CNSS_BUS_PCI: 675 return cnss_pci_get_iova(plat_priv->bus_priv, addr, size); 676 default: 677 cnss_pr_err("Unsupported bus type: %d\n", 678 plat_priv->bus_type); 679 return -EINVAL; 680 } 681 } 682 cnss_bus_get_iova_ipa(struct cnss_plat_data * plat_priv,u64 * addr,u64 * size)683 int cnss_bus_get_iova_ipa(struct cnss_plat_data *plat_priv, u64 *addr, 684 u64 *size) 685 { 686 if (!plat_priv) 687 return -ENODEV; 688 689 switch (plat_priv->bus_type) { 690 case CNSS_BUS_PCI: 691 return cnss_pci_get_iova_ipa(plat_priv->bus_priv, addr, size); 692 default: 693 cnss_pr_err("Unsupported bus type: %d\n", 694 plat_priv->bus_type); 695 return -EINVAL; 696 } 697 } 698 cnss_bus_is_smmu_s1_enabled(struct cnss_plat_data * plat_priv)699 bool cnss_bus_is_smmu_s1_enabled(struct cnss_plat_data *plat_priv) 700 { 701 if (!plat_priv) 702 return false; 703 704 switch (plat_priv->bus_type) { 705 case CNSS_BUS_PCI: 706 return cnss_pci_is_smmu_s1_enabled(plat_priv->bus_priv); 707 default: 708 cnss_pr_err("Unsupported bus type: %d\n", 709 plat_priv->bus_type); 710 return false; 711 } 712 } 713 cnss_bus_update_time_sync_period(struct cnss_plat_data * plat_priv,unsigned int time_sync_period)714 int cnss_bus_update_time_sync_period(struct cnss_plat_data *plat_priv, 715 unsigned int time_sync_period) 716 { 717 if (!plat_priv) 718 return -ENODEV; 719 720 switch (plat_priv->bus_type) { 721 case CNSS_BUS_PCI: 722 return cnss_pci_update_time_sync_period(plat_priv->bus_priv, 723 time_sync_period); 724 default: 725 cnss_pr_err("Unsupported bus type: %d\n", 726 plat_priv->bus_type); 727 return -EINVAL; 728 } 729 } 730 cnss_bus_set_therm_cdev_state(struct cnss_plat_data * plat_priv,unsigned long thermal_state,int tcdev_id)731 int cnss_bus_set_therm_cdev_state(struct cnss_plat_data *plat_priv, 732 unsigned long thermal_state, 733 int tcdev_id) 734 { 735 if (!plat_priv) 736 return -ENODEV; 737 738 switch (plat_priv->bus_type) { 739 case CNSS_BUS_PCI: 740 return cnss_pci_set_therm_cdev_state(plat_priv->bus_priv, 741 thermal_state, 742 tcdev_id); 743 default: 744 cnss_pr_err("Unsupported bus type: %d\n", plat_priv->bus_type); 745 return -EINVAL; 746 } 747 } 748 cnss_bus_get_msi_assignment(struct cnss_plat_data * plat_priv,char * msi_name,int * num_vectors,u32 * user_base_data,u32 * base_vector)749 int cnss_bus_get_msi_assignment(struct cnss_plat_data *plat_priv, 750 char *msi_name, 751 int *num_vectors, 752 u32 *user_base_data, 753 u32 *base_vector) 754 { 755 if (!plat_priv) 756 return -ENODEV; 757 758 switch (plat_priv->bus_type) { 759 case CNSS_BUS_PCI: 760 return cnss_pci_get_user_msi_assignment(plat_priv->bus_priv, 761 msi_name, 762 num_vectors, 763 user_base_data, 764 base_vector); 765 default: 766 cnss_pr_err("Unsupported bus type: %d\n", plat_priv->bus_type); 767 return -EINVAL; 768 } 769 } 770 771 #if IS_ENABLED(CONFIG_MHI_BUS_MISC) cnss_bus_disable_mhi_satellite_cfg(struct cnss_plat_data * plat_priv)772 void cnss_bus_disable_mhi_satellite_cfg(struct cnss_plat_data *plat_priv) 773 { 774 struct cnss_pci_data *pci_priv; 775 776 pci_priv = plat_priv->bus_priv; 777 if (!pci_priv) { 778 cnss_pr_err("mhi satellite could not be disabled since pci_priv is NULL\n"); 779 return; 780 } 781 782 switch (plat_priv->bus_type) { 783 case CNSS_BUS_PCI: 784 /* MHI satellite configuration is only for KIWI V2 and 785 * that too only in DRV mode. 786 */ 787 if (plat_priv->device_id == KIWI_DEVICE_ID && 788 plat_priv->device_version.major_version == FW_V2_NUMBER) { 789 cnss_pr_dbg("Remove MHI satellite configuration\n"); 790 return cnss_mhi_controller_set_base(pci_priv, 0); 791 } 792 break; 793 default: 794 cnss_pr_dbg("Unsupported bus type: %d, ignore disable mhi satellite cfg\n", 795 plat_priv->bus_type); 796 return; 797 } 798 799 return; 800 } 801 #else cnss_bus_disable_mhi_satellite_cfg(struct cnss_plat_data * pci_priv)802 void cnss_bus_disable_mhi_satellite_cfg(struct cnss_plat_data *pci_priv) 803 { 804 } 805 #endif 806