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Searched defs:UVD_VCPU_CNTL__PRB_TIMEOUT_VAL__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_3_1_sh_mask.h558 #define UVD_VCPU_CNTL__PRB_TIMEOUT_VAL__SHIFT 0x14 macro
Duvd_4_0_sh_mask.h781 #define UVD_VCPU_CNTL__PRB_TIMEOUT_VAL__SHIFT 0x00000014 macro
Duvd_4_2_sh_mask.h562 #define UVD_VCPU_CNTL__PRB_TIMEOUT_VAL__SHIFT 0x14 macro
Duvd_5_0_sh_mask.h596 #define UVD_VCPU_CNTL__PRB_TIMEOUT_VAL__SHIFT 0x14 macro
Duvd_6_0_sh_mask.h598 #define UVD_VCPU_CNTL__PRB_TIMEOUT_VAL__SHIFT 0x14 macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h1186 #define UVD_VCPU_CNTL__PRB_TIMEOUT_VAL__SHIFT … macro
Dvcn_2_5_sh_mask.h2752 #define UVD_VCPU_CNTL__PRB_TIMEOUT_VAL__SHIFT … macro
Dvcn_2_0_0_sh_mask.h2750 #define UVD_VCPU_CNTL__PRB_TIMEOUT_VAL__SHIFT … macro
Dvcn_2_6_0_sh_mask.h105 #define UVD_VCPU_CNTL__PRB_TIMEOUT_VAL__SHIFT … macro
Dvcn_3_0_0_sh_mask.h3810 #define UVD_VCPU_CNTL__PRB_TIMEOUT_VAL__SHIFT … macro
Dvcn_5_0_0_sh_mask.h3756 #define UVD_VCPU_CNTL__PRB_TIMEOUT_VAL__SHIFT … macro
Dvcn_4_0_5_sh_mask.h3923 #define UVD_VCPU_CNTL__PRB_TIMEOUT_VAL__SHIFT … macro
Dvcn_4_0_0_sh_mask.h4056 #define UVD_VCPU_CNTL__PRB_TIMEOUT_VAL__SHIFT … macro
Dvcn_4_0_3_sh_mask.h4093 #define UVD_VCPU_CNTL__PRB_TIMEOUT_VAL__SHIFT … macro