1 /*
2  * Copyright 2018-2022 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23 #ifndef _TA_XGMI_IF_H
24 #define _TA_XGMI_IF_H
25 
26 /* Responses have bit 31 set */
27 #define RSP_ID_MASK (1U << 31)
28 #define RSP_ID(cmdId) (((uint32_t)(cmdId)) | RSP_ID_MASK)
29 
30 #define EXTEND_PEER_LINK_INFO_CMD_FLAG 1
31 
32 enum ta_command_xgmi {
33 	/* Initialize the Context and Session Topology */
34 	TA_COMMAND_XGMI__INITIALIZE			= 0x00,
35 	/* Gets the current GPU's node ID */
36 	TA_COMMAND_XGMI__GET_NODE_ID			= 0x01,
37 	/* Gets the current GPU's hive ID */
38 	TA_COMMAND_XGMI__GET_HIVE_ID			= 0x02,
39 	/* Gets the Peer's topology Information */
40 	TA_COMMAND_XGMI__GET_TOPOLOGY_INFO		= 0x03,
41 	/* Sets the Peer's topology Information */
42 	TA_COMMAND_XGMI__SET_TOPOLOGY_INFO		= 0x04,
43 	/* Gets the total links between adjacent peer dies in hive */
44 	TA_COMMAND_XGMI__GET_PEER_LINKS			= 0x0B,
45 	/* Gets the total links and connected port numbers between adjacent peer dies in hive */
46 	TA_COMMAND_XGMI__GET_EXTEND_PEER_LINKS		= 0x0C
47 };
48 
49 /* XGMI related enumerations */
50 /**********************************************************/;
51 enum { TA_XGMI__MAX_CONNECTED_NODES = 64 };
52 enum { TA_XGMI__MAX_INTERNAL_STATE = 32 };
53 enum { TA_XGMI__MAX_INTERNAL_STATE_BUFFER = 128 };
54 enum { TA_XGMI__MAX_PORT_NUM = 8 };
55 
56 enum ta_xgmi_status {
57 	TA_XGMI_STATUS__SUCCESS				= 0x00,
58 	TA_XGMI_STATUS__GENERIC_FAILURE			= 0x01,
59 	TA_XGMI_STATUS__NULL_POINTER			= 0x02,
60 	TA_XGMI_STATUS__INVALID_PARAMETER		= 0x03,
61 	TA_XGMI_STATUS__NOT_INITIALIZED			= 0x04,
62 	TA_XGMI_STATUS__INVALID_NODE_NUM		= 0x05,
63 	TA_XGMI_STATUS__INVALID_NODE_ID			= 0x06,
64 	TA_XGMI_STATUS__INVALID_TOPOLOGY		= 0x07,
65 	TA_XGMI_STATUS__FAILED_ID_GEN			= 0x08,
66 	TA_XGMI_STATUS__FAILED_TOPOLOGY_INIT		= 0x09,
67 	TA_XGMI_STATUS__SET_SHARING_ERROR		= 0x0A
68 };
69 
70 enum ta_xgmi_assigned_sdma_engine {
71 	TA_XGMI_ASSIGNED_SDMA_ENGINE__NOT_ASSIGNED	= -1,
72 	TA_XGMI_ASSIGNED_SDMA_ENGINE__SDMA0		= 0,
73 	TA_XGMI_ASSIGNED_SDMA_ENGINE__SDMA1		= 1,
74 	TA_XGMI_ASSIGNED_SDMA_ENGINE__SDMA2		= 2,
75 	TA_XGMI_ASSIGNED_SDMA_ENGINE__SDMA3		= 3,
76 	TA_XGMI_ASSIGNED_SDMA_ENGINE__SDMA4		= 4,
77 	TA_XGMI_ASSIGNED_SDMA_ENGINE__SDMA5		= 5
78 };
79 
80 /* input/output structures for XGMI commands */
81 /**********************************************************/
82 struct ta_xgmi_node_info {
83 	uint64_t				node_id;
84 	uint8_t					num_hops;
85 	uint8_t					is_sharing_enabled;
86 	enum ta_xgmi_assigned_sdma_engine	sdma_engine;
87 };
88 
89 struct ta_xgmi_peer_link_info {
90 	uint64_t				node_id;
91 	uint8_t					num_links;
92 };
93 
94 struct xgmi_connected_port_num {
95 	uint8_t		dst_xgmi_port_num;
96 	uint8_t		src_xgmi_port_num;
97 };
98 
99 /* support both the port num and num_links */
100 struct ta_xgmi_extend_peer_link_info {
101 	uint64_t				node_id;
102 	uint8_t					num_links;
103 	struct xgmi_connected_port_num		port_num[TA_XGMI__MAX_PORT_NUM];
104 };
105 
106 struct ta_xgmi_cmd_initialize_output {
107 	uint32_t	status;
108 };
109 
110 struct ta_xgmi_cmd_get_node_id_output {
111 	uint64_t	node_id;
112 };
113 
114 struct ta_xgmi_cmd_get_hive_id_output {
115 	uint64_t	hive_id;
116 };
117 
118 struct ta_xgmi_cmd_get_topology_info_input {
119 	uint32_t			num_nodes;
120 	struct ta_xgmi_node_info	nodes[TA_XGMI__MAX_CONNECTED_NODES];
121 };
122 
123 struct ta_xgmi_cmd_get_topology_info_output {
124 	uint32_t			num_nodes;
125 	struct ta_xgmi_node_info	nodes[TA_XGMI__MAX_CONNECTED_NODES];
126 };
127 
128 struct ta_xgmi_cmd_set_topology_info_input {
129 	uint32_t			num_nodes;
130 	struct ta_xgmi_node_info	nodes[TA_XGMI__MAX_CONNECTED_NODES];
131 };
132 
133 /* support XGMI TA w/ and w/o port_num both so two similar structs defined */
134 struct ta_xgmi_cmd_get_peer_link_info {
135 	uint32_t			num_nodes;
136 	struct ta_xgmi_peer_link_info	nodes[TA_XGMI__MAX_CONNECTED_NODES];
137 };
138 
139 struct ta_xgmi_cmd_get_extend_peer_link_info {
140 	uint32_t				num_nodes;
141 	struct ta_xgmi_extend_peer_link_info nodes[TA_XGMI__MAX_CONNECTED_NODES];
142 };
143 /**********************************************************/
144 /* Common input structure for XGMI callbacks */
145 union ta_xgmi_cmd_input {
146 	struct ta_xgmi_cmd_get_topology_info_input	get_topology_info;
147 	struct ta_xgmi_cmd_set_topology_info_input	set_topology_info;
148 };
149 
150 /* Common output structure for XGMI callbacks */
151 union ta_xgmi_cmd_output {
152 	struct ta_xgmi_cmd_initialize_output		initialize;
153 	struct ta_xgmi_cmd_get_node_id_output		get_node_id;
154 	struct ta_xgmi_cmd_get_hive_id_output		get_hive_id;
155 	struct ta_xgmi_cmd_get_topology_info_output	get_topology_info;
156 	struct ta_xgmi_cmd_get_peer_link_info		get_link_info;
157 	struct ta_xgmi_cmd_get_extend_peer_link_info	get_extend_link_info;
158 };
159 
160 struct ta_xgmi_shared_memory {
161 	uint32_t			cmd_id;
162 	uint32_t			resp_id;
163 	enum ta_xgmi_status		xgmi_status;
164 
165 	/* if the number of xgmi link record is more than 128, driver will set the
166 	 * flag 0 to get the first 128 of the link records and will set to 1, to get
167 	 * the second set
168 	 */
169 	uint8_t				flag_extend_link_record;
170 	/* bit0: port_num info support flag for GET_EXTEND_PEER_LINKS commmand */
171 	uint8_t				caps_flag;
172 	uint8_t				reserved[2];
173 	union ta_xgmi_cmd_input		xgmi_in_message;
174 	union ta_xgmi_cmd_output	xgmi_out_message;
175 };
176 
177 #endif   //_TA_XGMI_IF_H
178