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Searched defs:SDMA0_RLC0_RB_CNTL__RB_PRIV__SHIFT (Results 1 – 11 of 11) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/sdma0/
Dsdma0_4_1_sh_mask.h1292 #define SDMA0_RLC0_RB_CNTL__RB_PRIV__SHIFT macro
Dsdma0_4_0_sh_mask.h1486 #define SDMA0_RLC0_RB_CNTL__RB_PRIV__SHIFT 0x17 macro
Dsdma0_4_2_sh_mask.h1494 #define SDMA0_RLC0_RB_CNTL__RB_PRIV__SHIFT macro
Dsdma0_4_2_2_sh_mask.h1504 #define SDMA0_RLC0_RB_CNTL__RB_PRIV__SHIFT macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_0_sh_mask.h1170 #define SDMA0_RLC0_RB_CNTL__RB_PRIV__SHIFT 0x17 macro
Doss_2_4_sh_mask.h1290 #define SDMA0_RLC0_RB_CNTL__RB_PRIV__SHIFT 0x17 macro
Doss_3_0_1_sh_mask.h1738 #define SDMA0_RLC0_RB_CNTL__RB_PRIV__SHIFT 0x17 macro
Doss_3_0_sh_mask.h2054 #define SDMA0_RLC0_RB_CNTL__RB_PRIV__SHIFT 0x17 macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/sdma/
Dsdma_4_4_0_sh_mask.h1288 #define SDMA0_RLC0_RB_CNTL__RB_PRIV__SHIFT macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_sh_mask.h1276 #define SDMA0_RLC0_RB_CNTL__RB_PRIV__SHIFT macro
Dgc_10_3_0_sh_mask.h1305 #define SDMA0_RLC0_RB_CNTL__RB_PRIV__SHIFT macro