1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * S390 version
4 * Copyright IBM Corp. 1999, 2000
5 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 */
7 #ifndef _S390_PTRACE_H
8 #define _S390_PTRACE_H
9
10 #include <linux/bits.h>
11 #include <uapi/asm/ptrace.h>
12 #include <asm/tpi.h>
13
14 #define PIF_SYSCALL 0 /* inside a system call */
15 #define PIF_EXECVE_PGSTE_RESTART 1 /* restart execve for PGSTE binaries */
16 #define PIF_SYSCALL_RET_SET 2 /* return value was set via ptrace */
17 #define PIF_FTRACE_FULL_REGS 4 /* all register contents valid (ftrace) */
18
19 #define _PIF_SYSCALL BIT(PIF_SYSCALL)
20 #define _PIF_EXECVE_PGSTE_RESTART BIT(PIF_EXECVE_PGSTE_RESTART)
21 #define _PIF_SYSCALL_RET_SET BIT(PIF_SYSCALL_RET_SET)
22 #define _PIF_FTRACE_FULL_REGS BIT(PIF_FTRACE_FULL_REGS)
23
24 #define PSW32_MASK_PER _AC(0x40000000, UL)
25 #define PSW32_MASK_DAT _AC(0x04000000, UL)
26 #define PSW32_MASK_IO _AC(0x02000000, UL)
27 #define PSW32_MASK_EXT _AC(0x01000000, UL)
28 #define PSW32_MASK_KEY _AC(0x00F00000, UL)
29 #define PSW32_MASK_BASE _AC(0x00080000, UL) /* Always one */
30 #define PSW32_MASK_MCHECK _AC(0x00040000, UL)
31 #define PSW32_MASK_WAIT _AC(0x00020000, UL)
32 #define PSW32_MASK_PSTATE _AC(0x00010000, UL)
33 #define PSW32_MASK_ASC _AC(0x0000C000, UL)
34 #define PSW32_MASK_CC _AC(0x00003000, UL)
35 #define PSW32_MASK_PM _AC(0x00000f00, UL)
36 #define PSW32_MASK_RI _AC(0x00000080, UL)
37
38 #define PSW32_ADDR_AMODE _AC(0x80000000, UL)
39 #define PSW32_ADDR_INSN _AC(0x7FFFFFFF, UL)
40
41 #define PSW32_DEFAULT_KEY ((PAGE_DEFAULT_ACC) << 20)
42
43 #define PSW32_ASC_PRIMARY _AC(0x00000000, UL)
44 #define PSW32_ASC_ACCREG _AC(0x00004000, UL)
45 #define PSW32_ASC_SECONDARY _AC(0x00008000, UL)
46 #define PSW32_ASC_HOME _AC(0x0000C000, UL)
47
48 #define PSW_DEFAULT_KEY ((PAGE_DEFAULT_ACC) << 52)
49
50 #define PSW_KERNEL_BITS (PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_ASC_HOME | \
51 PSW_MASK_EA | PSW_MASK_BA | PSW_MASK_DAT)
52 #define PSW_USER_BITS (PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \
53 PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_MASK_MCHECK | \
54 PSW_MASK_PSTATE | PSW_ASC_PRIMARY)
55
56 #ifndef __ASSEMBLY__
57
58 struct psw_bits {
59 unsigned long : 1;
60 unsigned long per : 1; /* PER-Mask */
61 unsigned long : 3;
62 unsigned long dat : 1; /* DAT Mode */
63 unsigned long io : 1; /* Input/Output Mask */
64 unsigned long ext : 1; /* External Mask */
65 unsigned long key : 4; /* PSW Key */
66 unsigned long : 1;
67 unsigned long mcheck : 1; /* Machine-Check Mask */
68 unsigned long wait : 1; /* Wait State */
69 unsigned long pstate : 1; /* Problem State */
70 unsigned long as : 2; /* Address Space Control */
71 unsigned long cc : 2; /* Condition Code */
72 unsigned long pm : 4; /* Program Mask */
73 unsigned long ri : 1; /* Runtime Instrumentation */
74 unsigned long : 6;
75 unsigned long eaba : 2; /* Addressing Mode */
76 unsigned long : 31;
77 unsigned long ia : 64; /* Instruction Address */
78 };
79
80 enum {
81 PSW_BITS_AMODE_24BIT = 0,
82 PSW_BITS_AMODE_31BIT = 1,
83 PSW_BITS_AMODE_64BIT = 3
84 };
85
86 enum {
87 PSW_BITS_AS_PRIMARY = 0,
88 PSW_BITS_AS_ACCREG = 1,
89 PSW_BITS_AS_SECONDARY = 2,
90 PSW_BITS_AS_HOME = 3
91 };
92
93 #define psw_bits(__psw) (*({ \
94 typecheck(psw_t, __psw); \
95 &(*(struct psw_bits *)(&(__psw))); \
96 }))
97
98 typedef struct {
99 unsigned int mask;
100 unsigned int addr;
101 } psw_t32 __aligned(8);
102
103 #define PGM_INT_CODE_MASK 0x7f
104 #define PGM_INT_CODE_PER 0x80
105
106 /*
107 * The pt_regs struct defines the way the registers are stored on
108 * the stack during a system call.
109 */
110 struct pt_regs {
111 union {
112 user_pt_regs user_regs;
113 struct {
114 unsigned long args[1];
115 psw_t psw;
116 unsigned long gprs[NUM_GPRS];
117 };
118 };
119 unsigned long orig_gpr2;
120 union {
121 struct {
122 unsigned int int_code;
123 unsigned int int_parm;
124 unsigned long int_parm_long;
125 };
126 struct tpi_info tpi_info;
127 };
128 unsigned long flags;
129 unsigned long cr1;
130 unsigned long last_break;
131 };
132
133 /*
134 * Program event recording (PER) register set.
135 */
136 struct per_regs {
137 unsigned long control; /* PER control bits */
138 unsigned long start; /* PER starting address */
139 unsigned long end; /* PER ending address */
140 };
141
142 /*
143 * PER event contains information about the cause of the last PER exception.
144 */
145 struct per_event {
146 unsigned short cause; /* PER code, ATMID and AI */
147 unsigned long address; /* PER address */
148 unsigned char paid; /* PER access identification */
149 };
150
151 /*
152 * Simplified per_info structure used to decode the ptrace user space ABI.
153 */
154 struct per_struct_kernel {
155 unsigned long cr9; /* PER control bits */
156 unsigned long cr10; /* PER starting address */
157 unsigned long cr11; /* PER ending address */
158 unsigned long bits; /* Obsolete software bits */
159 unsigned long starting_addr; /* User specified start address */
160 unsigned long ending_addr; /* User specified end address */
161 unsigned short perc_atmid; /* PER trap ATMID */
162 unsigned long address; /* PER trap instruction address */
163 unsigned char access_id; /* PER trap access identification */
164 };
165
166 #define PER_EVENT_MASK 0xEB000000UL
167
168 #define PER_EVENT_BRANCH 0x80000000UL
169 #define PER_EVENT_IFETCH 0x40000000UL
170 #define PER_EVENT_STORE 0x20000000UL
171 #define PER_EVENT_STORE_REAL 0x08000000UL
172 #define PER_EVENT_TRANSACTION_END 0x02000000UL
173 #define PER_EVENT_NULLIFICATION 0x01000000UL
174
175 #define PER_CONTROL_MASK 0x00e00000UL
176
177 #define PER_CONTROL_BRANCH_ADDRESS 0x00800000UL
178 #define PER_CONTROL_SUSPENSION 0x00400000UL
179 #define PER_CONTROL_ALTERATION 0x00200000UL
180
set_pt_regs_flag(struct pt_regs * regs,int flag)181 static inline void set_pt_regs_flag(struct pt_regs *regs, int flag)
182 {
183 regs->flags |= (1UL << flag);
184 }
185
clear_pt_regs_flag(struct pt_regs * regs,int flag)186 static inline void clear_pt_regs_flag(struct pt_regs *regs, int flag)
187 {
188 regs->flags &= ~(1UL << flag);
189 }
190
test_pt_regs_flag(struct pt_regs * regs,int flag)191 static inline int test_pt_regs_flag(struct pt_regs *regs, int flag)
192 {
193 return !!(regs->flags & (1UL << flag));
194 }
195
test_and_clear_pt_regs_flag(struct pt_regs * regs,int flag)196 static inline int test_and_clear_pt_regs_flag(struct pt_regs *regs, int flag)
197 {
198 int ret = test_pt_regs_flag(regs, flag);
199
200 clear_pt_regs_flag(regs, flag);
201 return ret;
202 }
203
204 struct task_struct;
205
206 void update_cr_regs(struct task_struct *task);
207
208 /*
209 * These are defined as per linux/ptrace.h, which see.
210 */
211 #define arch_has_single_step() (1)
212 #define arch_has_block_step() (1)
213
214 #define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
215 #define instruction_pointer(regs) ((regs)->psw.addr)
216 #define user_stack_pointer(regs)((regs)->gprs[15])
217 #define profile_pc(regs) instruction_pointer(regs)
218
regs_return_value(struct pt_regs * regs)219 static inline long regs_return_value(struct pt_regs *regs)
220 {
221 return regs->gprs[2];
222 }
223
instruction_pointer_set(struct pt_regs * regs,unsigned long val)224 static inline void instruction_pointer_set(struct pt_regs *regs,
225 unsigned long val)
226 {
227 regs->psw.addr = val;
228 }
229
230 int regs_query_register_offset(const char *name);
231 const char *regs_query_register_name(unsigned int offset);
232 unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);
233 unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);
234
235 /**
236 * regs_get_kernel_argument() - get Nth function argument in kernel
237 * @regs: pt_regs of that context
238 * @n: function argument number (start from 0)
239 *
240 * regs_get_kernel_argument() returns @n th argument of the function call.
241 */
regs_get_kernel_argument(struct pt_regs * regs,unsigned int n)242 static inline unsigned long regs_get_kernel_argument(struct pt_regs *regs,
243 unsigned int n)
244 {
245 unsigned int argoffset = STACK_FRAME_OVERHEAD / sizeof(long);
246
247 #define NR_REG_ARGUMENTS 5
248 if (n < NR_REG_ARGUMENTS)
249 return regs_get_register(regs, 2 + n);
250 n -= NR_REG_ARGUMENTS;
251 return regs_get_kernel_stack_nth(regs, argoffset + n);
252 }
253
kernel_stack_pointer(struct pt_regs * regs)254 static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
255 {
256 return regs->gprs[15];
257 }
258
regs_set_return_value(struct pt_regs * regs,unsigned long rc)259 static inline void regs_set_return_value(struct pt_regs *regs, unsigned long rc)
260 {
261 regs->gprs[2] = rc;
262 }
263
264 #endif /* __ASSEMBLY__ */
265 #endif /* _S390_PTRACE_H */
266