1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * linux/include/linux/mmc/host.h 4 * 5 * Host driver specific definitions. 6 */ 7 #ifndef LINUX_MMC_HOST_H 8 #define LINUX_MMC_HOST_H 9 10 #include <linux/sched.h> 11 #include <linux/device.h> 12 #include <linux/fault-inject.h> 13 #include <linux/debugfs.h> 14 15 #include <linux/mmc/core.h> 16 #include <linux/mmc/card.h> 17 #include <linux/mmc/pm.h> 18 #include <linux/dma-direction.h> 19 #include <linux/blk-crypto-profile.h> 20 21 struct mmc_ios { 22 unsigned int clock; /* clock rate */ 23 unsigned short vdd; 24 unsigned int power_delay_ms; /* waiting for stable power */ 25 26 /* vdd stores the bit number of the selected voltage range from below. */ 27 28 unsigned char bus_mode; /* command output mode */ 29 30 #define MMC_BUSMODE_OPENDRAIN 1 31 #define MMC_BUSMODE_PUSHPULL 2 32 33 unsigned char chip_select; /* SPI chip select */ 34 35 #define MMC_CS_DONTCARE 0 36 #define MMC_CS_HIGH 1 37 #define MMC_CS_LOW 2 38 39 unsigned char power_mode; /* power supply mode */ 40 41 #define MMC_POWER_OFF 0 42 #define MMC_POWER_UP 1 43 #define MMC_POWER_ON 2 44 #define MMC_POWER_UNDEFINED 3 45 46 unsigned char bus_width; /* data bus width */ 47 48 #define MMC_BUS_WIDTH_1 0 49 #define MMC_BUS_WIDTH_4 2 50 #define MMC_BUS_WIDTH_8 3 51 52 unsigned char timing; /* timing specification used */ 53 54 #define MMC_TIMING_LEGACY 0 55 #define MMC_TIMING_MMC_HS 1 56 #define MMC_TIMING_SD_HS 2 57 #define MMC_TIMING_UHS_SDR12 3 58 #define MMC_TIMING_UHS_SDR25 4 59 #define MMC_TIMING_UHS_SDR50 5 60 #define MMC_TIMING_UHS_SDR104 6 61 #define MMC_TIMING_UHS_DDR50 7 62 #define MMC_TIMING_MMC_DDR52 8 63 #define MMC_TIMING_MMC_HS200 9 64 #define MMC_TIMING_MMC_HS400 10 65 #define MMC_TIMING_SD_EXP 11 66 #define MMC_TIMING_SD_EXP_1_2V 12 67 68 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */ 69 70 #define MMC_SIGNAL_VOLTAGE_330 0 71 #define MMC_SIGNAL_VOLTAGE_180 1 72 #define MMC_SIGNAL_VOLTAGE_120 2 73 74 unsigned char drv_type; /* driver type (A, B, C, D) */ 75 76 #define MMC_SET_DRIVER_TYPE_B 0 77 #define MMC_SET_DRIVER_TYPE_A 1 78 #define MMC_SET_DRIVER_TYPE_C 2 79 #define MMC_SET_DRIVER_TYPE_D 3 80 81 bool enhanced_strobe; /* hs400es selection */ 82 }; 83 84 struct mmc_clk_phase { 85 bool valid; 86 u16 in_deg; 87 u16 out_deg; 88 }; 89 90 #define MMC_NUM_CLK_PHASES (MMC_TIMING_MMC_HS400 + 1) 91 struct mmc_clk_phase_map { 92 struct mmc_clk_phase phase[MMC_NUM_CLK_PHASES]; 93 }; 94 95 struct mmc_host; 96 97 enum mmc_err_stat { 98 MMC_ERR_CMD_TIMEOUT, 99 MMC_ERR_CMD_CRC, 100 MMC_ERR_DAT_TIMEOUT, 101 MMC_ERR_DAT_CRC, 102 MMC_ERR_AUTO_CMD, 103 MMC_ERR_ADMA, 104 MMC_ERR_TUNING, 105 MMC_ERR_CMDQ_RED, 106 MMC_ERR_CMDQ_GCE, 107 MMC_ERR_CMDQ_ICCE, 108 MMC_ERR_REQ_TIMEOUT, 109 MMC_ERR_CMDQ_REQ_TIMEOUT, 110 MMC_ERR_ICE_CFG, 111 MMC_ERR_CTRL_TIMEOUT, 112 MMC_ERR_UNEXPECTED_IRQ, 113 MMC_ERR_MAX, 114 }; 115 116 struct mmc_host_ops { 117 /* 118 * It is optional for the host to implement pre_req and post_req in 119 * order to support double buffering of requests (prepare one 120 * request while another request is active). 121 * pre_req() must always be followed by a post_req(). 122 * To undo a call made to pre_req(), call post_req() with 123 * a nonzero err condition. 124 */ 125 void (*post_req)(struct mmc_host *host, struct mmc_request *req, 126 int err); 127 void (*pre_req)(struct mmc_host *host, struct mmc_request *req); 128 void (*request)(struct mmc_host *host, struct mmc_request *req); 129 /* Submit one request to host in atomic context. */ 130 int (*request_atomic)(struct mmc_host *host, 131 struct mmc_request *req); 132 133 /* 134 * Avoid calling the next three functions too often or in a "fast 135 * path", since underlaying controller might implement them in an 136 * expensive and/or slow way. Also note that these functions might 137 * sleep, so don't call them in the atomic contexts! 138 */ 139 140 /* 141 * Notes to the set_ios callback: 142 * ios->clock might be 0. For some controllers, setting 0Hz 143 * as any other frequency works. However, some controllers 144 * explicitly need to disable the clock. Otherwise e.g. voltage 145 * switching might fail because the SDCLK is not really quiet. 146 */ 147 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios); 148 149 /* 150 * Return values for the get_ro callback should be: 151 * 0 for a read/write card 152 * 1 for a read-only card 153 * -ENOSYS when not supported (equal to NULL callback) 154 * or a negative errno value when something bad happened 155 */ 156 int (*get_ro)(struct mmc_host *host); 157 158 /* 159 * Return values for the get_cd callback should be: 160 * 0 for a absent card 161 * 1 for a present card 162 * -ENOSYS when not supported (equal to NULL callback) 163 * or a negative errno value when something bad happened 164 */ 165 int (*get_cd)(struct mmc_host *host); 166 167 void (*enable_sdio_irq)(struct mmc_host *host, int enable); 168 /* Mandatory callback when using MMC_CAP2_SDIO_IRQ_NOTHREAD. */ 169 void (*ack_sdio_irq)(struct mmc_host *host); 170 171 /* optional callback for HC quirks */ 172 void (*init_card)(struct mmc_host *host, struct mmc_card *card); 173 174 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios); 175 176 /* Check if the card is pulling dat[0] low */ 177 int (*card_busy)(struct mmc_host *host); 178 179 /* The tuning command opcode value is different for SD and eMMC cards */ 180 int (*execute_tuning)(struct mmc_host *host, u32 opcode); 181 182 /* Prepare HS400 target operating frequency depending host driver */ 183 int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios); 184 185 /* Execute HS400 tuning depending host driver */ 186 int (*execute_hs400_tuning)(struct mmc_host *host, struct mmc_card *card); 187 188 /* Optional callback to prepare for SD high-speed tuning */ 189 int (*prepare_sd_hs_tuning)(struct mmc_host *host, struct mmc_card *card); 190 191 /* Optional callback to execute SD high-speed tuning */ 192 int (*execute_sd_hs_tuning)(struct mmc_host *host, struct mmc_card *card); 193 194 /* Prepare switch to DDR during the HS400 init sequence */ 195 int (*hs400_prepare_ddr)(struct mmc_host *host); 196 197 /* Prepare for switching from HS400 to HS200 */ 198 void (*hs400_downgrade)(struct mmc_host *host); 199 200 /* Complete selection of HS400 */ 201 void (*hs400_complete)(struct mmc_host *host); 202 203 /* Prepare enhanced strobe depending host driver */ 204 void (*hs400_enhanced_strobe)(struct mmc_host *host, 205 struct mmc_ios *ios); 206 int (*select_drive_strength)(struct mmc_card *card, 207 unsigned int max_dtr, int host_drv, 208 int card_drv, int *drv_type); 209 /* Reset the eMMC card via RST_n */ 210 void (*card_hw_reset)(struct mmc_host *host); 211 void (*card_event)(struct mmc_host *host); 212 213 /* 214 * Optional callback to support controllers with HW issues for multiple 215 * I/O. Returns the number of supported blocks for the request. 216 */ 217 int (*multi_io_quirk)(struct mmc_card *card, 218 unsigned int direction, int blk_size); 219 220 /* Initialize an SD express card, mandatory for MMC_CAP2_SD_EXP. */ 221 int (*init_sd_express)(struct mmc_host *host, struct mmc_ios *ios); 222 }; 223 224 struct mmc_cqe_ops { 225 /* Allocate resources, and make the CQE operational */ 226 int (*cqe_enable)(struct mmc_host *host, struct mmc_card *card); 227 /* Free resources, and make the CQE non-operational */ 228 void (*cqe_disable)(struct mmc_host *host); 229 /* 230 * Issue a read, write or DCMD request to the CQE. Also deal with the 231 * effect of ->cqe_off(). 232 */ 233 int (*cqe_request)(struct mmc_host *host, struct mmc_request *mrq); 234 /* Free resources (e.g. DMA mapping) associated with the request */ 235 void (*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq); 236 /* 237 * Prepare the CQE and host controller to accept non-CQ commands. There 238 * is no corresponding ->cqe_on(), instead ->cqe_request() is required 239 * to deal with that. 240 */ 241 void (*cqe_off)(struct mmc_host *host); 242 /* 243 * Wait for all CQE tasks to complete. Return an error if recovery 244 * becomes necessary. 245 */ 246 int (*cqe_wait_for_idle)(struct mmc_host *host); 247 /* 248 * Notify CQE that a request has timed out. Return false if the request 249 * completed or true if a timeout happened in which case indicate if 250 * recovery is needed. 251 */ 252 bool (*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq, 253 bool *recovery_needed); 254 /* 255 * Stop all CQE activity and prepare the CQE and host controller to 256 * accept recovery commands. 257 */ 258 void (*cqe_recovery_start)(struct mmc_host *host); 259 /* 260 * Clear the queue and call mmc_cqe_request_done() on all requests. 261 * Requests that errored will have the error set on the mmc_request 262 * (data->error or cmd->error for DCMD). Requests that did not error 263 * will have zero data bytes transferred. 264 */ 265 void (*cqe_recovery_finish)(struct mmc_host *host); 266 }; 267 268 /** 269 * struct mmc_slot - MMC slot functions 270 * 271 * @cd_irq: MMC/SD-card slot hotplug detection IRQ or -EINVAL 272 * @handler_priv: MMC/SD-card slot context 273 * 274 * Some MMC/SD host controllers implement slot-functions like card and 275 * write-protect detection natively. However, a large number of controllers 276 * leave these functions to the CPU. This struct provides a hook to attach 277 * such slot-function drivers. 278 */ 279 struct mmc_slot { 280 int cd_irq; 281 bool cd_wake_enabled; 282 void *handler_priv; 283 }; 284 285 struct regulator; 286 struct mmc_pwrseq; 287 288 struct mmc_supply { 289 struct regulator *vmmc; /* Card power supply */ 290 struct regulator *vqmmc; /* Optional Vccq supply */ 291 }; 292 293 struct mmc_ctx { 294 struct task_struct *task; 295 }; 296 297 struct mmc_host { 298 struct device *parent; 299 struct device class_dev; 300 int index; 301 const struct mmc_host_ops *ops; 302 struct mmc_pwrseq *pwrseq; 303 unsigned int f_min; 304 unsigned int f_max; 305 unsigned int f_init; 306 u32 ocr_avail; 307 u32 ocr_avail_sdio; /* SDIO-specific OCR */ 308 u32 ocr_avail_sd; /* SD-specific OCR */ 309 u32 ocr_avail_mmc; /* MMC-specific OCR */ 310 struct wakeup_source *ws; /* Enable consume of uevents */ 311 u32 max_current_330; 312 u32 max_current_300; 313 u32 max_current_180; 314 315 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ 316 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ 317 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ 318 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ 319 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ 320 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ 321 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ 322 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ 323 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ 324 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ 325 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ 326 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ 327 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ 328 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ 329 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ 330 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ 331 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ 332 333 u32 caps; /* Host capabilities */ 334 335 #define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */ 336 #define MMC_CAP_MMC_HIGHSPEED (1 << 1) /* Can do MMC high-speed timing */ 337 #define MMC_CAP_SD_HIGHSPEED (1 << 2) /* Can do SD high-speed timing */ 338 #define MMC_CAP_SDIO_IRQ (1 << 3) /* Can signal pending SDIO IRQs */ 339 #define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */ 340 #define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */ 341 #define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */ 342 #define MMC_CAP_AGGRESSIVE_PM (1 << 7) /* Suspend (e)MMC/SD at idle */ 343 #define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */ 344 #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */ 345 #define MMC_CAP_3_3V_DDR (1 << 11) /* Host supports eMMC DDR 3.3V */ 346 #define MMC_CAP_1_8V_DDR (1 << 12) /* Host supports eMMC DDR 1.8V */ 347 #define MMC_CAP_1_2V_DDR (1 << 13) /* Host supports eMMC DDR 1.2V */ 348 #define MMC_CAP_DDR (MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR | \ 349 MMC_CAP_1_2V_DDR) 350 #define MMC_CAP_POWER_OFF_CARD (1 << 14) /* Can power off after boot */ 351 #define MMC_CAP_BUS_WIDTH_TEST (1 << 15) /* CMD14/CMD19 bus width ok */ 352 #define MMC_CAP_UHS_SDR12 (1 << 16) /* Host supports UHS SDR12 mode */ 353 #define MMC_CAP_UHS_SDR25 (1 << 17) /* Host supports UHS SDR25 mode */ 354 #define MMC_CAP_UHS_SDR50 (1 << 18) /* Host supports UHS SDR50 mode */ 355 #define MMC_CAP_UHS_SDR104 (1 << 19) /* Host supports UHS SDR104 mode */ 356 #define MMC_CAP_UHS_DDR50 (1 << 20) /* Host supports UHS DDR50 mode */ 357 #define MMC_CAP_UHS (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \ 358 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \ 359 MMC_CAP_UHS_DDR50) 360 #define MMC_CAP_SYNC_RUNTIME_PM (1 << 21) /* Synced runtime PM suspends. */ 361 #define MMC_CAP_NEED_RSP_BUSY (1 << 22) /* Commands with R1B can't use R1. */ 362 #define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */ 363 #define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */ 364 #define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */ 365 #define MMC_CAP_DONE_COMPLETE (1 << 27) /* RW reqs can be completed within mmc_request_done() */ 366 #define MMC_CAP_CD_WAKE (1 << 28) /* Enable card detect wake */ 367 #define MMC_CAP_CMD_DURING_TFR (1 << 29) /* Commands during data transfer */ 368 #define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */ 369 #define MMC_CAP_HW_RESET (1 << 31) /* Reset the eMMC card via RST_n */ 370 371 u32 caps2; /* More host capabilities */ 372 373 #define MMC_CAP2_BOOTPART_NOACC (1 << 0) /* Boot partition no access */ 374 #define MMC_CAP2_FULL_PWR_CYCLE (1 << 2) /* Can do full power cycle */ 375 #define MMC_CAP2_FULL_PWR_CYCLE_IN_SUSPEND (1 << 3) /* Can do full power cycle in suspend */ 376 #define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */ 377 #define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */ 378 #define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \ 379 MMC_CAP2_HS200_1_2V_SDR) 380 #define MMC_CAP2_SD_EXP (1 << 7) /* SD express via PCIe */ 381 #define MMC_CAP2_SD_EXP_1_2V (1 << 8) /* SD express 1.2V */ 382 #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */ 383 #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */ 384 #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */ 385 #define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */ 386 #define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */ 387 #define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \ 388 MMC_CAP2_HS400_1_2V) 389 #define MMC_CAP2_HSX00_1_8V (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V) 390 #define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V) 391 #define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17) 392 #define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) /* No physical write protect pin, assume that card is always read-write */ 393 #define MMC_CAP2_NO_SDIO (1 << 19) /* Do not send SDIO commands during initialization */ 394 #define MMC_CAP2_HS400_ES (1 << 20) /* Host supports enhanced strobe */ 395 #define MMC_CAP2_NO_SD (1 << 21) /* Do not send SD commands during initialization */ 396 #define MMC_CAP2_NO_MMC (1 << 22) /* Do not send (e)MMC commands during initialization */ 397 #define MMC_CAP2_CQE (1 << 23) /* Has eMMC command queue engine */ 398 #define MMC_CAP2_CQE_DCMD (1 << 24) /* CQE can issue a direct command */ 399 #define MMC_CAP2_AVOID_3_3V (1 << 25) /* Host must negotiate down from 3.3V */ 400 #define MMC_CAP2_MERGE_CAPABLE (1 << 26) /* Host can merge a segment over the segment size */ 401 #ifdef CONFIG_MMC_CRYPTO 402 #define MMC_CAP2_CRYPTO (1 << 27) /* Host supports inline encryption */ 403 #else 404 #define MMC_CAP2_CRYPTO 0 405 #endif 406 #define MMC_CAP2_ALT_GPT_TEGRA (1 << 28) /* Host with eMMC that has GPT entry at a non-standard location */ 407 408 int fixed_drv_type; /* fixed driver type for non-removable media */ 409 410 mmc_pm_flag_t pm_caps; /* supported pm features */ 411 412 /* host specific block data */ 413 unsigned int max_seg_size; /* lim->max_segment_size */ 414 unsigned short max_segs; /* lim->max_segments */ 415 unsigned short unused; 416 unsigned int max_req_size; /* maximum number of bytes in one req */ 417 unsigned int max_blk_size; /* maximum size of one mmc block */ 418 unsigned int max_blk_count; /* maximum number of blocks in one req */ 419 unsigned int max_busy_timeout; /* max busy timeout in ms */ 420 421 /* private data */ 422 spinlock_t lock; /* lock for claim and bus ops */ 423 424 struct mmc_ios ios; /* current io bus settings */ 425 426 /* group bitfields together to minimize padding */ 427 unsigned int use_spi_crc:1; 428 unsigned int claimed:1; /* host exclusively claimed */ 429 unsigned int doing_init_tune:1; /* initial tuning in progress */ 430 unsigned int can_retune:1; /* re-tuning can be used */ 431 unsigned int doing_retune:1; /* re-tuning in progress */ 432 unsigned int retune_now:1; /* do re-tuning at next req */ 433 unsigned int retune_paused:1; /* re-tuning is temporarily disabled */ 434 unsigned int retune_crc_disable:1; /* don't trigger retune upon crc */ 435 unsigned int can_dma_map_merge:1; /* merging can be used */ 436 unsigned int vqmmc_enabled:1; /* vqmmc regulator is enabled */ 437 438 int rescan_disable; /* disable card detection */ 439 int rescan_entered; /* used with nonremovable devices */ 440 441 int need_retune; /* re-tuning is needed */ 442 int hold_retune; /* hold off re-tuning */ 443 unsigned int retune_period; /* re-tuning period in secs */ 444 struct timer_list retune_timer; /* for periodic re-tuning */ 445 446 bool trigger_card_event; /* card_event necessary */ 447 448 struct mmc_card *card; /* device attached to this host */ 449 450 wait_queue_head_t wq; 451 struct mmc_ctx *claimer; /* context that has host claimed */ 452 int claim_cnt; /* "claim" nesting count */ 453 struct mmc_ctx default_ctx; /* default context */ 454 455 struct delayed_work detect; 456 int detect_change; /* card detect flag */ 457 struct mmc_slot slot; 458 459 const struct mmc_bus_ops *bus_ops; /* current bus driver */ 460 461 unsigned int sdio_irqs; 462 struct task_struct *sdio_irq_thread; 463 struct work_struct sdio_irq_work; 464 bool sdio_irq_pending; 465 atomic_t sdio_irq_thread_abort; 466 467 mmc_pm_flag_t pm_flags; /* requested pm features */ 468 469 struct led_trigger *led; /* activity led */ 470 471 #ifdef CONFIG_REGULATOR 472 bool regulator_enabled; /* regulator state */ 473 #endif 474 struct mmc_supply supply; 475 476 struct dentry *debugfs_root; 477 478 /* Ongoing data transfer that allows commands during transfer */ 479 struct mmc_request *ongoing_mrq; 480 481 #ifdef CONFIG_FAIL_MMC_REQUEST 482 struct fault_attr fail_mmc_request; 483 #endif 484 485 unsigned int actual_clock; /* Actual HC clock rate */ 486 487 unsigned int slotno; /* used for sdio acpi binding */ 488 489 int dsr_req; /* DSR value is valid */ 490 u32 dsr; /* optional driver stage (DSR) value */ 491 492 /* Command Queue Engine (CQE) support */ 493 const struct mmc_cqe_ops *cqe_ops; 494 void *cqe_private; 495 int cqe_qdepth; 496 bool cqe_enabled; 497 bool cqe_on; 498 499 /* Inline encryption support */ 500 #ifdef CONFIG_MMC_CRYPTO 501 struct blk_crypto_profile crypto_profile; 502 #endif 503 504 /* Host Software Queue support */ 505 bool hsq_enabled; 506 int hsq_depth; 507 508 u32 err_stats[MMC_ERR_MAX]; 509 unsigned long private[] ____cacheline_aligned; 510 }; 511 512 struct device_node; 513 514 struct mmc_host *mmc_alloc_host(int extra, struct device *); 515 struct mmc_host *devm_mmc_alloc_host(struct device *dev, int extra); 516 int mmc_add_host(struct mmc_host *); 517 void mmc_remove_host(struct mmc_host *); 518 void mmc_free_host(struct mmc_host *); 519 void mmc_of_parse_clk_phase(struct device *dev, 520 struct mmc_clk_phase_map *map); 521 int mmc_of_parse(struct mmc_host *host); 522 int mmc_of_parse_voltage(struct mmc_host *host, u32 *mask); 523 mmc_priv(struct mmc_host * host)524 static inline void *mmc_priv(struct mmc_host *host) 525 { 526 return (void *)host->private; 527 } 528 mmc_from_priv(void * priv)529 static inline struct mmc_host *mmc_from_priv(void *priv) 530 { 531 return container_of(priv, struct mmc_host, private); 532 } 533 534 #define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI) 535 536 #define mmc_dev(x) ((x)->parent) 537 #define mmc_classdev(x) (&(x)->class_dev) 538 #define mmc_hostname(x) (dev_name(&(x)->class_dev)) 539 540 void mmc_detect_change(struct mmc_host *, unsigned long delay); 541 void mmc_request_done(struct mmc_host *, struct mmc_request *); 542 void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq); 543 544 void mmc_cqe_request_done(struct mmc_host *host, struct mmc_request *mrq); 545 546 /* 547 * May be called from host driver's system/runtime suspend/resume callbacks, 548 * to know if SDIO IRQs has been claimed. 549 */ sdio_irq_claimed(struct mmc_host * host)550 static inline bool sdio_irq_claimed(struct mmc_host *host) 551 { 552 return host->sdio_irqs > 0; 553 } 554 mmc_signal_sdio_irq(struct mmc_host * host)555 static inline void mmc_signal_sdio_irq(struct mmc_host *host) 556 { 557 host->ops->enable_sdio_irq(host, 0); 558 host->sdio_irq_pending = true; 559 if (host->sdio_irq_thread) 560 wake_up_process(host->sdio_irq_thread); 561 } 562 563 void sdio_signal_irq(struct mmc_host *host); 564 565 #ifdef CONFIG_REGULATOR 566 int mmc_regulator_set_ocr(struct mmc_host *mmc, 567 struct regulator *supply, 568 unsigned short vdd_bit); 569 int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios); 570 #else mmc_regulator_set_ocr(struct mmc_host * mmc,struct regulator * supply,unsigned short vdd_bit)571 static inline int mmc_regulator_set_ocr(struct mmc_host *mmc, 572 struct regulator *supply, 573 unsigned short vdd_bit) 574 { 575 return 0; 576 } 577 mmc_regulator_set_vqmmc(struct mmc_host * mmc,struct mmc_ios * ios)578 static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc, 579 struct mmc_ios *ios) 580 { 581 return -EINVAL; 582 } 583 #endif 584 585 int mmc_regulator_get_supply(struct mmc_host *mmc); 586 int mmc_regulator_enable_vqmmc(struct mmc_host *mmc); 587 void mmc_regulator_disable_vqmmc(struct mmc_host *mmc); 588 mmc_card_is_removable(struct mmc_host * host)589 static inline int mmc_card_is_removable(struct mmc_host *host) 590 { 591 return !(host->caps & MMC_CAP_NONREMOVABLE); 592 } 593 mmc_card_keep_power(struct mmc_host * host)594 static inline int mmc_card_keep_power(struct mmc_host *host) 595 { 596 return host->pm_flags & MMC_PM_KEEP_POWER; 597 } 598 mmc_card_wake_sdio_irq(struct mmc_host * host)599 static inline int mmc_card_wake_sdio_irq(struct mmc_host *host) 600 { 601 return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ; 602 } 603 604 /* TODO: Move to private header */ mmc_card_hs(struct mmc_card * card)605 static inline int mmc_card_hs(struct mmc_card *card) 606 { 607 return card->host->ios.timing == MMC_TIMING_SD_HS || 608 card->host->ios.timing == MMC_TIMING_MMC_HS; 609 } 610 611 /* TODO: Move to private header */ mmc_card_uhs(struct mmc_card * card)612 static inline int mmc_card_uhs(struct mmc_card *card) 613 { 614 return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 && 615 card->host->ios.timing <= MMC_TIMING_UHS_DDR50; 616 } 617 618 void mmc_retune_timer_stop(struct mmc_host *host); 619 mmc_retune_needed(struct mmc_host * host)620 static inline void mmc_retune_needed(struct mmc_host *host) 621 { 622 if (host->can_retune) 623 host->need_retune = 1; 624 } 625 mmc_can_retune(struct mmc_host * host)626 static inline bool mmc_can_retune(struct mmc_host *host) 627 { 628 return host->can_retune == 1; 629 } 630 mmc_doing_retune(struct mmc_host * host)631 static inline bool mmc_doing_retune(struct mmc_host *host) 632 { 633 return host->doing_retune == 1; 634 } 635 mmc_doing_tune(struct mmc_host * host)636 static inline bool mmc_doing_tune(struct mmc_host *host) 637 { 638 return host->doing_retune == 1 || host->doing_init_tune == 1; 639 } 640 mmc_get_dma_dir(struct mmc_data * data)641 static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data) 642 { 643 return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE; 644 } 645 mmc_debugfs_err_stats_inc(struct mmc_host * host,enum mmc_err_stat stat)646 static inline void mmc_debugfs_err_stats_inc(struct mmc_host *host, 647 enum mmc_err_stat stat) 648 { 649 host->err_stats[stat] += 1; 650 } 651 652 int mmc_sd_switch(struct mmc_card *card, bool mode, int group, 653 u8 value, u8 *resp); 654 int mmc_send_status(struct mmc_card *card, u32 *status); 655 int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error); 656 int mmc_send_abort_tuning(struct mmc_host *host, u32 opcode); 657 int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd); 658 659 #endif /* LINUX_MMC_HOST_H */ 660