1 /*
2 * Copyright (c) 2014-2020 The Linux Foundation. All rights reserved.
3 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for
6 * any purpose with or without fee is hereby granted, provided that the
7 * above copyright notice and this permission notice appear in all
8 * copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17 * PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 /* ===================================================================
21 * Internal BMI Header File
22 */
23
24 #ifndef _I_BMI_H_
25 #define _I_BMI_H_
26
27 #include "qdf_types.h"
28 #include "qdf_defer.h"
29 #include "hif.h"
30 #include "bmi_msg.h"
31 #include "bmi.h"
32 #include "ol_fw.h"
33 #include "pld_common.h"
34
35 /*
36 * Note that not all the register locations are accessible.
37 * A list of accessible target registers are specified with
38 * their start and end addresses in a table for given target
39 * version. We should NOT access other locations as either
40 * they are invalid locations or host does not have read
41 * access to it or the value of the particular register
42 * read might change
43 */
44 #define REGISTER_LOCATION 0x00000800
45
46 #define DRAM_LOCATION 0x00400000
47 #ifdef HIF_PCI
48 #define DRAM_SIZE 0x000a8000
49 #else
50 #define DRAM_SIZE 0x00098000
51 #endif
52 /* The local base addr is used to read the target dump using pcie I/O reads */
53 #define DRAM_LOCAL_BASE_ADDR (0x100000)
54
55 /* Target IRAM config */
56 #define FW_RAM_CONFIG_ADDRESS 0x0018
57 #define IRAM1_LOCATION 0x00980000
58 #define IRAM1_SIZE 0x00080000
59 #define IRAM2_LOCATION 0x00a00000
60 #define IRAM2_SIZE 0x00040000
61 #ifdef HIF_SDIO
62 #define IRAM_LOCATION 0x00980000
63 #define IRAM_SIZE 0x000C0000
64 #else
65 #define IRAM_LOCATION 0x00980000
66 #define IRAM_SIZE 0x00038000
67 #endif
68
69 #define AXI_LOCATION 0x000a0000
70 #ifdef HIF_PCI
71 #define AXI_SIZE 0x00018000
72 #else
73 #define AXI_SIZE 0x00020000
74 #endif
75
76 #define PCIE_READ_LIMIT 0x00040000
77
78 #define SHA256_DIGEST_SIZE 32
79
80 /* BMI LOGGING WRAPPERS */
81
82 #define BMI_LOG(level, args...) QDF_TRACE(QDF_MODULE_ID_BMI, \
83 level, ##args)
84 #define BMI_ERR(args ...) BMI_LOG(QDF_TRACE_LEVEL_ERROR, args)
85 #define BMI_DBG(args ...) BMI_LOG(QDF_TRACE_LEVEL_DEBUG, args)
86 #define BMI_WARN(args ...) BMI_LOG(QDF_TRACE_LEVEL_WARN, args)
87 #define BMI_INFO(args ...) BMI_LOG(QDF_TRACE_LEVEL_INFO, args)
88 /* End of BMI Logging Wrappers */
89
90 /* BMI Assert Wrappers */
91 #define bmi_assert QDF_BUG
92 /*
93 * Although we had envisioned BMI to run on top of HTC, this is not how the
94 * final implementation ended up. On the Target side, BMI is a part of the BSP
95 * and does not use the HTC protocol nor even DMA -- it is intentionally kept
96 * very simple.
97 */
98
99 #define MAX_BMI_CMDBUF_SZ (BMI_DATASZ_MAX + \
100 sizeof(uint32_t) /* cmd */ + \
101 sizeof(uint32_t) /* addr */ + \
102 sizeof(uint32_t)) /* length */
103 #define BMI_COMMAND_FITS(sz) ((sz) <= MAX_BMI_CMDBUF_SZ)
104 #define BMI_EXCHANGE_TIMEOUT_MS 1000
105
106 struct hash_fw {
107 u8 qwlan[SHA256_DIGEST_SIZE];
108 u8 otp[SHA256_DIGEST_SIZE];
109 u8 bdwlan[SHA256_DIGEST_SIZE];
110 u8 utf[SHA256_DIGEST_SIZE];
111 };
112
113 enum ATH_BIN_FILE {
114 ATH_OTP_FILE,
115 ATH_FIRMWARE_FILE,
116 ATH_PATCH_FILE,
117 ATH_BOARD_DATA_FILE,
118 ATH_FLASH_FILE,
119 ATH_SETUP_FILE,
120 };
121
122 #if defined(QCA_WIFI_3_0_ADRASTEA)
123 #define NO_BMI 1
124 #else
125 #define NO_BMI 0
126 #endif
127
128 /**
129 * struct bmi_info - Structure to hold BMI Specific information
130 * @bmi_cmd_buff: BMI Command Buffer
131 * @bmi_rsp_buff: BMI Response Buffer
132 * @bmi_cmd_da: BMI Command Physical address
133 * @bmi_rsp_da: BMI Response Physical address
134 * @bmi_done: Flag to check if BMI Phase is complete
135 * @board_id: board ID
136 * @fw_files: FW files
137 *
138 */
139 struct bmi_info {
140 uint8_t *bmi_cmd_buff;
141 uint8_t *bmi_rsp_buff;
142 dma_addr_t bmi_cmd_da;
143 dma_addr_t bmi_rsp_da;
144 bool bmi_done;
145 uint16_t board_id;
146 struct pld_fw_files fw_files;
147 };
148
149 /**
150 * struct ol_context - Structure to hold OL context
151 * @bmi: BMI info
152 * @cfg_info: OL config info
153 * @cal_in_flash: For Firmware Flash Download
154 * @qdf_dev: QDF Device
155 * @ramdump_work: Work for Ramdump collection
156 * @fw_indication_work: Work for Fw indication
157 * @fw_dl_wakelock: Firmware download wakelock
158 * @scn: HIF Context
159 * @tgt_def: Target Defnition pointer
160 * @fw_crashed_cb: Callback for firmware crashed ind
161 *
162 * Structure to hold all ol BMI/Ramdump info
163 */
164 struct ol_context {
165 struct bmi_info bmi;
166 struct ol_config_info cfg_info;
167 uint8_t *cal_in_flash;
168 qdf_device_t qdf_dev;
169 qdf_work_t ramdump_work;
170 qdf_work_t fw_indication_work;
171 qdf_wake_lock_t fw_dl_wakelock;
172 struct hif_opaque_softc *scn;
173 struct targetdef_t {
174 struct targetdef_s *targetdef;
175 } tgt_def;
176 void (*fw_crashed_cb)(void);
177 };
178
179 #define GET_BMI_CONTEXT(ol_ctx) ((struct bmi_info *)ol_ctx)
180
181 QDF_STATUS bmi_execute(uint32_t address, uint32_t *param,
182 struct ol_context *ol_ctx);
183 QDF_STATUS bmi_init(struct ol_context *ol_ctx);
184 QDF_STATUS bmi_no_command(struct ol_context *ol_ctx);
185 QDF_STATUS bmi_read_memory(uint32_t address, uint8_t *buffer, uint32_t length,
186 struct ol_context *ol_ctx);
187 QDF_STATUS bmi_write_memory(uint32_t address, uint8_t *buffer, uint32_t length,
188 struct ol_context *ol_ctx);
189 QDF_STATUS bmi_fast_download(uint32_t address, uint8_t *buffer, uint32_t length,
190 struct ol_context *ol_ctx);
191 QDF_STATUS bmi_read_soc_register(uint32_t address,
192 uint32_t *param, struct ol_context *ol_ctx);
193 QDF_STATUS bmi_write_soc_register(uint32_t address, uint32_t param,
194 struct ol_context *ol_ctx);
195 QDF_STATUS bmi_get_target_info(struct bmi_target_info *targ_info,
196 struct ol_context *ol_ctx);
197 QDF_STATUS bmi_firmware_download(struct ol_context *ol_ctx);
198 QDF_STATUS bmi_done_local(struct ol_context *ol_ctx);
199 QDF_STATUS ol_download_firmware(struct ol_context *ol_ctx);
200 QDF_STATUS ol_configure_target(struct ol_context *ol_ctx);
201 QDF_STATUS bmi_sign_stream_start(uint32_t address, uint8_t *buffer,
202 uint32_t length, struct ol_context *ol_ctx);
203 void ramdump_work_handler(void *arg);
204 void fw_indication_work_handler(void *arg);
205 struct ol_config_info *ol_get_ini_handle(struct ol_context *ol_ctx);
206
207 #ifdef HIF_SDIO
208 QDF_STATUS hif_reg_based_get_target_info(struct hif_opaque_softc *hif_ctx,
209 struct bmi_target_info *targ_info);
210 #endif
211 #if defined(HIF_PCI) || defined(HIF_SNOC) || defined(HIF_AHB) || defined(HIF_USB)
212 static inline QDF_STATUS
hif_reg_based_get_target_info(struct hif_opaque_softc * hif_ctx,struct bmi_target_info * targ_info)213 hif_reg_based_get_target_info(struct hif_opaque_softc *hif_ctx,
214 struct bmi_target_info *targ_info)
215 {
216 return QDF_STATUS_SUCCESS;
217 }
218 #endif
219 #endif
220