1  /*******************************************************************
2   * This file is part of the Emulex Linux Device Driver for         *
3   * Fibre Channel Host Bus Adapters.                                *
4   * Copyright (C) 2017-2022 Broadcom. All Rights Reserved. The term *
5   * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.     *
6   * Copyright (C) 2010-2015 Emulex.  All rights reserved.           *
7   * EMULEX and SLI are trademarks of Emulex.                        *
8   * www.broadcom.com                                                *
9   *                                                                 *
10   * This program is free software; you can redistribute it and/or   *
11   * modify it under the terms of version 2 of the GNU General       *
12   * Public License as published by the Free Software Foundation.    *
13   * This program is distributed in the hope that it will be useful. *
14   * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND          *
15   * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY,  *
16   * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE      *
17   * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
18   * TO BE LEGALLY INVALID.  See the GNU General Public License for  *
19   * more details, a copy of which can be found in the file COPYING  *
20   * included with this package.                                     *
21   *******************************************************************/
22  /* bsg definitions
23   * No pointers to user data are allowed, all application buffers and sizes will
24   * derived through the bsg interface.
25   *
26   * These are the vendor unique structures passed in using the bsg
27   * FC_BSG_HST_VENDOR message code type.
28   */
29  #define LPFC_BSG_VENDOR_SET_CT_EVENT		1
30  #define LPFC_BSG_VENDOR_GET_CT_EVENT		2
31  #define LPFC_BSG_VENDOR_SEND_MGMT_RESP		3
32  #define LPFC_BSG_VENDOR_DIAG_MODE		4
33  #define LPFC_BSG_VENDOR_DIAG_RUN_LOOPBACK	5
34  #define LPFC_BSG_VENDOR_GET_MGMT_REV		6
35  #define LPFC_BSG_VENDOR_MBOX			7
36  #define LPFC_BSG_VENDOR_DIAG_MODE_END		10
37  #define LPFC_BSG_VENDOR_LINK_DIAG_TEST		11
38  #define LPFC_BSG_VENDOR_FORCED_LINK_SPEED	14
39  #define LPFC_BSG_VENDOR_RAS_GET_LWPD		16
40  #define LPFC_BSG_VENDOR_RAS_GET_FWLOG		17
41  #define LPFC_BSG_VENDOR_RAS_GET_CONFIG		18
42  #define LPFC_BSG_VENDOR_RAS_SET_CONFIG		19
43  #define LPFC_BSG_VENDOR_GET_TRUNK_INFO		20
44  #define LPFC_BSG_VENDOR_GET_CGNBUF_INFO		21
45  
46  struct set_ct_event {
47  	uint32_t command;
48  	uint32_t type_mask;
49  	uint32_t ev_req_id;
50  	uint32_t ev_reg_id;
51  };
52  
53  struct get_ct_event {
54  	uint32_t command;
55  	uint32_t ev_reg_id;
56  	uint32_t ev_req_id;
57  };
58  
59  struct get_ct_event_reply {
60  	uint32_t immed_data;
61  	uint32_t type;
62  };
63  
64  struct send_mgmt_resp {
65  	uint32_t command;
66  	uint32_t tag;
67  };
68  
69  
70  #define DISABLE_LOOP_BACK  0x0 /* disables loop back */
71  #define INTERNAL_LOOP_BACK 0x1 /* adapter short cuts the loop internally */
72  #define EXTERNAL_LOOP_BACK 0x2 /* requires an external loopback plug */
73  
74  struct diag_mode_set {
75  	uint32_t command;
76  	uint32_t type;
77  	uint32_t timeout;
78  	uint32_t physical_link;
79  };
80  
81  struct sli4_link_diag {
82  	uint32_t command;
83  	uint32_t timeout;
84  	uint32_t test_id;
85  	uint32_t loops;
86  	uint32_t test_version;
87  	uint32_t error_action;
88  };
89  
90  struct diag_mode_test {
91  	uint32_t command;
92  };
93  
94  struct diag_status {
95  	uint32_t mbox_status;
96  	uint32_t shdr_status;
97  	uint32_t shdr_add_status;
98  };
99  
100  #define LPFC_WWNN_TYPE		0
101  #define LPFC_WWPN_TYPE		1
102  
103  struct get_mgmt_rev {
104  	uint32_t command;
105  };
106  
107  #define MANAGEMENT_MAJOR_REV   1
108  #define MANAGEMENT_MINOR_REV   1
109  
110  /* the MgmtRevInfo structure */
111  struct MgmtRevInfo {
112  	uint32_t a_Major;
113  	uint32_t a_Minor;
114  };
115  
116  struct get_mgmt_rev_reply {
117  	struct MgmtRevInfo info;
118  };
119  
120  #define BSG_MBOX_SIZE 4096 /* mailbox command plus extended data */
121  
122  /* BSG mailbox request header */
123  struct dfc_mbox_req {
124  	uint32_t command;
125  	uint32_t mbOffset;
126  	uint32_t inExtWLen;
127  	uint32_t outExtWLen;
128  	uint32_t extMboxTag;
129  	uint32_t extSeqNum;
130  };
131  
132  /*
133   * macros and data structures for handling sli-config mailbox command
134   * pass-through support, this header file is shared between user and
135   * kernel spaces, note the set of macros are duplicates from lpfc_hw4.h,
136   * with macro names prefixed with bsg_, as the macros defined in
137   * lpfc_hw4.h are not accessible from user space.
138   */
139  
140  /* Macros to deal with bit fields. Each bit field must have 3 #defines
141   * associated with it (_SHIFT, _MASK, and _WORD).
142   * EG. For a bit field that is in the 7th bit of the "field4" field of a
143   * structure and is 2 bits in size the following #defines must exist:
144   *      struct temp {
145   *              uint32_t        field1;
146   *              uint32_t        field2;
147   *              uint32_t        field3;
148   *              uint32_t        field4;
149   *      #define example_bit_field_SHIFT         7
150   *      #define example_bit_field_MASK          0x03
151   *      #define example_bit_field_WORD          field4
152   *              uint32_t        field5;
153   *      };
154   * Then the macros below may be used to get or set the value of that field.
155   * EG. To get the value of the bit field from the above example:
156   *      struct temp t1;
157   *      value = bsg_bf_get(example_bit_field, &t1);
158   * And then to set that bit field:
159   *      bsg_bf_set(example_bit_field, &t1, 2);
160   * Or clear that bit field:
161   *      bsg_bf_set(example_bit_field, &t1, 0);
162   */
163  #define bsg_bf_get_le32(name, ptr) \
164  	((le32_to_cpu((ptr)->name##_WORD) >> name##_SHIFT) & name##_MASK)
165  #define bsg_bf_get(name, ptr) \
166  	(((ptr)->name##_WORD >> name##_SHIFT) & name##_MASK)
167  #define bsg_bf_set_le32(name, ptr, value) \
168  	((ptr)->name##_WORD = cpu_to_le32(((((value) & \
169  	name##_MASK) << name##_SHIFT) | (le32_to_cpu((ptr)->name##_WORD) & \
170  	~(name##_MASK << name##_SHIFT)))))
171  #define bsg_bf_set(name, ptr, value) \
172  	((ptr)->name##_WORD = ((((value) & name##_MASK) << name##_SHIFT) | \
173  	((ptr)->name##_WORD & ~(name##_MASK << name##_SHIFT))))
174  
175  /*
176   * The sli_config structure specified here is based on the following
177   * restriction:
178   *
179   * -- SLI_CONFIG EMB=0, carrying MSEs, will carry subcommands without
180   *    carrying HBD.
181   * -- SLI_CONFIG EMB=1, not carrying MSE, will carry subcommands with or
182   *    without carrying HBDs.
183   */
184  
185  struct lpfc_sli_config_mse {
186  	uint32_t pa_lo;
187  	uint32_t pa_hi;
188  	uint32_t buf_len;
189  #define lpfc_mbox_sli_config_mse_len_SHIFT	0
190  #define lpfc_mbox_sli_config_mse_len_MASK	0xffffff
191  #define lpfc_mbox_sli_config_mse_len_WORD	buf_len
192  };
193  
194  struct lpfc_sli_config_hbd {
195  	uint32_t buf_len;
196  #define lpfc_mbox_sli_config_ecmn_hbd_len_SHIFT	0
197  #define lpfc_mbox_sli_config_ecmn_hbd_len_MASK	0xffffff
198  #define lpfc_mbox_sli_config_ecmn_hbd_len_WORD	buf_len
199  	uint32_t pa_lo;
200  	uint32_t pa_hi;
201  };
202  
203  struct lpfc_sli_config_hdr {
204  	uint32_t word1;
205  #define lpfc_mbox_hdr_emb_SHIFT		0
206  #define lpfc_mbox_hdr_emb_MASK		0x00000001
207  #define lpfc_mbox_hdr_emb_WORD		word1
208  #define lpfc_mbox_hdr_mse_cnt_SHIFT	3
209  #define lpfc_mbox_hdr_mse_cnt_MASK	0x0000001f
210  #define lpfc_mbox_hdr_mse_cnt_WORD	word1
211  	uint32_t payload_length;
212  	uint32_t tag_lo;
213  	uint32_t tag_hi;
214  	uint32_t reserved5;
215  };
216  
217  #define LPFC_CSF_BOOT_DEV		0x1D
218  #define LPFC_CSF_QUERY			0
219  #define LPFC_CSF_SAVE			1
220  
221  struct lpfc_sli_config_emb0_subsys {
222  	struct lpfc_sli_config_hdr	sli_config_hdr;
223  #define LPFC_MBX_SLI_CONFIG_MAX_MSE     19
224  	struct lpfc_sli_config_mse	mse[LPFC_MBX_SLI_CONFIG_MAX_MSE];
225  	uint32_t padding;
226  	uint32_t word64;
227  #define lpfc_emb0_subcmnd_opcode_SHIFT	0
228  #define lpfc_emb0_subcmnd_opcode_MASK	0xff
229  #define lpfc_emb0_subcmnd_opcode_WORD	word64
230  #define lpfc_emb0_subcmnd_subsys_SHIFT	8
231  #define lpfc_emb0_subcmnd_subsys_MASK	0xff
232  #define lpfc_emb0_subcmnd_subsys_WORD	word64
233  /* Subsystem FCOE (0x0C) OpCodes */
234  #define SLI_CONFIG_SUBSYS_FCOE		0x0C
235  #define FCOE_OPCODE_READ_FCF		0x08
236  #define FCOE_OPCODE_ADD_FCF		0x09
237  #define FCOE_OPCODE_SET_DPORT_MODE	0x27
238  #define FCOE_OPCODE_GET_DPORT_RESULTS	0x28
239  	uint32_t timeout;		/* comn_set_feature timeout */
240  	uint32_t request_length;	/* comn_set_feature request len */
241  	uint32_t version;		/* comn_set_feature version */
242  	uint32_t csf_feature;		/* comn_set_feature feature */
243  	uint32_t word69;		/* comn_set_feature parameter len */
244  	uint32_t word70;		/* comn_set_feature parameter val0 */
245  #define lpfc_emb0_subcmnd_csf_p0_SHIFT	0
246  #define lpfc_emb0_subcmnd_csf_p0_MASK	0x3
247  #define lpfc_emb0_subcmnd_csf_p0_WORD	word70
248  };
249  
250  struct lpfc_sli_config_emb1_subsys {
251  	struct lpfc_sli_config_hdr	sli_config_hdr;
252  	uint32_t word6;
253  #define lpfc_emb1_subcmnd_opcode_SHIFT	0
254  #define lpfc_emb1_subcmnd_opcode_MASK	0xff
255  #define lpfc_emb1_subcmnd_opcode_WORD	word6
256  #define lpfc_emb1_subcmnd_subsys_SHIFT	8
257  #define lpfc_emb1_subcmnd_subsys_MASK	0xff
258  #define lpfc_emb1_subcmnd_subsys_WORD	word6
259  /* Subsystem COMN (0x01) OpCodes */
260  #define SLI_CONFIG_SUBSYS_COMN		0x01
261  #define COMN_OPCODE_GET_PROFILE_CONFIG	0xA4
262  #define COMN_OPCODE_READ_OBJECT		0xAB
263  #define COMN_OPCODE_WRITE_OBJECT	0xAC
264  #define COMN_OPCODE_READ_OBJECT_LIST	0xAD
265  #define COMN_OPCODE_DELETE_OBJECT	0xAE
266  #define COMN_OPCODE_SET_FEATURES	0xBF
267  #define COMN_OPCODE_GET_CNTL_ADDL_ATTRIBUTES	0x79
268  #define COMN_OPCODE_GET_CNTL_ATTRIBUTES	0x20
269  	uint32_t timeout;
270  	uint32_t request_length;
271  	uint32_t word9;
272  #define lpfc_subcmnd_version_SHIFT	0
273  #define lpfc_subcmnd_version_MASK	0xff
274  #define lpfc_subcmnd_version_WORD	word9
275  	uint32_t word10;
276  #define lpfc_subcmnd_ask_rd_len_SHIFT	0
277  #define lpfc_subcmnd_ask_rd_len_MASK	0xffffff
278  #define lpfc_subcmnd_ask_rd_len_WORD	word10
279  	uint32_t rd_offset;
280  	uint32_t obj_name[26];
281  	uint32_t hbd_count;
282  #define LPFC_MBX_SLI_CONFIG_MAX_HBD	8
283  	struct lpfc_sli_config_hbd	hbd[LPFC_MBX_SLI_CONFIG_MAX_HBD];
284  };
285  
286  struct lpfc_sli_config_mbox {
287  	uint32_t word0;
288  #define lpfc_mqe_status_SHIFT		16
289  #define lpfc_mqe_status_MASK		0x0000FFFF
290  #define lpfc_mqe_status_WORD		word0
291  #define lpfc_mqe_command_SHIFT		8
292  #define lpfc_mqe_command_MASK		0x000000FF
293  #define lpfc_mqe_command_WORD		word0
294  	union {
295  		struct lpfc_sli_config_emb0_subsys sli_config_emb0_subsys;
296  		struct lpfc_sli_config_emb1_subsys sli_config_emb1_subsys;
297  	} un;
298  };
299  
300  #define LPFC_FORCED_LINK_SPEED_NOT_SUPPORTED	0
301  #define LPFC_FORCED_LINK_SPEED_SUPPORTED	1
302  struct get_forced_link_speed_support {
303  	uint32_t command;
304  };
305  struct forced_link_speed_support_reply {
306  	uint8_t supported;
307  };
308  
309  struct lpfc_bsg_ras_req {
310  	uint32_t command;
311  };
312  
313  struct lpfc_bsg_get_fwlog_req {
314  	uint32_t command;
315  	uint32_t read_size;
316  	uint32_t read_offset;
317  };
318  
319  struct lpfc_bsg_get_ras_lwpd {
320  	uint32_t offset;
321  	uint32_t wrap_count;
322  };
323  
324  struct lpfc_bsg_set_ras_config_req {
325  	uint32_t command;
326  	uint8_t action;
327  #define LPFC_RASACTION_STOP_LOGGING     0x00
328  #define LPFC_RASACTION_START_LOGGING    0x01
329  	uint8_t log_level;
330  };
331  
332  struct lpfc_bsg_get_ras_config_reply {
333  	uint8_t state;
334  #define LPFC_RASLOG_STATE_STOPPED 0x00
335  #define LPFC_RASLOG_STATE_RUNNING 0x01
336  	uint8_t log_level;
337  	uint32_t log_buff_sz;
338  };
339  
340  struct lpfc_trunk_info {
341  	uint32_t word0;
342  #define lpfc_trunk_info_link_status_SHIFT      0
343  #define lpfc_trunk_info_link_status_MASK       1
344  #define lpfc_trunk_info_link_status_WORD       word0
345  #define lpfc_trunk_info_trunk_active0_SHIFT    8
346  #define lpfc_trunk_info_trunk_active0_MASK     1
347  #define lpfc_trunk_info_trunk_active0_WORD     word0
348  #define lpfc_trunk_info_trunk_active1_SHIFT    9
349  #define lpfc_trunk_info_trunk_active1_MASK     1
350  #define lpfc_trunk_info_trunk_active1_WORD     word0
351  #define lpfc_trunk_info_trunk_active2_SHIFT    10
352  #define lpfc_trunk_info_trunk_active2_MASK     1
353  #define lpfc_trunk_info_trunk_active2_WORD     word0
354  #define lpfc_trunk_info_trunk_active3_SHIFT    11
355  #define lpfc_trunk_info_trunk_active3_MASK     1
356  #define lpfc_trunk_info_trunk_active3_WORD     word0
357  #define lpfc_trunk_info_trunk_config0_SHIFT    12
358  #define lpfc_trunk_info_trunk_config0_MASK     1
359  #define lpfc_trunk_info_trunk_config0_WORD     word0
360  #define lpfc_trunk_info_trunk_config1_SHIFT    13
361  #define lpfc_trunk_info_trunk_config1_MASK     1
362  #define lpfc_trunk_info_trunk_config1_WORD     word0
363  #define lpfc_trunk_info_trunk_config2_SHIFT    14
364  #define lpfc_trunk_info_trunk_config2_MASK     1
365  #define lpfc_trunk_info_trunk_config2_WORD     word0
366  #define lpfc_trunk_info_trunk_config3_SHIFT    15
367  #define lpfc_trunk_info_trunk_config3_MASK     1
368  #define lpfc_trunk_info_trunk_config3_WORD     word0
369  	uint16_t    port_speed;
370  	uint16_t    logical_speed;
371  	uint32_t    reserved3;
372  };
373  
374  struct get_trunk_info_req {
375  	uint32_t command;
376  };
377  
378  struct get_cgnbuf_info_req {
379  	uint32_t command;
380  	uint32_t read_size;
381  	uint32_t reset;
382  #define LPFC_BSG_CGN_RESET_STAT		1
383  };
384  
385  /* driver only */
386  #define SLI_CONFIG_NOT_HANDLED		0
387  #define SLI_CONFIG_HANDLED		1
388