1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2021 Intel Corporation 4 */ 5 6 #ifndef _ABI_GUC_KLVS_ABI_H 7 #define _ABI_GUC_KLVS_ABI_H 8 9 #include <linux/types.h> 10 11 /** 12 * DOC: GuC KLV 13 * 14 * +---+-------+--------------------------------------------------------------+ 15 * | | Bits | Description | 16 * +===+=======+==============================================================+ 17 * | 0 | 31:16 | **KEY** - KLV key identifier | 18 * | | | - `GuC Self Config KLVs`_ | 19 * | | | - `GuC VGT Policy KLVs`_ | 20 * | | | - `GuC VF Configuration KLVs`_ | 21 * | | | | 22 * | +-------+--------------------------------------------------------------+ 23 * | | 15:0 | **LEN** - length of VALUE (in 32bit dwords) | 24 * +---+-------+--------------------------------------------------------------+ 25 * | 1 | 31:0 | **VALUE** - actual value of the KLV (format depends on KEY) | 26 * +---+-------+ | 27 * |...| | | 28 * +---+-------+ | 29 * | n | 31:0 | | 30 * +---+-------+--------------------------------------------------------------+ 31 */ 32 33 #define GUC_KLV_LEN_MIN 1u 34 #define GUC_KLV_0_KEY (0xffffu << 16) 35 #define GUC_KLV_0_LEN (0xffffu << 0) 36 #define GUC_KLV_n_VALUE (0xffffffffu << 0) 37 38 /** 39 * DOC: GuC Global Config KLVs 40 * 41 * `GuC KLV`_ keys available for use with HOST2GUC_SELF_CFG_. 42 * 43 * _`GUC_KLV_GLOBAL_CFG_GMD_ID` : 0x3000 44 * Refers to 32 bit architecture version as reported by the HW IP. 45 * This key is supported on MTL+ platforms only. 46 * Requires GuC ABI 1.2+. 47 */ 48 49 #define GUC_KLV_GLOBAL_CFG_GMD_ID_KEY 0x3000u 50 #define GUC_KLV_GLOBAL_CFG_GMD_ID_LEN 1u 51 52 /** 53 * DOC: GuC Self Config KLVs 54 * 55 * `GuC KLV`_ keys available for use with HOST2GUC_SELF_CFG_. 56 * 57 * _`GUC_KLV_SELF_CFG_MEMIRQ_STATUS_ADDR` : 0x0900 58 * Refers to 64 bit Global Gfx address (in bytes) of memory based interrupts 59 * status vector for use by the GuC. 60 * 61 * _`GUC_KLV_SELF_CFG_MEMIRQ_SOURCE_ADDR` : 0x0901 62 * Refers to 64 bit Global Gfx address (in bytes) of memory based interrupts 63 * source vector for use by the GuC. 64 * 65 * _`GUC_KLV_SELF_CFG_H2G_CTB_ADDR` : 0x0902 66 * Refers to 64 bit Global Gfx address of H2G `CT Buffer`_. 67 * Should be above WOPCM address but below APIC base address for native mode. 68 * 69 * _`GUC_KLV_SELF_CFG_H2G_CTB_DESCRIPTOR_ADDR : 0x0903 70 * Refers to 64 bit Global Gfx address of H2G `CTB Descriptor`_. 71 * Should be above WOPCM address but below APIC base address for native mode. 72 * 73 * _`GUC_KLV_SELF_CFG_H2G_CTB_SIZE : 0x0904 74 * Refers to size of H2G `CT Buffer`_ in bytes. 75 * Should be a multiple of 4K. 76 * 77 * _`GUC_KLV_SELF_CFG_G2H_CTB_ADDR : 0x0905 78 * Refers to 64 bit Global Gfx address of G2H `CT Buffer`_. 79 * Should be above WOPCM address but below APIC base address for native mode. 80 * 81 * _GUC_KLV_SELF_CFG_G2H_CTB_DESCRIPTOR_ADDR : 0x0906 82 * Refers to 64 bit Global Gfx address of G2H `CTB Descriptor`_. 83 * Should be above WOPCM address but below APIC base address for native mode. 84 * 85 * _GUC_KLV_SELF_CFG_G2H_CTB_SIZE : 0x0907 86 * Refers to size of G2H `CT Buffer`_ in bytes. 87 * Should be a multiple of 4K. 88 */ 89 90 #define GUC_KLV_SELF_CFG_MEMIRQ_STATUS_ADDR_KEY 0x0900 91 #define GUC_KLV_SELF_CFG_MEMIRQ_STATUS_ADDR_LEN 2u 92 93 #define GUC_KLV_SELF_CFG_MEMIRQ_SOURCE_ADDR_KEY 0x0901 94 #define GUC_KLV_SELF_CFG_MEMIRQ_SOURCE_ADDR_LEN 2u 95 96 #define GUC_KLV_SELF_CFG_H2G_CTB_ADDR_KEY 0x0902 97 #define GUC_KLV_SELF_CFG_H2G_CTB_ADDR_LEN 2u 98 99 #define GUC_KLV_SELF_CFG_H2G_CTB_DESCRIPTOR_ADDR_KEY 0x0903 100 #define GUC_KLV_SELF_CFG_H2G_CTB_DESCRIPTOR_ADDR_LEN 2u 101 102 #define GUC_KLV_SELF_CFG_H2G_CTB_SIZE_KEY 0x0904 103 #define GUC_KLV_SELF_CFG_H2G_CTB_SIZE_LEN 1u 104 105 #define GUC_KLV_SELF_CFG_G2H_CTB_ADDR_KEY 0x0905 106 #define GUC_KLV_SELF_CFG_G2H_CTB_ADDR_LEN 2u 107 108 #define GUC_KLV_SELF_CFG_G2H_CTB_DESCRIPTOR_ADDR_KEY 0x0906 109 #define GUC_KLV_SELF_CFG_G2H_CTB_DESCRIPTOR_ADDR_LEN 2u 110 111 #define GUC_KLV_SELF_CFG_G2H_CTB_SIZE_KEY 0x0907 112 #define GUC_KLV_SELF_CFG_G2H_CTB_SIZE_LEN 1u 113 114 /* 115 * Per context scheduling policy update keys. 116 */ 117 enum { 118 GUC_CONTEXT_POLICIES_KLV_ID_EXECUTION_QUANTUM = 0x2001, 119 GUC_CONTEXT_POLICIES_KLV_ID_PREEMPTION_TIMEOUT = 0x2002, 120 GUC_CONTEXT_POLICIES_KLV_ID_SCHEDULING_PRIORITY = 0x2003, 121 GUC_CONTEXT_POLICIES_KLV_ID_PREEMPT_TO_IDLE_ON_QUANTUM_EXPIRY = 0x2004, 122 GUC_CONTEXT_POLICIES_KLV_ID_SLPM_GT_FREQUENCY = 0x2005, 123 124 GUC_CONTEXT_POLICIES_KLV_NUM_IDS = 5, 125 }; 126 127 /** 128 * DOC: GuC VGT Policy KLVs 129 * 130 * `GuC KLV`_ keys available for use with PF2GUC_UPDATE_VGT_POLICY. 131 * 132 * _`GUC_KLV_VGT_POLICY_SCHED_IF_IDLE` : 0x8001 133 * This config sets whether strict scheduling is enabled whereby any VF 134 * that doesn’t have work to submit is still allocated a fixed execution 135 * time-slice to ensure active VFs execution is always consitent even 136 * during other VF reprovisiong / rebooting events. Changing this KLV 137 * impacts all VFs and takes effect on the next VF-Switch event. 138 * 139 * :0: don't schedule idle (default) 140 * :1: schedule if idle 141 * 142 * _`GUC_KLV_VGT_POLICY_ADVERSE_SAMPLE_PERIOD` : 0x8002 143 * This config sets the sample period for tracking adverse event counters. 144 * A sample period is the period in millisecs during which events are counted. 145 * This is applicable for all the VFs. 146 * 147 * :0: adverse events are not counted (default) 148 * :n: sample period in milliseconds 149 * 150 * _`GUC_KLV_VGT_POLICY_RESET_AFTER_VF_SWITCH` : 0x8D00 151 * This enum is to reset utilized HW engine after VF Switch (i.e to clean 152 * up Stale HW register left behind by previous VF) 153 * 154 * :0: don't reset (default) 155 * :1: reset 156 */ 157 158 #define GUC_KLV_VGT_POLICY_SCHED_IF_IDLE_KEY 0x8001 159 #define GUC_KLV_VGT_POLICY_SCHED_IF_IDLE_LEN 1u 160 161 #define GUC_KLV_VGT_POLICY_ADVERSE_SAMPLE_PERIOD_KEY 0x8002 162 #define GUC_KLV_VGT_POLICY_ADVERSE_SAMPLE_PERIOD_LEN 1u 163 164 #define GUC_KLV_VGT_POLICY_RESET_AFTER_VF_SWITCH_KEY 0x8D00 165 #define GUC_KLV_VGT_POLICY_RESET_AFTER_VF_SWITCH_LEN 1u 166 167 /** 168 * DOC: GuC VF Configuration KLVs 169 * 170 * `GuC KLV`_ keys available for use with PF2GUC_UPDATE_VF_CFG. 171 * 172 * _`GUC_KLV_VF_CFG_GGTT_START` : 0x0001 173 * A 4K aligned start GTT address/offset assigned to VF. 174 * Value is 64 bits. 175 * 176 * _`GUC_KLV_VF_CFG_GGTT_SIZE` : 0x0002 177 * A 4K aligned size of GGTT assigned to VF. 178 * Value is 64 bits. 179 * 180 * _`GUC_KLV_VF_CFG_LMEM_SIZE` : 0x0003 181 * A 2M aligned size of local memory assigned to VF. 182 * Value is 64 bits. 183 * 184 * _`GUC_KLV_VF_CFG_NUM_CONTEXTS` : 0x0004 185 * Refers to the number of contexts allocated to this VF. 186 * 187 * :0: no contexts (default) 188 * :1-65535: number of contexts (Gen12) 189 * 190 * _`GUC_KLV_VF_CFG_TILE_MASK` : 0x0005 191 * For multi-tiled products, this field contains the bitwise-OR of tiles 192 * assigned to the VF. Bit-0-set means VF has access to Tile-0, 193 * Bit-31-set means VF has access to Tile-31, and etc. 194 * At least one tile will always be allocated. 195 * If all bits are zero, VF KMD should treat this as a fatal error. 196 * For, single-tile products this KLV config is ignored. 197 * 198 * _`GUC_KLV_VF_CFG_NUM_DOORBELLS` : 0x0006 199 * Refers to the number of doorbells allocated to this VF. 200 * 201 * :0: no doorbells (default) 202 * :1-255: number of doorbells (Gen12) 203 * 204 * _`GUC_KLV_VF_CFG_EXEC_QUANTUM` : 0x8A01 205 * This config sets the VFs-execution-quantum in milliseconds. 206 * GUC will attempt to obey the maximum values as much as HW is capable 207 * of and this will never be perfectly-exact (accumulated nano-second 208 * granularity) since the GPUs clock time runs off a different crystal 209 * from the CPUs clock. Changing this KLV on a VF that is currently 210 * running a context wont take effect until a new context is scheduled in. 211 * That said, when the PF is changing this value from 0x0 to 212 * a non-zero value, it might never take effect if the VF is running an 213 * infinitely long compute or shader kernel. In such a scenario, the 214 * PF would need to trigger a VM PAUSE and then change the KLV to force 215 * it to take effect. Such cases might typically happen on a 1PF+1VF 216 * Virtualization config enabled for heavier workloads like AI/ML. 217 * 218 * The max value for this KLV is 100 seconds, anything exceeding that 219 * will be clamped to the max. 220 * 221 * :0: infinite exec quantum (default) 222 * :100000: maximum exec quantum (100000ms == 100s) 223 * 224 * _`GUC_KLV_VF_CFG_PREEMPT_TIMEOUT` : 0x8A02 225 * This config sets the VF-preemption-timeout in microseconds. 226 * GUC will attempt to obey the minimum and maximum values as much as 227 * HW is capable and this will never be perfectly-exact (accumulated 228 * nano-second granularity) since the GPUs clock time runs off a 229 * different crystal from the CPUs clock. Changing this KLV on a VF 230 * that is currently running a context wont take effect until a new 231 * context is scheduled in. 232 * That said, when the PF is changing this value from 0x0 to 233 * a non-zero value, it might never take effect if the VF is running an 234 * infinitely long compute or shader kernel. 235 * In this case, the PF would need to trigger a VM PAUSE and then change 236 * the KLV to force it to take effect. Such cases might typically happen 237 * on a 1PF+1VF Virtualization config enabled for heavier workloads like 238 * AI/ML. 239 * 240 * The max value for this KLV is 100 seconds, anything exceeding that 241 * will be clamped to the max. 242 * 243 * :0: no preemption timeout (default) 244 * :100000000: maximum preemption timeout (100000000us == 100s) 245 * 246 * _`GUC_KLV_VF_CFG_THRESHOLD_CAT_ERR` : 0x8A03 247 * This config sets threshold for CAT errors caused by the VF. 248 * 249 * :0: adverse events or error will not be reported (default) 250 * :n: event occurrence count per sampling interval 251 * 252 * _`GUC_KLV_VF_CFG_THRESHOLD_ENGINE_RESET` : 0x8A04 253 * This config sets threshold for engine reset caused by the VF. 254 * 255 * :0: adverse events or error will not be reported (default) 256 * :n: event occurrence count per sampling interval 257 * 258 * _`GUC_KLV_VF_CFG_THRESHOLD_PAGE_FAULT` : 0x8A05 259 * This config sets threshold for page fault errors caused by the VF. 260 * 261 * :0: adverse events or error will not be reported (default) 262 * :n: event occurrence count per sampling interval 263 * 264 * _`GUC_KLV_VF_CFG_THRESHOLD_H2G_STORM` : 0x8A06 265 * This config sets threshold for H2G interrupts triggered by the VF. 266 * 267 * :0: adverse events or error will not be reported (default) 268 * :n: time (us) per sampling interval 269 * 270 * _`GUC_KLV_VF_CFG_THRESHOLD_IRQ_STORM` : 0x8A07 271 * This config sets threshold for GT interrupts triggered by the VF's 272 * workloads. 273 * 274 * :0: adverse events or error will not be reported (default) 275 * :n: time (us) per sampling interval 276 * 277 * _`GUC_KLV_VF_CFG_THRESHOLD_DOORBELL_STORM` : 0x8A08 278 * This config sets threshold for doorbell's ring triggered by the VF. 279 * 280 * :0: adverse events or error will not be reported (default) 281 * :n: time (us) per sampling interval 282 * 283 * _`GUC_KLV_VF_CFG_BEGIN_DOORBELL_ID` : 0x8A0A 284 * Refers to the start index of doorbell assigned to this VF. 285 * 286 * :0: (default) 287 * :1-255: number of doorbells (Gen12) 288 * 289 * _`GUC_KLV_VF_CFG_BEGIN_CONTEXT_ID` : 0x8A0B 290 * Refers to the start index in context array allocated to this VF’s use. 291 * 292 * :0: (default) 293 * :1-65535: number of contexts (Gen12) 294 */ 295 296 #define GUC_KLV_VF_CFG_GGTT_START_KEY 0x0001 297 #define GUC_KLV_VF_CFG_GGTT_START_LEN 2u 298 299 #define GUC_KLV_VF_CFG_GGTT_SIZE_KEY 0x0002 300 #define GUC_KLV_VF_CFG_GGTT_SIZE_LEN 2u 301 302 #define GUC_KLV_VF_CFG_LMEM_SIZE_KEY 0x0003 303 #define GUC_KLV_VF_CFG_LMEM_SIZE_LEN 2u 304 305 #define GUC_KLV_VF_CFG_NUM_CONTEXTS_KEY 0x0004 306 #define GUC_KLV_VF_CFG_NUM_CONTEXTS_LEN 1u 307 308 #define GUC_KLV_VF_CFG_TILE_MASK_KEY 0x0005 309 #define GUC_KLV_VF_CFG_TILE_MASK_LEN 1u 310 311 #define GUC_KLV_VF_CFG_NUM_DOORBELLS_KEY 0x0006 312 #define GUC_KLV_VF_CFG_NUM_DOORBELLS_LEN 1u 313 314 #define GUC_KLV_VF_CFG_EXEC_QUANTUM_KEY 0x8a01 315 #define GUC_KLV_VF_CFG_EXEC_QUANTUM_LEN 1u 316 #define GUC_KLV_VF_CFG_EXEC_QUANTUM_MAX_VALUE 100000u 317 318 #define GUC_KLV_VF_CFG_PREEMPT_TIMEOUT_KEY 0x8a02 319 #define GUC_KLV_VF_CFG_PREEMPT_TIMEOUT_LEN 1u 320 #define GUC_KLV_VF_CFG_PREEMPT_TIMEOUT_MAX_VALUE 100000000u 321 322 #define GUC_KLV_VF_CFG_THRESHOLD_CAT_ERR_KEY 0x8a03 323 #define GUC_KLV_VF_CFG_THRESHOLD_CAT_ERR_LEN 1u 324 325 #define GUC_KLV_VF_CFG_THRESHOLD_ENGINE_RESET_KEY 0x8a04 326 #define GUC_KLV_VF_CFG_THRESHOLD_ENGINE_RESET_LEN 1u 327 328 #define GUC_KLV_VF_CFG_THRESHOLD_PAGE_FAULT_KEY 0x8a05 329 #define GUC_KLV_VF_CFG_THRESHOLD_PAGE_FAULT_LEN 1u 330 331 #define GUC_KLV_VF_CFG_THRESHOLD_H2G_STORM_KEY 0x8a06 332 #define GUC_KLV_VF_CFG_THRESHOLD_H2G_STORM_LEN 1u 333 334 #define GUC_KLV_VF_CFG_THRESHOLD_IRQ_STORM_KEY 0x8a07 335 #define GUC_KLV_VF_CFG_THRESHOLD_IRQ_STORM_LEN 1u 336 337 #define GUC_KLV_VF_CFG_THRESHOLD_DOORBELL_STORM_KEY 0x8a08 338 #define GUC_KLV_VF_CFG_THRESHOLD_DOORBELL_STORM_LEN 1u 339 340 #define GUC_KLV_VF_CFG_BEGIN_DOORBELL_ID_KEY 0x8a0a 341 #define GUC_KLV_VF_CFG_BEGIN_DOORBELL_ID_LEN 1u 342 343 #define GUC_KLV_VF_CFG_BEGIN_CONTEXT_ID_KEY 0x8a0b 344 #define GUC_KLV_VF_CFG_BEGIN_CONTEXT_ID_LEN 1u 345 346 /* 347 * Workaround keys: 348 */ 349 enum xe_guc_klv_ids { 350 GUC_WORKAROUND_KLV_BLOCK_INTERRUPTS_WHEN_MGSR_BLOCKED = 0x9002, 351 GUC_WORKAROUND_KLV_ID_GAM_PFQ_SHADOW_TAIL_POLLING = 0x9005, 352 GUC_WORKAROUND_KLV_ID_DISABLE_MTP_DURING_ASYNC_COMPUTE = 0x9007, 353 GUC_WA_KLV_NP_RD_WRITE_TO_CLEAR_RCSM_AT_CGP_LATE_RESTORE = 0x9008, 354 GUC_WORKAROUND_KLV_ID_BACK_TO_BACK_RCS_ENGINE_RESET = 0x9009, 355 }; 356 357 #endif 358