1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Based on arch/arm/include/asm/ptrace.h 4 * 5 * Copyright (C) 1996-2003 Russell King 6 * Copyright (C) 2012 ARM Ltd. 7 */ 8 #ifndef __ASM_PTRACE_H 9 #define __ASM_PTRACE_H 10 11 #include <asm/cpufeature.h> 12 13 #include <uapi/asm/ptrace.h> 14 15 /* Current Exception Level values, as contained in CurrentEL */ 16 #define CurrentEL_EL1 (1 << 2) 17 #define CurrentEL_EL2 (2 << 2) 18 19 #define INIT_PSTATE_EL1 \ 20 (PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL1h) 21 #define INIT_PSTATE_EL2 \ 22 (PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL2h) 23 24 #include <linux/irqchip/arm-gic-v3-prio.h> 25 26 #define GIC_PRIO_IRQON GICV3_PRIO_UNMASKED 27 #define GIC_PRIO_IRQOFF GICV3_PRIO_IRQ 28 29 #define GIC_PRIO_PSR_I_SET GICV3_PRIO_PSR_I_SET 30 31 /* Additional SPSR bits not exposed in the UABI */ 32 #define PSR_MODE_THREAD_BIT (1 << 0) 33 #define PSR_IL_BIT (1 << 20) 34 35 /* AArch32-specific ptrace requests */ 36 #define COMPAT_PTRACE_GETREGS 12 37 #define COMPAT_PTRACE_SETREGS 13 38 #define COMPAT_PTRACE_GET_THREAD_AREA 22 39 #define COMPAT_PTRACE_SET_SYSCALL 23 40 #define COMPAT_PTRACE_GETVFPREGS 27 41 #define COMPAT_PTRACE_SETVFPREGS 28 42 #define COMPAT_PTRACE_GETHBPREGS 29 43 #define COMPAT_PTRACE_SETHBPREGS 30 44 45 /* SPSR_ELx bits for exceptions taken from AArch32 */ 46 #define PSR_AA32_MODE_MASK 0x0000001f 47 #define PSR_AA32_MODE_USR 0x00000010 48 #define PSR_AA32_MODE_FIQ 0x00000011 49 #define PSR_AA32_MODE_IRQ 0x00000012 50 #define PSR_AA32_MODE_SVC 0x00000013 51 #define PSR_AA32_MODE_ABT 0x00000017 52 #define PSR_AA32_MODE_HYP 0x0000001a 53 #define PSR_AA32_MODE_UND 0x0000001b 54 #define PSR_AA32_MODE_SYS 0x0000001f 55 #define PSR_AA32_T_BIT 0x00000020 56 #define PSR_AA32_F_BIT 0x00000040 57 #define PSR_AA32_I_BIT 0x00000080 58 #define PSR_AA32_A_BIT 0x00000100 59 #define PSR_AA32_E_BIT 0x00000200 60 #define PSR_AA32_PAN_BIT 0x00400000 61 #define PSR_AA32_SSBS_BIT 0x00800000 62 #define PSR_AA32_DIT_BIT 0x01000000 63 #define PSR_AA32_Q_BIT 0x08000000 64 #define PSR_AA32_V_BIT 0x10000000 65 #define PSR_AA32_C_BIT 0x20000000 66 #define PSR_AA32_Z_BIT 0x40000000 67 #define PSR_AA32_N_BIT 0x80000000 68 #define PSR_AA32_IT_MASK 0x0600fc00 /* If-Then execution state mask */ 69 #define PSR_AA32_GE_MASK 0x000f0000 70 71 #ifdef CONFIG_CPU_BIG_ENDIAN 72 #define PSR_AA32_ENDSTATE PSR_AA32_E_BIT 73 #else 74 #define PSR_AA32_ENDSTATE 0 75 #endif 76 77 /* AArch32 CPSR bits, as seen in AArch32 */ 78 #define COMPAT_PSR_DIT_BIT 0x00200000 79 80 /* 81 * These are 'magic' values for PTRACE_PEEKUSR that return info about where a 82 * process is located in memory. 83 */ 84 #define COMPAT_PT_TEXT_ADDR 0x10000 85 #define COMPAT_PT_DATA_ADDR 0x10004 86 #define COMPAT_PT_TEXT_END_ADDR 0x10008 87 88 /* 89 * If pt_regs.syscallno == NO_SYSCALL, then the thread is not executing 90 * a syscall -- i.e., its most recent entry into the kernel from 91 * userspace was not via SVC, or otherwise a tracer cancelled the syscall. 92 * 93 * This must have the value -1, for ABI compatibility with ptrace etc. 94 */ 95 #define NO_SYSCALL (-1) 96 97 #ifndef __ASSEMBLY__ 98 #include <linux/bug.h> 99 #include <linux/types.h> 100 101 /* sizeof(struct user) for AArch32 */ 102 #define COMPAT_USER_SZ 296 103 104 /* Architecturally defined mapping between AArch32 and AArch64 registers */ 105 #define compat_usr(x) regs[(x)] 106 #define compat_fp regs[11] 107 #define compat_sp regs[13] 108 #define compat_lr regs[14] 109 #define compat_sp_hyp regs[15] 110 #define compat_lr_irq regs[16] 111 #define compat_sp_irq regs[17] 112 #define compat_lr_svc regs[18] 113 #define compat_sp_svc regs[19] 114 #define compat_lr_abt regs[20] 115 #define compat_sp_abt regs[21] 116 #define compat_lr_und regs[22] 117 #define compat_sp_und regs[23] 118 #define compat_r8_fiq regs[24] 119 #define compat_r9_fiq regs[25] 120 #define compat_r10_fiq regs[26] 121 #define compat_r11_fiq regs[27] 122 #define compat_r12_fiq regs[28] 123 #define compat_sp_fiq regs[29] 124 #define compat_lr_fiq regs[30] 125 compat_psr_to_pstate(const unsigned long psr)126 static inline unsigned long compat_psr_to_pstate(const unsigned long psr) 127 { 128 unsigned long pstate; 129 130 pstate = psr & ~COMPAT_PSR_DIT_BIT; 131 132 if (psr & COMPAT_PSR_DIT_BIT) 133 pstate |= PSR_AA32_DIT_BIT; 134 135 return pstate; 136 } 137 pstate_to_compat_psr(const unsigned long pstate)138 static inline unsigned long pstate_to_compat_psr(const unsigned long pstate) 139 { 140 unsigned long psr; 141 142 psr = pstate & ~PSR_AA32_DIT_BIT; 143 144 if (pstate & PSR_AA32_DIT_BIT) 145 psr |= COMPAT_PSR_DIT_BIT; 146 147 return psr; 148 } 149 150 /* 151 * This struct defines the way the registers are stored on the stack during an 152 * exception. Note that sizeof(struct pt_regs) has to be a multiple of 16 (for 153 * stack alignment). struct user_pt_regs must form a prefix of struct pt_regs. 154 */ 155 struct pt_regs { 156 union { 157 struct user_pt_regs user_regs; 158 struct { 159 u64 regs[31]; 160 u64 sp; 161 u64 pc; 162 u64 pstate; 163 }; 164 }; 165 u64 orig_x0; 166 #ifdef __AARCH64EB__ 167 u32 unused2; 168 s32 syscallno; 169 #else 170 s32 syscallno; 171 u32 unused2; 172 #endif 173 u64 sdei_ttbr1; 174 /* Only valid when ARM64_HAS_GIC_PRIO_MASKING is enabled. */ 175 u64 pmr_save; 176 u64 stackframe[2]; 177 178 /* Only valid for some EL1 exceptions. */ 179 u64 lockdep_hardirqs; 180 u64 exit_rcu; 181 }; 182 in_syscall(struct pt_regs const * regs)183 static inline bool in_syscall(struct pt_regs const *regs) 184 { 185 return regs->syscallno != NO_SYSCALL; 186 } 187 forget_syscall(struct pt_regs * regs)188 static inline void forget_syscall(struct pt_regs *regs) 189 { 190 regs->syscallno = NO_SYSCALL; 191 } 192 193 #define MAX_REG_OFFSET offsetof(struct pt_regs, pstate) 194 195 #define arch_has_single_step() (1) 196 197 #ifdef CONFIG_COMPAT 198 #define compat_thumb_mode(regs) \ 199 (((regs)->pstate & PSR_AA32_T_BIT)) 200 #else 201 #define compat_thumb_mode(regs) (0) 202 #endif 203 204 #define user_mode(regs) \ 205 (((regs)->pstate & PSR_MODE_MASK) == PSR_MODE_EL0t) 206 207 #define compat_user_mode(regs) \ 208 (((regs)->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK)) == \ 209 (PSR_MODE32_BIT | PSR_MODE_EL0t)) 210 211 #define processor_mode(regs) \ 212 ((regs)->pstate & PSR_MODE_MASK) 213 214 #define irqs_priority_unmasked(regs) \ 215 (system_uses_irq_prio_masking() ? \ 216 (regs)->pmr_save == GIC_PRIO_IRQON : \ 217 true) 218 219 #define interrupts_enabled(regs) \ 220 (!((regs)->pstate & PSR_I_BIT) && irqs_priority_unmasked(regs)) 221 222 #define fast_interrupts_enabled(regs) \ 223 (!((regs)->pstate & PSR_F_BIT)) 224 user_stack_pointer(struct pt_regs * regs)225 static inline unsigned long user_stack_pointer(struct pt_regs *regs) 226 { 227 if (compat_user_mode(regs)) 228 return regs->compat_sp; 229 return regs->sp; 230 } 231 232 extern int regs_query_register_offset(const char *name); 233 extern unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, 234 unsigned int n); 235 236 /** 237 * regs_get_register() - get register value from its offset 238 * @regs: pt_regs from which register value is gotten 239 * @offset: offset of the register. 240 * 241 * regs_get_register returns the value of a register whose offset from @regs. 242 * The @offset is the offset of the register in struct pt_regs. 243 * If @offset is bigger than MAX_REG_OFFSET, this returns 0. 244 */ regs_get_register(struct pt_regs * regs,unsigned int offset)245 static inline u64 regs_get_register(struct pt_regs *regs, unsigned int offset) 246 { 247 u64 val = 0; 248 249 WARN_ON(offset & 7); 250 251 offset >>= 3; 252 switch (offset) { 253 case 0 ... 30: 254 val = regs->regs[offset]; 255 break; 256 case offsetof(struct pt_regs, sp) >> 3: 257 val = regs->sp; 258 break; 259 case offsetof(struct pt_regs, pc) >> 3: 260 val = regs->pc; 261 break; 262 case offsetof(struct pt_regs, pstate) >> 3: 263 val = regs->pstate; 264 break; 265 default: 266 val = 0; 267 } 268 269 return val; 270 } 271 272 /* 273 * Read a register given an architectural register index r. 274 * This handles the common case where 31 means XZR, not SP. 275 */ pt_regs_read_reg(const struct pt_regs * regs,int r)276 static inline unsigned long pt_regs_read_reg(const struct pt_regs *regs, int r) 277 { 278 return (r == 31) ? 0 : regs->regs[r]; 279 } 280 281 /* 282 * Write a register given an architectural register index r. 283 * This handles the common case where 31 means XZR, not SP. 284 */ pt_regs_write_reg(struct pt_regs * regs,int r,unsigned long val)285 static inline void pt_regs_write_reg(struct pt_regs *regs, int r, 286 unsigned long val) 287 { 288 if (r != 31) 289 regs->regs[r] = val; 290 } 291 292 /* Valid only for Kernel mode traps. */ kernel_stack_pointer(struct pt_regs * regs)293 static inline unsigned long kernel_stack_pointer(struct pt_regs *regs) 294 { 295 return regs->sp; 296 } 297 regs_return_value(struct pt_regs * regs)298 static inline unsigned long regs_return_value(struct pt_regs *regs) 299 { 300 unsigned long val = regs->regs[0]; 301 302 /* 303 * Audit currently uses regs_return_value() instead of 304 * syscall_get_return_value(). Apply the same sign-extension here until 305 * audit is updated to use syscall_get_return_value(). 306 */ 307 if (compat_user_mode(regs)) 308 val = sign_extend64(val, 31); 309 310 return val; 311 } 312 regs_set_return_value(struct pt_regs * regs,unsigned long rc)313 static inline void regs_set_return_value(struct pt_regs *regs, unsigned long rc) 314 { 315 regs->regs[0] = rc; 316 } 317 318 /** 319 * regs_get_kernel_argument() - get Nth function argument in kernel 320 * @regs: pt_regs of that context 321 * @n: function argument number (start from 0) 322 * 323 * regs_get_argument() returns @n th argument of the function call. 324 * 325 * Note that this chooses the most likely register mapping. In very rare 326 * cases this may not return correct data, for example, if one of the 327 * function parameters is 16 bytes or bigger. In such cases, we cannot 328 * get access the parameter correctly and the register assignment of 329 * subsequent parameters will be shifted. 330 */ regs_get_kernel_argument(struct pt_regs * regs,unsigned int n)331 static inline unsigned long regs_get_kernel_argument(struct pt_regs *regs, 332 unsigned int n) 333 { 334 #define NR_REG_ARGUMENTS 8 335 if (n < NR_REG_ARGUMENTS) 336 return pt_regs_read_reg(regs, n); 337 return 0; 338 } 339 340 /* We must avoid circular header include via sched.h */ 341 struct task_struct; 342 int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task); 343 instruction_pointer(struct pt_regs * regs)344 static inline unsigned long instruction_pointer(struct pt_regs *regs) 345 { 346 return regs->pc; 347 } instruction_pointer_set(struct pt_regs * regs,unsigned long val)348 static inline void instruction_pointer_set(struct pt_regs *regs, 349 unsigned long val) 350 { 351 regs->pc = val; 352 } 353 frame_pointer(struct pt_regs * regs)354 static inline unsigned long frame_pointer(struct pt_regs *regs) 355 { 356 return regs->regs[29]; 357 } 358 359 #define procedure_link_pointer(regs) ((regs)->regs[30]) 360 procedure_link_pointer_set(struct pt_regs * regs,unsigned long val)361 static inline void procedure_link_pointer_set(struct pt_regs *regs, 362 unsigned long val) 363 { 364 procedure_link_pointer(regs) = val; 365 } 366 367 extern unsigned long profile_pc(struct pt_regs *regs); 368 369 #endif /* __ASSEMBLY__ */ 370 #endif 371