1  /*
2   * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
3   * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
4   *
5   * Permission to use, copy, modify, and/or distribute this software for any
6   * purpose with or without fee is hereby granted, provided that the above
7   * copyright notice and this permission notice appear in all copies.
8   *
9   * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10   * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11   * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12   * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13   * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14   * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15   * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16   */
17  
18  #ifndef __WLAN_DP_FISA_RX_H__
19  #define __WLAN_DP_FISA_RX_H__
20  
21  #ifdef WLAN_SUPPORT_RX_FISA
22  #include <dp_types.h>
23  #endif
24  #include <qdf_status.h>
25  #include <wlan_dp_priv.h>
26  
27  //#define FISA_DEBUG_ENABLE
28  
29  #ifdef FISA_DEBUG_ENABLE
30  #define dp_fisa_debug dp_info
31  #else
32  #define dp_fisa_debug(params...)
33  #endif
34  
35  #if defined(WLAN_SUPPORT_RX_FISA)
36  
37  /*
38   * Below is different types of max MSDU aggregation supported in FISA.
39   * Host should send one value less so that F.W will increment one
40   * and program in RXOLE reg
41   */
42  #define DP_RX_FISA_MAX_AGGR_COUNT_DEFAULT	(16 - 1)
43  #define	DP_RX_FISA_MAX_AGGR_COUNT_1		(32 - 1)
44  
45  #define FSE_CACHE_FLUSH_TIME_OUT	5 /* milliSeconds */
46  #define FISA_UDP_MAX_DATA_LEN		1470 /* udp max data length */
47  #define FISA_UDP_HDR_LEN		8 /* udp header length */
48  /* single packet max cumulative ip length */
49  #define FISA_MAX_SINGLE_CUMULATIVE_IP_LEN \
50  	(FISA_UDP_MAX_DATA_LEN + FISA_UDP_HDR_LEN)
51  /* max flow cumulative ip length */
52  #define FISA_FLOW_MAX_CUMULATIVE_IP_LEN \
53  	(FISA_MAX_SINGLE_CUMULATIVE_IP_LEN * FISA_FLOW_MAX_AGGR_COUNT)
54  
55  /* minimal pure UDP data length required for FISA */
56  #define FISA_MIN_UDP_DATA_LEN 64
57  /* minimal length without L2/L3 header required for FISA */
58  #define FISA_MIN_L4_AND_DATA_LEN \
59  	(FISA_UDP_HDR_LEN + FISA_MIN_UDP_DATA_LEN)
60  
61  /* CMEM size for FISA FST 16K */
62  #define DP_CMEM_FST_SIZE 16384
63  
64  #define IPSEC_PORT 500
65  #define IPSEC_NAT_PORT 4500
66  #define DNS_SERVER_PORT 53
67  
68  #define DP_FT_LOCK_MAX_RECORDS 32
69  
70  #define FISA_FT_ENTRY_AGING_US	1000000
71  
72  struct dp_fisa_rx_fst_update_elem {
73  	/* Do not add new entries here */
74  	qdf_list_node_t node;
75  	struct cdp_rx_flow_tuple_info flow_tuple_info;
76  	struct dp_vdev *vdev;
77  	uint8_t vdev_id;
78  	uint32_t flow_idx;
79  	uint32_t reo_dest_indication;
80  	bool is_tcp_flow;
81  	bool is_udp_flow;
82  	u8 reo_id;
83  };
84  
85  enum dp_ft_lock_event_type {
86  	DP_FT_LOCK_EVENT,
87  	DP_FT_UNLOCK_EVENT,
88  };
89  
90  struct dp_ft_lock_record {
91  	const char *func;
92  	int cpu_id;
93  	uint64_t timestamp;
94  	enum dp_ft_lock_event_type type;
95  };
96  
97  struct dp_ft_lock_history {
98  	uint32_t record_idx;
99  	struct dp_ft_lock_record ft_lock_rec[DP_FT_LOCK_MAX_RECORDS];
100  };
101  
102  /**
103   * dp_fisa_rx() - FISA Rx packet delivery entry function
104   * @dp_ctx: DP component handle
105   * @vdev: core txrx vdev
106   * @nbuf_list: Delivery list of nbufs
107   *
108   * Return: Success on aggregation
109   */
110  QDF_STATUS dp_fisa_rx(struct wlan_dp_psoc_context *dp_ctx,
111  		      struct dp_vdev *vdev,
112  		      qdf_nbuf_t nbuf_list);
113  
114  /**
115   * dp_rx_fisa_flush_by_ctx_id() - FISA Rx flush function to flush
116   *				  aggregation at end of NAPI
117   * @soc: core txrx main context
118   * @napi_id: Flows which are rxed on the NAPI ID to be flushed
119   *
120   * Return: QDF_STATUS
121   */
122  QDF_STATUS dp_rx_fisa_flush_by_ctx_id(struct dp_soc *soc, int napi_id);
123  
124  /**
125   * dp_rx_fisa_flush_by_vdev_id() - Flush fisa aggregates per vdev id
126   * @soc: core txrx main context
127   * @vdev_id: vdev ID
128   *
129   * Return: Success on flushing the flows for the vdev
130   */
131  QDF_STATUS dp_rx_fisa_flush_by_vdev_id(struct dp_soc *soc, uint8_t vdev_id);
132  
133  /**
134   * dp_fisa_rx_fst_update_work() - Work functions for FST updates
135   * @arg: argument passed to the work function
136   *
137   * Return: None
138   */
139  void dp_fisa_rx_fst_update_work(void *arg);
140  
141  /**
142   * dp_suspend_fse_cache_flush() - Suspend FSE cache flush
143   * @dp_ctx: DP component context
144   *
145   * Return: None
146   */
147  void dp_suspend_fse_cache_flush(struct wlan_dp_psoc_context *dp_ctx);
148  
149  /**
150   * dp_rx_fst_attach() - Initialize Rx FST and setup necessary parameters
151   * @dp_ctx: DP component context
152   *
153   * Return: Handle to flow search table entry
154   */
155  QDF_STATUS dp_rx_fst_attach(struct wlan_dp_psoc_context *dp_ctx);
156  
157  /**
158   * dp_rx_fst_target_config() - Configure RX OLE FSE engine in HW
159   * @dp_ctx: DP component context
160   *
161   * Return: Success
162   */
163  QDF_STATUS dp_rx_fst_target_config(struct wlan_dp_psoc_context *dp_ctx);
164  
165  /**
166   * dp_rx_fisa_config() - Configure FISA related settings
167   * @dp_ctx: DP component context
168   *
169   * Return: QDF_STATUS
170   */
171  QDF_STATUS dp_rx_fisa_config(struct wlan_dp_psoc_context *dp_ctx);
172  
173  /**
174   * dp_rx_fst_detach() - De-initialize Rx FST
175   * @dp_ctx: DP component context
176   *
177   * Return: None
178   */
179  void dp_rx_fst_detach(struct wlan_dp_psoc_context *dp_ctx);
180  
181  /**
182   * dp_resume_fse_cache_flush() - Resume FSE cache flush
183   * @dp_ctx: DP component context
184   *
185   * Return: None
186   */
187  void dp_resume_fse_cache_flush(struct wlan_dp_psoc_context *dp_ctx);
188  
189  /**
190   * dp_rx_fst_update_pm_suspend_status() - Update Suspend status in FISA
191   * @dp_ctx: DP component context
192   * @suspended: Flag to indicate suspend or not
193   *
194   * Return: None
195   */
196  void dp_rx_fst_update_pm_suspend_status(struct wlan_dp_psoc_context *dp_ctx,
197  					bool suspended);
198  
199  /**
200   * dp_rx_fst_requeue_wq() - Re-queue pending work queue tasks
201   * @dp_ctx: DP component context
202   *
203   * Return: None
204   */
205  void dp_rx_fst_requeue_wq(struct wlan_dp_psoc_context *dp_ctx);
206  
207  void dp_print_fisa_rx_stats(enum cdp_fisa_stats_id stats_id);
208  
209  /**
210   * dp_fisa_cfg_init() - FISA INI items init
211   * @config: SoC CFG config
212   * @psoc: Objmgr PSoC handle
213   *
214   * Return: None
215   */
216  void dp_fisa_cfg_init(struct wlan_dp_psoc_cfg *config,
217  		      struct wlan_objmgr_psoc *psoc);
218  
219  /**
220   * dp_set_fst_in_cmem() - Set flag to indicate FST is in CMEM
221   * @fst_in_cmem: Flag to indicate FST is in CMEM
222   *
223   * Return: None
224   */
225  void dp_set_fst_in_cmem(bool fst_in_cmem);
226  
227  /**
228   * dp_set_fisa_dynamic_aggr_size_support() - Set flag to indicate dynamic
229   *					     aggregation size support
230   * @dynamic_aggr_size_support: Flag to indicate dynamic aggregation support
231   *
232   * Return: None
233   */
234  void dp_set_fisa_dynamic_aggr_size_support(bool dynamic_aggr_size_support);
235  #else
236  static inline void
dp_rx_fst_update_pm_suspend_status(struct wlan_dp_psoc_context * dp_ctx,bool suspended)237  dp_rx_fst_update_pm_suspend_status(struct wlan_dp_psoc_context *dp_ctx,
238  				   bool suspended)
239  {
240  }
241  
dp_print_fisa_rx_stats(enum cdp_fisa_stats_id stats_id)242  static inline void dp_print_fisa_rx_stats(enum cdp_fisa_stats_id stats_id)
243  {
244  }
245  
dp_fisa_cfg_init(struct wlan_dp_psoc_cfg * config,struct wlan_objmgr_psoc * psoc)246  static inline void dp_fisa_cfg_init(struct wlan_dp_psoc_cfg *config,
247  				    struct wlan_objmgr_psoc *psoc)
248  {
249  }
250  
dp_set_fst_in_cmem(bool fst_in_cmem)251  static inline void dp_set_fst_in_cmem(bool fst_in_cmem)
252  {
253  }
254  
255  static inline void
dp_set_fisa_dynamic_aggr_size_support(bool dynamic_aggr_size_support)256  dp_set_fisa_dynamic_aggr_size_support(bool dynamic_aggr_size_support)
257  {
258  }
259  #endif
260  #endif
261