1# SPDX-License-Identifier: GPL-2.0-only
2menuconfig ARCH_AT91
3	bool "AT91/Microchip SoCs"
4	depends on (CPU_LITTLE_ENDIAN && (ARCH_MULTI_V4T || ARCH_MULTI_V5)) || \
5		ARCH_MULTI_V7 || ARM_SINGLE_ARMV7M
6	select ARM_CPU_SUSPEND if PM && ARCH_MULTI_V7
7	select COMMON_CLK_AT91
8	select GPIOLIB
9	select PINCTRL
10	select SOC_BUS
11
12if ARCH_AT91
13config SOC_SAMV7
14	bool "SAM Cortex-M7 family" if ARM_SINGLE_ARMV7M
15	select COMMON_CLK_AT91
16	select PINCTRL_AT91
17	help
18	  Select this if you are using an SoC from Microchip's SAME7, SAMS7 or SAMV7
19	  families.
20
21config SOC_SAMA5D2
22	bool "SAMA5D2 family"
23	depends on ARCH_MULTI_V7
24	select SOC_SAMA5
25	select CACHE_L2X0
26	select HAVE_AT91_UTMI
27	select HAVE_AT91_USB_CLK
28	select HAVE_AT91_H32MX
29	select HAVE_AT91_GENERATED_CLK
30	select HAVE_AT91_AUDIO_PLL
31	select HAVE_AT91_I2S_MUX_CLK
32	select PINCTRL_AT91PIO4
33	help
34	  Select this if ou are using one of Microchip's SAMA5D2 family SoC.
35
36config SOC_SAMA5D3
37	bool "SAMA5D3 family"
38	depends on ARCH_MULTI_V7
39	select SOC_SAMA5
40	select HAVE_AT91_UTMI
41	select HAVE_AT91_SMD
42	select HAVE_AT91_USB_CLK
43	select PINCTRL_AT91
44	help
45	  Select this if you are using one of Microchip's SAMA5D3 family SoC.
46	  This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36.
47
48config SOC_SAMA5D4
49	bool "SAMA5D4 family"
50	depends on ARCH_MULTI_V7
51	select SOC_SAMA5
52	select CACHE_L2X0
53	select HAVE_AT91_UTMI
54	select HAVE_AT91_SMD
55	select HAVE_AT91_USB_CLK
56	select HAVE_AT91_H32MX
57	select PINCTRL_AT91
58	help
59	  Select this if you are using one of Microchip's SAMA5D4 family SoC.
60
61config SOC_SAMA7G5
62	bool "SAMA7G5 family"
63	depends on ARCH_MULTI_V7
64	select HAVE_AT91_GENERATED_CLK
65	select HAVE_AT91_SAM9X60_PLL
66	select HAVE_AT91_UTMI
67	select PM_OPP
68	select SOC_SAMA7
69	help
70	  Select this if you are using one of Microchip's SAMA7G5 family SoC.
71
72config SOC_LAN966
73	bool "ARMv7 based Microchip LAN966 SoC family"
74	depends on ARCH_MULTI_V7
75	select DW_APB_TIMER_OF
76	select ARM_GIC
77	select MEMORY
78	help
79	  This enables support for ARMv7 based Microchip LAN966 SoC family.
80
81config SOC_AT91RM9200
82	bool "AT91RM9200"
83	depends on ARCH_MULTI_V4T
84	select ATMEL_AIC_IRQ
85	select ATMEL_PM if PM
86	select ATMEL_ST
87	select CPU_ARM920T
88	select HAVE_AT91_USB_CLK
89	select PINCTRL_AT91
90	select SOC_SAM_V4_V5
91	select SRAM if PM
92	help
93	  Select this if you are using Microchip's AT91RM9200 SoC.
94
95config SOC_AT91SAM9
96	bool "AT91SAM9"
97	depends on ARCH_MULTI_V5
98	select ATMEL_AIC_IRQ
99	select ATMEL_PM if PM
100	select CPU_ARM926T
101	select HAVE_AT91_SMD
102	select HAVE_AT91_USB_CLK
103	select HAVE_AT91_UTMI
104	select HAVE_FB_ATMEL
105	select MEMORY
106	select PINCTRL_AT91
107	select SOC_SAM_V4_V5
108	select SRAM if PM
109	help
110	  Select this if you are using one of those Microchip SoC:
111	    AT91SAM9260
112	    AT91SAM9261
113	    AT91SAM9263
114	    AT91SAM9G15
115	    AT91SAM9G20
116	    AT91SAM9G25
117	    AT91SAM9G35
118	    AT91SAM9G45
119	    AT91SAM9G46
120	    AT91SAM9M10
121	    AT91SAM9M11
122	    AT91SAM9N12
123	    AT91SAM9RL
124	    AT91SAM9X25
125	    AT91SAM9X35
126	    AT91SAM9XE
127
128config SOC_SAM9X60
129	bool "SAM9X60"
130	depends on ARCH_MULTI_V5
131	select ATMEL_AIC5_IRQ
132	select ATMEL_PM if PM
133	select CPU_ARM926T
134	select HAVE_AT91_USB_CLK
135	select HAVE_AT91_GENERATED_CLK
136	select HAVE_AT91_SAM9X60_PLL
137	select MEMORY
138	select PINCTRL_AT91
139	select SOC_SAM_V4_V5
140	select SRAM if PM
141	help
142	  Select this if you are using Microchip's SAM9X60 SoC
143
144config SOC_SAM9X7
145	bool "SAM9X7"
146	depends on ARCH_MULTI_V5
147	select ATMEL_AIC5_IRQ
148	select ATMEL_PM if PM
149	select CPU_ARM926T
150	select HAVE_AT91_USB_CLK
151	select HAVE_AT91_GENERATED_CLK
152	select HAVE_AT91_SAM9X60_PLL
153	select MEMORY
154	select PINCTRL_AT91
155	select SOC_SAM_V4_V5
156	select SRAM if PM
157	help
158	  Select this if you are using Microchip's SAM9X7 SoC
159
160comment "Clocksource driver selection"
161
162config ATMEL_CLOCKSOURCE_PIT
163	bool "Periodic Interval Timer (PIT) support"
164	depends on SOC_AT91SAM9 || SOC_SAM9X60 || SOC_SAM9X7 || SOC_SAMA5
165	default SOC_AT91SAM9 || SOC_SAMA5
166	select ATMEL_PIT
167	help
168	  Select this to get a clocksource based on the Atmel Periodic Interval
169	  Timer. It has a relatively low resolution and the TC Block clocksource
170	  should be preferred.
171
172config ATMEL_CLOCKSOURCE_TCB
173	bool "Timer Counter Blocks (TCB) support"
174	default SOC_AT91RM9200 || SOC_AT91SAM9 || SOC_SAM9X60 || SOC_SAM9X7 || SOC_SAMA5
175	select ATMEL_TCB_CLKSRC
176	help
177	  Select this to get a high precision clocksource based on a
178	  TC block with a 5+ MHz base clock rate.
179	  On platforms with 16-bit counters, two timer channels are combined
180	  to make a single 32-bit timer.
181	  It can also be used as a clock event device supporting oneshot mode.
182
183config MICROCHIP_CLOCKSOURCE_PIT64B
184	bool "64-bit Periodic Interval Timer (PIT64B) support"
185	default SOC_SAM9X60 || SOC_SAM9X7 || SOC_SAMA7
186	select MICROCHIP_PIT64B
187	help
188	  Select this to get a high resolution clockevent (SAM9X60) or
189	  clocksource and clockevent (SAMA7G5) based on Microchip 64-bit
190	  Periodic Interval Timer.
191
192config HAVE_AT91_UTMI
193	bool
194
195config HAVE_AT91_USB_CLK
196	bool
197
198config COMMON_CLK_AT91
199	bool
200	select MFD_SYSCON
201
202config HAVE_AT91_SMD
203	bool
204
205config HAVE_AT91_H32MX
206	bool
207
208config HAVE_AT91_GENERATED_CLK
209	bool
210
211config HAVE_AT91_AUDIO_PLL
212	bool
213
214config HAVE_AT91_I2S_MUX_CLK
215	bool
216
217config HAVE_AT91_SAM9X60_PLL
218	bool
219
220config SOC_SAM_V4_V5
221	bool
222
223config SOC_SAM_V7
224	bool
225
226config SOC_SAMA5
227	bool
228	select ATMEL_AIC5_IRQ
229	select ATMEL_PM if PM
230	select MEMORY
231	select SOC_SAM_V7
232	select SRAM if PM
233
234config ATMEL_PM
235	bool
236
237config ATMEL_SECURE_PM
238	bool "Atmel Secure PM support"
239	depends on SOC_SAMA5D2 && ATMEL_PM
240	select ARM_PSCI
241	help
242	  When running under a TEE, the suspend mode must be requested to be set
243	  at TEE level. When enable, this option will use secure monitor calls
244	  to set the suspend level. PSCI is then used to enter suspend.
245
246config SOC_SAMA7
247	bool
248	select ARM_GIC
249	select ATMEL_PM if PM
250	select MEMORY
251	select SOC_SAM_V7
252	select SRAM if PM
253endif
254