1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Functions and registers to access AXP20X power management chip.
4 *
5 * Copyright (C) 2013, Carlo Caione <carlo@caione.org>
6 */
7
8 #ifndef __LINUX_MFD_AXP20X_H
9 #define __LINUX_MFD_AXP20X_H
10
11 #include <linux/regmap.h>
12
13 enum axp20x_variants {
14 AXP152_ID = 0,
15 AXP192_ID,
16 AXP202_ID,
17 AXP209_ID,
18 AXP221_ID,
19 AXP223_ID,
20 AXP288_ID,
21 AXP313A_ID,
22 AXP717_ID,
23 AXP803_ID,
24 AXP806_ID,
25 AXP809_ID,
26 AXP813_ID,
27 AXP15060_ID,
28 NR_AXP20X_VARIANTS,
29 };
30
31 #define AXP192_DATACACHE(m) (0x06 + (m))
32 #define AXP20X_DATACACHE(m) (0x04 + (m))
33
34 /* Power supply */
35 #define AXP152_PWR_OP_MODE 0x01
36 #define AXP152_LDO3456_DC1234_CTRL 0x12
37 #define AXP152_ALDO_OP_MODE 0x13
38 #define AXP152_LDO0_CTRL 0x15
39 #define AXP152_DCDC2_V_OUT 0x23
40 #define AXP152_DCDC2_V_RAMP 0x25
41 #define AXP152_DCDC1_V_OUT 0x26
42 #define AXP152_DCDC3_V_OUT 0x27
43 #define AXP152_ALDO12_V_OUT 0x28
44 #define AXP152_DLDO1_V_OUT 0x29
45 #define AXP152_DLDO2_V_OUT 0x2a
46 #define AXP152_DCDC4_V_OUT 0x2b
47 #define AXP152_V_OFF 0x31
48 #define AXP152_OFF_CTRL 0x32
49 #define AXP152_PEK_KEY 0x36
50 #define AXP152_DCDC_FREQ 0x37
51 #define AXP152_DCDC_MODE 0x80
52
53 #define AXP192_USB_OTG_STATUS 0x04
54 #define AXP192_PWR_OUT_CTRL 0x12
55 #define AXP192_DCDC2_V_OUT 0x23
56 #define AXP192_DCDC1_V_OUT 0x26
57 #define AXP192_DCDC3_V_OUT 0x27
58 #define AXP192_LDO2_3_V_OUT 0x28
59
60 #define AXP20X_PWR_INPUT_STATUS 0x00
61 #define AXP20X_PWR_OP_MODE 0x01
62 #define AXP20X_USB_OTG_STATUS 0x02
63 #define AXP20X_PWR_OUT_CTRL 0x12
64 #define AXP20X_DCDC2_V_OUT 0x23
65 #define AXP20X_DCDC2_LDO3_V_RAMP 0x25
66 #define AXP20X_DCDC3_V_OUT 0x27
67 #define AXP20X_LDO24_V_OUT 0x28
68 #define AXP20X_LDO3_V_OUT 0x29
69 #define AXP20X_VBUS_IPSOUT_MGMT 0x30
70 #define AXP20X_V_OFF 0x31
71 #define AXP20X_OFF_CTRL 0x32
72 #define AXP20X_CHRG_CTRL1 0x33
73 #define AXP20X_CHRG_CTRL2 0x34
74 #define AXP20X_CHRG_BAK_CTRL 0x35
75 #define AXP20X_PEK_KEY 0x36
76 #define AXP20X_DCDC_FREQ 0x37
77 #define AXP20X_V_LTF_CHRG 0x38
78 #define AXP20X_V_HTF_CHRG 0x39
79 #define AXP20X_APS_WARN_L1 0x3a
80 #define AXP20X_APS_WARN_L2 0x3b
81 #define AXP20X_V_LTF_DISCHRG 0x3c
82 #define AXP20X_V_HTF_DISCHRG 0x3d
83
84 #define AXP22X_PWR_OUT_CTRL1 0x10
85 #define AXP22X_PWR_OUT_CTRL2 0x12
86 #define AXP22X_PWR_OUT_CTRL3 0x13
87 #define AXP22X_DLDO1_V_OUT 0x15
88 #define AXP22X_DLDO2_V_OUT 0x16
89 #define AXP22X_DLDO3_V_OUT 0x17
90 #define AXP22X_DLDO4_V_OUT 0x18
91 #define AXP22X_ELDO1_V_OUT 0x19
92 #define AXP22X_ELDO2_V_OUT 0x1a
93 #define AXP22X_ELDO3_V_OUT 0x1b
94 #define AXP22X_DC5LDO_V_OUT 0x1c
95 #define AXP22X_DCDC1_V_OUT 0x21
96 #define AXP22X_DCDC2_V_OUT 0x22
97 #define AXP22X_DCDC3_V_OUT 0x23
98 #define AXP22X_DCDC4_V_OUT 0x24
99 #define AXP22X_DCDC5_V_OUT 0x25
100 #define AXP22X_DCDC23_V_RAMP_CTRL 0x27
101 #define AXP22X_ALDO1_V_OUT 0x28
102 #define AXP22X_ALDO2_V_OUT 0x29
103 #define AXP22X_ALDO3_V_OUT 0x2a
104 #define AXP22X_CHRG_CTRL3 0x35
105
106 #define AXP313A_ON_INDICATE 0x00
107 #define AXP313A_OUTPUT_CONTROL 0x10
108 #define AXP313A_DCDC1_CONTROL 0x13
109 #define AXP313A_DCDC2_CONTROL 0x14
110 #define AXP313A_DCDC3_CONTROL 0x15
111 #define AXP313A_ALDO1_CONTROL 0x16
112 #define AXP313A_DLDO1_CONTROL 0x17
113 #define AXP313A_SHUTDOWN_CTRL 0x1a
114 #define AXP313A_IRQ_EN 0x20
115 #define AXP313A_IRQ_STATE 0x21
116
117 #define AXP717_ON_INDICATE 0x00
118 #define AXP717_PMU_STATUS_2 0x01
119 #define AXP717_BC_DETECT 0x05
120 #define AXP717_PMU_FAULT 0x08
121 #define AXP717_MODULE_EN_CONTROL_1 0x0b
122 #define AXP717_MIN_SYS_V_CONTROL 0x15
123 #define AXP717_INPUT_VOL_LIMIT_CTRL 0x16
124 #define AXP717_INPUT_CUR_LIMIT_CTRL 0x17
125 #define AXP717_MODULE_EN_CONTROL_2 0x19
126 #define AXP717_BOOST_CONTROL 0x1e
127 #define AXP717_VSYS_V_POWEROFF 0x24
128 #define AXP717_IRQ0_EN 0x40
129 #define AXP717_IRQ1_EN 0x41
130 #define AXP717_IRQ2_EN 0x42
131 #define AXP717_IRQ3_EN 0x43
132 #define AXP717_IRQ4_EN 0x44
133 #define AXP717_IRQ0_STATE 0x48
134 #define AXP717_IRQ1_STATE 0x49
135 #define AXP717_IRQ2_STATE 0x4a
136 #define AXP717_IRQ3_STATE 0x4b
137 #define AXP717_IRQ4_STATE 0x4c
138 #define AXP717_ICC_CHG_SET 0x62
139 #define AXP717_ITERM_CHG_SET 0x63
140 #define AXP717_CV_CHG_SET 0x64
141 #define AXP717_DCDC_OUTPUT_CONTROL 0x80
142 #define AXP717_DCDC1_CONTROL 0x83
143 #define AXP717_DCDC2_CONTROL 0x84
144 #define AXP717_DCDC3_CONTROL 0x85
145 #define AXP717_DCDC4_CONTROL 0x86
146 #define AXP717_LDO0_OUTPUT_CONTROL 0x90
147 #define AXP717_LDO1_OUTPUT_CONTROL 0x91
148 #define AXP717_ALDO1_CONTROL 0x93
149 #define AXP717_ALDO2_CONTROL 0x94
150 #define AXP717_ALDO3_CONTROL 0x95
151 #define AXP717_ALDO4_CONTROL 0x96
152 #define AXP717_BLDO1_CONTROL 0x97
153 #define AXP717_BLDO2_CONTROL 0x98
154 #define AXP717_BLDO3_CONTROL 0x99
155 #define AXP717_BLDO4_CONTROL 0x9a
156 #define AXP717_CLDO1_CONTROL 0x9b
157 #define AXP717_CLDO2_CONTROL 0x9c
158 #define AXP717_CLDO3_CONTROL 0x9d
159 #define AXP717_CLDO4_CONTROL 0x9e
160 #define AXP717_CPUSLDO_CONTROL 0x9f
161 #define AXP717_BATT_PERCENT_DATA 0xa4
162 #define AXP717_ADC_CH_EN_CONTROL 0xc0
163 #define AXP717_BATT_V_H 0xc4
164 #define AXP717_BATT_V_L 0xc5
165 #define AXP717_VBUS_V_H 0xc6
166 #define AXP717_VBUS_V_L 0xc7
167 #define AXP717_VSYS_V_H 0xc8
168 #define AXP717_VSYS_V_L 0xc9
169 #define AXP717_BATT_CHRG_I_H 0xca
170 #define AXP717_BATT_CHRG_I_L 0xcb
171 #define AXP717_ADC_DATA_SEL 0xcd
172 #define AXP717_ADC_DATA_H 0xce
173 #define AXP717_ADC_DATA_L 0xcf
174
175 #define AXP806_STARTUP_SRC 0x00
176 #define AXP806_CHIP_ID 0x03
177 #define AXP806_PWR_OUT_CTRL1 0x10
178 #define AXP806_PWR_OUT_CTRL2 0x11
179 #define AXP806_DCDCA_V_CTRL 0x12
180 #define AXP806_DCDCB_V_CTRL 0x13
181 #define AXP806_DCDCC_V_CTRL 0x14
182 #define AXP806_DCDCD_V_CTRL 0x15
183 #define AXP806_DCDCE_V_CTRL 0x16
184 #define AXP806_ALDO1_V_CTRL 0x17
185 #define AXP806_ALDO2_V_CTRL 0x18
186 #define AXP806_ALDO3_V_CTRL 0x19
187 #define AXP806_DCDC_MODE_CTRL1 0x1a
188 #define AXP806_DCDC_MODE_CTRL2 0x1b
189 #define AXP806_DCDC_FREQ_CTRL 0x1c
190 #define AXP806_BLDO1_V_CTRL 0x20
191 #define AXP806_BLDO2_V_CTRL 0x21
192 #define AXP806_BLDO3_V_CTRL 0x22
193 #define AXP806_BLDO4_V_CTRL 0x23
194 #define AXP806_CLDO1_V_CTRL 0x24
195 #define AXP806_CLDO2_V_CTRL 0x25
196 #define AXP806_CLDO3_V_CTRL 0x26
197 #define AXP806_VREF_TEMP_WARN_L 0xf3
198 #define AXP806_BUS_ADDR_EXT 0xfe
199 #define AXP806_REG_ADDR_EXT 0xff
200
201 #define AXP803_POLYPHASE_CTRL 0x14
202 #define AXP803_FLDO1_V_OUT 0x1c
203 #define AXP803_FLDO2_V_OUT 0x1d
204 #define AXP803_DCDC1_V_OUT 0x20
205 #define AXP803_DCDC2_V_OUT 0x21
206 #define AXP803_DCDC3_V_OUT 0x22
207 #define AXP803_DCDC4_V_OUT 0x23
208 #define AXP803_DCDC5_V_OUT 0x24
209 #define AXP803_DCDC6_V_OUT 0x25
210 #define AXP803_DCDC_FREQ_CTRL 0x3b
211
212 /* Other DCDC regulator control registers are the same as AXP803 */
213 #define AXP813_DCDC7_V_OUT 0x26
214
215 #define AXP15060_STARTUP_SRC 0x00
216 #define AXP15060_PWR_OUT_CTRL1 0x10
217 #define AXP15060_PWR_OUT_CTRL2 0x11
218 #define AXP15060_PWR_OUT_CTRL3 0x12
219 #define AXP15060_DCDC1_V_CTRL 0x13
220 #define AXP15060_DCDC2_V_CTRL 0x14
221 #define AXP15060_DCDC3_V_CTRL 0x15
222 #define AXP15060_DCDC4_V_CTRL 0x16
223 #define AXP15060_DCDC5_V_CTRL 0x17
224 #define AXP15060_DCDC6_V_CTRL 0x18
225 #define AXP15060_ALDO1_V_CTRL 0x19
226 #define AXP15060_DCDC_MODE_CTRL1 0x1a
227 #define AXP15060_DCDC_MODE_CTRL2 0x1b
228 #define AXP15060_OUTPUT_MONITOR_DISCHARGE 0x1e
229 #define AXP15060_IRQ_PWROK_VOFF 0x1f
230 #define AXP15060_ALDO2_V_CTRL 0x20
231 #define AXP15060_ALDO3_V_CTRL 0x21
232 #define AXP15060_ALDO4_V_CTRL 0x22
233 #define AXP15060_ALDO5_V_CTRL 0x23
234 #define AXP15060_BLDO1_V_CTRL 0x24
235 #define AXP15060_BLDO2_V_CTRL 0x25
236 #define AXP15060_BLDO3_V_CTRL 0x26
237 #define AXP15060_BLDO4_V_CTRL 0x27
238 #define AXP15060_BLDO5_V_CTRL 0x28
239 #define AXP15060_CLDO1_V_CTRL 0x29
240 #define AXP15060_CLDO2_V_CTRL 0x2a
241 #define AXP15060_CLDO3_V_CTRL 0x2b
242 #define AXP15060_CLDO4_V_CTRL 0x2d
243 #define AXP15060_CPUSLDO_V_CTRL 0x2e
244 #define AXP15060_PWR_WAKEUP_CTRL 0x31
245 #define AXP15060_PWR_DISABLE_DOWN_SEQ 0x32
246 #define AXP15060_PEK_KEY 0x36
247
248 /* Interrupt */
249 #define AXP152_IRQ1_EN 0x40
250 #define AXP152_IRQ2_EN 0x41
251 #define AXP152_IRQ3_EN 0x42
252 #define AXP152_IRQ1_STATE 0x48
253 #define AXP152_IRQ2_STATE 0x49
254 #define AXP152_IRQ3_STATE 0x4a
255
256 #define AXP192_IRQ1_EN 0x40
257 #define AXP192_IRQ2_EN 0x41
258 #define AXP192_IRQ3_EN 0x42
259 #define AXP192_IRQ4_EN 0x43
260 #define AXP192_IRQ1_STATE 0x44
261 #define AXP192_IRQ2_STATE 0x45
262 #define AXP192_IRQ3_STATE 0x46
263 #define AXP192_IRQ4_STATE 0x47
264 #define AXP192_IRQ5_EN 0x4a
265 #define AXP192_IRQ5_STATE 0x4d
266
267 #define AXP20X_IRQ1_EN 0x40
268 #define AXP20X_IRQ2_EN 0x41
269 #define AXP20X_IRQ3_EN 0x42
270 #define AXP20X_IRQ4_EN 0x43
271 #define AXP20X_IRQ5_EN 0x44
272 #define AXP20X_IRQ6_EN 0x45
273 #define AXP20X_IRQ1_STATE 0x48
274 #define AXP20X_IRQ2_STATE 0x49
275 #define AXP20X_IRQ3_STATE 0x4a
276 #define AXP20X_IRQ4_STATE 0x4b
277 #define AXP20X_IRQ5_STATE 0x4c
278 #define AXP20X_IRQ6_STATE 0x4d
279
280 #define AXP15060_IRQ1_EN 0x40
281 #define AXP15060_IRQ2_EN 0x41
282 #define AXP15060_IRQ1_STATE 0x48
283 #define AXP15060_IRQ2_STATE 0x49
284
285 /* ADC */
286 #define AXP192_GPIO2_V_ADC_H 0x68
287 #define AXP192_GPIO2_V_ADC_L 0x69
288 #define AXP192_GPIO3_V_ADC_H 0x6a
289 #define AXP192_GPIO3_V_ADC_L 0x6b
290
291 #define AXP20X_ACIN_V_ADC_H 0x56
292 #define AXP20X_ACIN_V_ADC_L 0x57
293 #define AXP20X_ACIN_I_ADC_H 0x58
294 #define AXP20X_ACIN_I_ADC_L 0x59
295 #define AXP20X_VBUS_V_ADC_H 0x5a
296 #define AXP20X_VBUS_V_ADC_L 0x5b
297 #define AXP20X_VBUS_I_ADC_H 0x5c
298 #define AXP20X_VBUS_I_ADC_L 0x5d
299 #define AXP20X_TEMP_ADC_H 0x5e
300 #define AXP20X_TEMP_ADC_L 0x5f
301 #define AXP20X_TS_IN_H 0x62
302 #define AXP20X_TS_IN_L 0x63
303 #define AXP20X_GPIO0_V_ADC_H 0x64
304 #define AXP20X_GPIO0_V_ADC_L 0x65
305 #define AXP20X_GPIO1_V_ADC_H 0x66
306 #define AXP20X_GPIO1_V_ADC_L 0x67
307 #define AXP20X_PWR_BATT_H 0x70
308 #define AXP20X_PWR_BATT_M 0x71
309 #define AXP20X_PWR_BATT_L 0x72
310 #define AXP20X_BATT_V_H 0x78
311 #define AXP20X_BATT_V_L 0x79
312 #define AXP20X_BATT_CHRG_I_H 0x7a
313 #define AXP20X_BATT_CHRG_I_L 0x7b
314 #define AXP20X_BATT_DISCHRG_I_H 0x7c
315 #define AXP20X_BATT_DISCHRG_I_L 0x7d
316 #define AXP20X_IPSOUT_V_HIGH_H 0x7e
317 #define AXP20X_IPSOUT_V_HIGH_L 0x7f
318
319 /* Power supply */
320 #define AXP192_GPIO30_IN_RANGE 0x85
321
322 #define AXP20X_DCDC_MODE 0x80
323 #define AXP20X_ADC_EN1 0x82
324 #define AXP20X_ADC_EN2 0x83
325 #define AXP20X_ADC_RATE 0x84
326 #define AXP20X_GPIO10_IN_RANGE 0x85
327 #define AXP20X_GPIO1_ADC_IRQ_RIS 0x86
328 #define AXP20X_GPIO1_ADC_IRQ_FAL 0x87
329 #define AXP20X_TIMER_CTRL 0x8a
330 #define AXP20X_VBUS_MON 0x8b
331 #define AXP20X_OVER_TMP 0x8f
332
333 #define AXP22X_PWREN_CTRL1 0x8c
334 #define AXP22X_PWREN_CTRL2 0x8d
335
336 /* GPIO */
337 #define AXP152_GPIO0_CTRL 0x90
338 #define AXP152_GPIO1_CTRL 0x91
339 #define AXP152_GPIO2_CTRL 0x92
340 #define AXP152_GPIO3_CTRL 0x93
341 #define AXP152_LDOGPIO2_V_OUT 0x96
342 #define AXP152_GPIO_INPUT 0x97
343 #define AXP152_PWM0_FREQ_X 0x98
344 #define AXP152_PWM0_FREQ_Y 0x99
345 #define AXP152_PWM0_DUTY_CYCLE 0x9a
346 #define AXP152_PWM1_FREQ_X 0x9b
347 #define AXP152_PWM1_FREQ_Y 0x9c
348 #define AXP152_PWM1_DUTY_CYCLE 0x9d
349
350 #define AXP192_GPIO0_CTRL 0x90
351 #define AXP192_LDO_IO0_V_OUT 0x91
352 #define AXP192_GPIO1_CTRL 0x92
353 #define AXP192_GPIO2_CTRL 0x93
354 #define AXP192_GPIO2_0_STATE 0x94
355 #define AXP192_GPIO4_3_CTRL 0x95
356 #define AXP192_GPIO4_3_STATE 0x96
357 #define AXP192_GPIO2_0_PULL 0x97
358 #define AXP192_N_RSTO_CTRL 0x9e
359
360 #define AXP20X_GPIO0_CTRL 0x90
361 #define AXP20X_LDO5_V_OUT 0x91
362 #define AXP20X_GPIO1_CTRL 0x92
363 #define AXP20X_GPIO2_CTRL 0x93
364 #define AXP20X_GPIO20_SS 0x94
365 #define AXP20X_GPIO3_CTRL 0x95
366
367 #define AXP22X_LDO_IO0_V_OUT 0x91
368 #define AXP22X_LDO_IO1_V_OUT 0x93
369 #define AXP22X_GPIO_STATE 0x94
370 #define AXP22X_GPIO_PULL_DOWN 0x95
371
372 #define AXP15060_CLDO4_GPIO2_MODESET 0x2c
373
374 /* Battery */
375 #define AXP20X_CHRG_CC_31_24 0xb0
376 #define AXP20X_CHRG_CC_23_16 0xb1
377 #define AXP20X_CHRG_CC_15_8 0xb2
378 #define AXP20X_CHRG_CC_7_0 0xb3
379 #define AXP20X_DISCHRG_CC_31_24 0xb4
380 #define AXP20X_DISCHRG_CC_23_16 0xb5
381 #define AXP20X_DISCHRG_CC_15_8 0xb6
382 #define AXP20X_DISCHRG_CC_7_0 0xb7
383 #define AXP20X_CC_CTRL 0xb8
384 #define AXP20X_FG_RES 0xb9
385
386 /* OCV */
387 #define AXP20X_RDC_H 0xba
388 #define AXP20X_RDC_L 0xbb
389 #define AXP20X_OCV(m) (0xc0 + (m))
390 #define AXP20X_OCV_MAX 0xf
391
392 /* AXP22X specific registers */
393 #define AXP22X_PMIC_TEMP_H 0x56
394 #define AXP22X_PMIC_TEMP_L 0x57
395 #define AXP22X_TS_ADC_H 0x58
396 #define AXP22X_TS_ADC_L 0x59
397 #define AXP22X_BATLOW_THRES1 0xe6
398
399 /* AXP288/AXP803 specific registers */
400 #define AXP288_POWER_REASON 0x02
401 #define AXP288_BC_GLOBAL 0x2c
402 #define AXP288_BC_VBUS_CNTL 0x2d
403 #define AXP288_BC_USB_STAT 0x2e
404 #define AXP288_BC_DET_STAT 0x2f
405 #define AXP288_PMIC_ADC_H 0x56
406 #define AXP288_PMIC_ADC_L 0x57
407 #define AXP288_TS_ADC_H 0x58
408 #define AXP288_TS_ADC_L 0x59
409 #define AXP288_GP_ADC_H 0x5a
410 #define AXP288_GP_ADC_L 0x5b
411 #define AXP288_ADC_TS_PIN_CTRL 0x84
412 #define AXP288_RT_BATT_V_H 0xa0
413 #define AXP288_RT_BATT_V_L 0xa1
414
415 #define AXP813_ACIN_PATH_CTRL 0x3a
416 #define AXP813_ADC_RATE 0x85
417
418 /* Fuel Gauge */
419 #define AXP288_FG_RDC1_REG 0xba
420 #define AXP288_FG_RDC0_REG 0xbb
421 #define AXP288_FG_OCVH_REG 0xbc
422 #define AXP288_FG_OCVL_REG 0xbd
423 #define AXP288_FG_OCV_CURVE_REG 0xc0
424 #define AXP288_FG_DES_CAP1_REG 0xe0
425 #define AXP288_FG_DES_CAP0_REG 0xe1
426 #define AXP288_FG_CC_MTR1_REG 0xe2
427 #define AXP288_FG_CC_MTR0_REG 0xe3
428 #define AXP288_FG_OCV_CAP_REG 0xe4
429 #define AXP288_FG_CC_CAP_REG 0xe5
430 #define AXP288_FG_LOW_CAP_REG 0xe6
431 #define AXP288_FG_TUNE0 0xe8
432 #define AXP288_FG_TUNE1 0xe9
433 #define AXP288_FG_TUNE2 0xea
434 #define AXP288_FG_TUNE3 0xeb
435 #define AXP288_FG_TUNE4 0xec
436 #define AXP288_FG_TUNE5 0xed
437
438 /* Regulators IDs */
439 enum {
440 AXP192_DCDC1 = 0,
441 AXP192_DCDC2,
442 AXP192_DCDC3,
443 AXP192_LDO1,
444 AXP192_LDO2,
445 AXP192_LDO3,
446 AXP192_LDO_IO0,
447 AXP192_REG_ID_MAX
448 };
449
450 enum {
451 AXP20X_LDO1 = 0,
452 AXP20X_LDO2,
453 AXP20X_LDO3,
454 AXP20X_LDO4,
455 AXP20X_LDO5,
456 AXP20X_DCDC2,
457 AXP20X_DCDC3,
458 AXP20X_REG_ID_MAX,
459 };
460
461 enum {
462 AXP22X_DCDC1 = 0,
463 AXP22X_DCDC2,
464 AXP22X_DCDC3,
465 AXP22X_DCDC4,
466 AXP22X_DCDC5,
467 AXP22X_DC1SW,
468 AXP22X_DC5LDO,
469 AXP22X_ALDO1,
470 AXP22X_ALDO2,
471 AXP22X_ALDO3,
472 AXP22X_ELDO1,
473 AXP22X_ELDO2,
474 AXP22X_ELDO3,
475 AXP22X_DLDO1,
476 AXP22X_DLDO2,
477 AXP22X_DLDO3,
478 AXP22X_DLDO4,
479 AXP22X_RTC_LDO,
480 AXP22X_LDO_IO0,
481 AXP22X_LDO_IO1,
482 AXP22X_REG_ID_MAX,
483 };
484
485 enum {
486 AXP313A_DCDC1 = 0,
487 AXP313A_DCDC2,
488 AXP313A_DCDC3,
489 AXP313A_ALDO1,
490 AXP313A_DLDO1,
491 AXP313A_RTC_LDO,
492 AXP313A_REG_ID_MAX,
493 };
494
495 enum {
496 AXP717_DCDC1 = 0,
497 AXP717_DCDC2,
498 AXP717_DCDC3,
499 AXP717_DCDC4,
500 AXP717_ALDO1,
501 AXP717_ALDO2,
502 AXP717_ALDO3,
503 AXP717_ALDO4,
504 AXP717_BLDO1,
505 AXP717_BLDO2,
506 AXP717_BLDO3,
507 AXP717_BLDO4,
508 AXP717_CLDO1,
509 AXP717_CLDO2,
510 AXP717_CLDO3,
511 AXP717_CLDO4,
512 AXP717_CPUSLDO,
513 AXP717_BOOST,
514 AXP717_REG_ID_MAX,
515 };
516
517 enum {
518 AXP806_DCDCA = 0,
519 AXP806_DCDCB,
520 AXP806_DCDCC,
521 AXP806_DCDCD,
522 AXP806_DCDCE,
523 AXP806_ALDO1,
524 AXP806_ALDO2,
525 AXP806_ALDO3,
526 AXP806_BLDO1,
527 AXP806_BLDO2,
528 AXP806_BLDO3,
529 AXP806_BLDO4,
530 AXP806_CLDO1,
531 AXP806_CLDO2,
532 AXP806_CLDO3,
533 AXP806_SW,
534 AXP806_REG_ID_MAX,
535 };
536
537 enum {
538 AXP809_DCDC1 = 0,
539 AXP809_DCDC2,
540 AXP809_DCDC3,
541 AXP809_DCDC4,
542 AXP809_DCDC5,
543 AXP809_DC1SW,
544 AXP809_DC5LDO,
545 AXP809_ALDO1,
546 AXP809_ALDO2,
547 AXP809_ALDO3,
548 AXP809_ELDO1,
549 AXP809_ELDO2,
550 AXP809_ELDO3,
551 AXP809_DLDO1,
552 AXP809_DLDO2,
553 AXP809_RTC_LDO,
554 AXP809_LDO_IO0,
555 AXP809_LDO_IO1,
556 AXP809_SW,
557 AXP809_REG_ID_MAX,
558 };
559
560 enum {
561 AXP803_DCDC1 = 0,
562 AXP803_DCDC2,
563 AXP803_DCDC3,
564 AXP803_DCDC4,
565 AXP803_DCDC5,
566 AXP803_DCDC6,
567 AXP803_DC1SW,
568 AXP803_ALDO1,
569 AXP803_ALDO2,
570 AXP803_ALDO3,
571 AXP803_DLDO1,
572 AXP803_DLDO2,
573 AXP803_DLDO3,
574 AXP803_DLDO4,
575 AXP803_ELDO1,
576 AXP803_ELDO2,
577 AXP803_ELDO3,
578 AXP803_FLDO1,
579 AXP803_FLDO2,
580 AXP803_RTC_LDO,
581 AXP803_LDO_IO0,
582 AXP803_LDO_IO1,
583 AXP803_REG_ID_MAX,
584 };
585
586 enum {
587 AXP813_DCDC1 = 0,
588 AXP813_DCDC2,
589 AXP813_DCDC3,
590 AXP813_DCDC4,
591 AXP813_DCDC5,
592 AXP813_DCDC6,
593 AXP813_DCDC7,
594 AXP813_ALDO1,
595 AXP813_ALDO2,
596 AXP813_ALDO3,
597 AXP813_DLDO1,
598 AXP813_DLDO2,
599 AXP813_DLDO3,
600 AXP813_DLDO4,
601 AXP813_ELDO1,
602 AXP813_ELDO2,
603 AXP813_ELDO3,
604 AXP813_FLDO1,
605 AXP813_FLDO2,
606 AXP813_FLDO3,
607 AXP813_RTC_LDO,
608 AXP813_LDO_IO0,
609 AXP813_LDO_IO1,
610 AXP813_SW,
611 AXP813_REG_ID_MAX,
612 };
613
614 enum {
615 AXP15060_DCDC1 = 0,
616 AXP15060_DCDC2,
617 AXP15060_DCDC3,
618 AXP15060_DCDC4,
619 AXP15060_DCDC5,
620 AXP15060_DCDC6,
621 AXP15060_ALDO1,
622 AXP15060_ALDO2,
623 AXP15060_ALDO3,
624 AXP15060_ALDO4,
625 AXP15060_ALDO5,
626 AXP15060_BLDO1,
627 AXP15060_BLDO2,
628 AXP15060_BLDO3,
629 AXP15060_BLDO4,
630 AXP15060_BLDO5,
631 AXP15060_CLDO1,
632 AXP15060_CLDO2,
633 AXP15060_CLDO3,
634 AXP15060_CLDO4,
635 AXP15060_CPUSLDO,
636 AXP15060_SW,
637 AXP15060_RTC_LDO,
638 AXP15060_REG_ID_MAX,
639 };
640
641 /* IRQs */
642 enum {
643 AXP152_IRQ_LDO0IN_CONNECT = 1,
644 AXP152_IRQ_LDO0IN_REMOVAL,
645 AXP152_IRQ_ALDO0IN_CONNECT,
646 AXP152_IRQ_ALDO0IN_REMOVAL,
647 AXP152_IRQ_DCDC1_V_LOW,
648 AXP152_IRQ_DCDC2_V_LOW,
649 AXP152_IRQ_DCDC3_V_LOW,
650 AXP152_IRQ_DCDC4_V_LOW,
651 AXP152_IRQ_PEK_SHORT,
652 AXP152_IRQ_PEK_LONG,
653 AXP152_IRQ_TIMER,
654 /* out of bit order to make sure the press event is handled first */
655 AXP152_IRQ_PEK_FAL_EDGE,
656 AXP152_IRQ_PEK_RIS_EDGE,
657 AXP152_IRQ_GPIO3_INPUT,
658 AXP152_IRQ_GPIO2_INPUT,
659 AXP152_IRQ_GPIO1_INPUT,
660 AXP152_IRQ_GPIO0_INPUT,
661 };
662
663 enum axp192_irqs {
664 AXP192_IRQ_ACIN_OVER_V = 1,
665 AXP192_IRQ_ACIN_PLUGIN,
666 AXP192_IRQ_ACIN_REMOVAL,
667 AXP192_IRQ_VBUS_OVER_V,
668 AXP192_IRQ_VBUS_PLUGIN,
669 AXP192_IRQ_VBUS_REMOVAL,
670 AXP192_IRQ_VBUS_V_LOW,
671 AXP192_IRQ_BATT_PLUGIN,
672 AXP192_IRQ_BATT_REMOVAL,
673 AXP192_IRQ_BATT_ENT_ACT_MODE,
674 AXP192_IRQ_BATT_EXIT_ACT_MODE,
675 AXP192_IRQ_CHARG,
676 AXP192_IRQ_CHARG_DONE,
677 AXP192_IRQ_BATT_TEMP_HIGH,
678 AXP192_IRQ_BATT_TEMP_LOW,
679 AXP192_IRQ_DIE_TEMP_HIGH,
680 AXP192_IRQ_CHARG_I_LOW,
681 AXP192_IRQ_DCDC1_V_LONG,
682 AXP192_IRQ_DCDC2_V_LONG,
683 AXP192_IRQ_DCDC3_V_LONG,
684 AXP192_IRQ_PEK_SHORT = 22,
685 AXP192_IRQ_PEK_LONG,
686 AXP192_IRQ_N_OE_PWR_ON,
687 AXP192_IRQ_N_OE_PWR_OFF,
688 AXP192_IRQ_VBUS_VALID,
689 AXP192_IRQ_VBUS_NOT_VALID,
690 AXP192_IRQ_VBUS_SESS_VALID,
691 AXP192_IRQ_VBUS_SESS_END,
692 AXP192_IRQ_LOW_PWR_LVL = 31,
693 AXP192_IRQ_TIMER,
694 AXP192_IRQ_GPIO2_INPUT = 37,
695 AXP192_IRQ_GPIO1_INPUT,
696 AXP192_IRQ_GPIO0_INPUT,
697 };
698
699 enum {
700 AXP20X_IRQ_ACIN_OVER_V = 1,
701 AXP20X_IRQ_ACIN_PLUGIN,
702 AXP20X_IRQ_ACIN_REMOVAL,
703 AXP20X_IRQ_VBUS_OVER_V,
704 AXP20X_IRQ_VBUS_PLUGIN,
705 AXP20X_IRQ_VBUS_REMOVAL,
706 AXP20X_IRQ_VBUS_V_LOW,
707 AXP20X_IRQ_BATT_PLUGIN,
708 AXP20X_IRQ_BATT_REMOVAL,
709 AXP20X_IRQ_BATT_ENT_ACT_MODE,
710 AXP20X_IRQ_BATT_EXIT_ACT_MODE,
711 AXP20X_IRQ_CHARG,
712 AXP20X_IRQ_CHARG_DONE,
713 AXP20X_IRQ_BATT_TEMP_HIGH,
714 AXP20X_IRQ_BATT_TEMP_LOW,
715 AXP20X_IRQ_DIE_TEMP_HIGH,
716 AXP20X_IRQ_CHARG_I_LOW,
717 AXP20X_IRQ_DCDC1_V_LONG,
718 AXP20X_IRQ_DCDC2_V_LONG,
719 AXP20X_IRQ_DCDC3_V_LONG,
720 AXP20X_IRQ_PEK_SHORT = 22,
721 AXP20X_IRQ_PEK_LONG,
722 AXP20X_IRQ_N_OE_PWR_ON,
723 AXP20X_IRQ_N_OE_PWR_OFF,
724 AXP20X_IRQ_VBUS_VALID,
725 AXP20X_IRQ_VBUS_NOT_VALID,
726 AXP20X_IRQ_VBUS_SESS_VALID,
727 AXP20X_IRQ_VBUS_SESS_END,
728 AXP20X_IRQ_LOW_PWR_LVL1,
729 AXP20X_IRQ_LOW_PWR_LVL2,
730 AXP20X_IRQ_TIMER,
731 /* out of bit order to make sure the press event is handled first */
732 AXP20X_IRQ_PEK_FAL_EDGE,
733 AXP20X_IRQ_PEK_RIS_EDGE,
734 AXP20X_IRQ_GPIO3_INPUT,
735 AXP20X_IRQ_GPIO2_INPUT,
736 AXP20X_IRQ_GPIO1_INPUT,
737 AXP20X_IRQ_GPIO0_INPUT,
738 };
739
740 enum axp22x_irqs {
741 AXP22X_IRQ_ACIN_OVER_V = 1,
742 AXP22X_IRQ_ACIN_PLUGIN,
743 AXP22X_IRQ_ACIN_REMOVAL,
744 AXP22X_IRQ_VBUS_OVER_V,
745 AXP22X_IRQ_VBUS_PLUGIN,
746 AXP22X_IRQ_VBUS_REMOVAL,
747 AXP22X_IRQ_VBUS_V_LOW,
748 AXP22X_IRQ_BATT_PLUGIN,
749 AXP22X_IRQ_BATT_REMOVAL,
750 AXP22X_IRQ_BATT_ENT_ACT_MODE,
751 AXP22X_IRQ_BATT_EXIT_ACT_MODE,
752 AXP22X_IRQ_CHARG,
753 AXP22X_IRQ_CHARG_DONE,
754 AXP22X_IRQ_BATT_TEMP_HIGH,
755 AXP22X_IRQ_BATT_TEMP_LOW,
756 AXP22X_IRQ_DIE_TEMP_HIGH,
757 AXP22X_IRQ_PEK_SHORT,
758 AXP22X_IRQ_PEK_LONG,
759 AXP22X_IRQ_LOW_PWR_LVL1,
760 AXP22X_IRQ_LOW_PWR_LVL2,
761 AXP22X_IRQ_TIMER,
762 /* out of bit order to make sure the press event is handled first */
763 AXP22X_IRQ_PEK_FAL_EDGE,
764 AXP22X_IRQ_PEK_RIS_EDGE,
765 AXP22X_IRQ_GPIO1_INPUT,
766 AXP22X_IRQ_GPIO0_INPUT,
767 };
768
769 enum axp288_irqs {
770 AXP288_IRQ_VBUS_FALL = 2,
771 AXP288_IRQ_VBUS_RISE,
772 AXP288_IRQ_OV,
773 AXP288_IRQ_FALLING_ALT,
774 AXP288_IRQ_RISING_ALT,
775 AXP288_IRQ_OV_ALT,
776 AXP288_IRQ_DONE = 10,
777 AXP288_IRQ_CHARGING,
778 AXP288_IRQ_SAFE_QUIT,
779 AXP288_IRQ_SAFE_ENTER,
780 AXP288_IRQ_ABSENT,
781 AXP288_IRQ_APPEND,
782 AXP288_IRQ_QWBTU,
783 AXP288_IRQ_WBTU,
784 AXP288_IRQ_QWBTO,
785 AXP288_IRQ_WBTO,
786 AXP288_IRQ_QCBTU,
787 AXP288_IRQ_CBTU,
788 AXP288_IRQ_QCBTO,
789 AXP288_IRQ_CBTO,
790 AXP288_IRQ_WL2,
791 AXP288_IRQ_WL1,
792 AXP288_IRQ_GPADC,
793 AXP288_IRQ_OT = 31,
794 AXP288_IRQ_GPIO0,
795 AXP288_IRQ_GPIO1,
796 AXP288_IRQ_POKO,
797 AXP288_IRQ_POKL,
798 AXP288_IRQ_POKS,
799 AXP288_IRQ_POKN,
800 AXP288_IRQ_POKP,
801 AXP288_IRQ_TIMER,
802 AXP288_IRQ_MV_CHNG,
803 AXP288_IRQ_BC_USB_CHNG,
804 };
805
806 enum axp313a_irqs {
807 AXP313A_IRQ_DIE_TEMP_HIGH,
808 AXP313A_IRQ_DCDC2_V_LOW = 2,
809 AXP313A_IRQ_DCDC3_V_LOW,
810 AXP313A_IRQ_PEK_LONG,
811 AXP313A_IRQ_PEK_SHORT,
812 AXP313A_IRQ_PEK_FAL_EDGE,
813 AXP313A_IRQ_PEK_RIS_EDGE,
814 };
815
816 enum axp717_irqs {
817 AXP717_IRQ_VBUS_FAULT,
818 AXP717_IRQ_VBUS_OVER_V,
819 AXP717_IRQ_BOOST_OVER_V,
820 AXP717_IRQ_GAUGE_NEW_SOC = 4,
821 AXP717_IRQ_SOC_DROP_LVL1 = 6,
822 AXP717_IRQ_SOC_DROP_LVL2,
823 AXP717_IRQ_PEK_RIS_EDGE,
824 AXP717_IRQ_PEK_FAL_EDGE,
825 AXP717_IRQ_PEK_LONG,
826 AXP717_IRQ_PEK_SHORT,
827 AXP717_IRQ_BATT_REMOVAL,
828 AXP717_IRQ_BATT_PLUGIN,
829 AXP717_IRQ_VBUS_REMOVAL,
830 AXP717_IRQ_VBUS_PLUGIN,
831 AXP717_IRQ_BATT_OVER_V,
832 AXP717_IRQ_CHARG_TIMER,
833 AXP717_IRQ_DIE_TEMP_HIGH,
834 AXP717_IRQ_CHARG,
835 AXP717_IRQ_CHARG_DONE,
836 AXP717_IRQ_BATT_OVER_CURR,
837 AXP717_IRQ_LDO_OVER_CURR,
838 AXP717_IRQ_WDOG_EXPIRE,
839 AXP717_IRQ_BATT_ACT_TEMP_LOW,
840 AXP717_IRQ_BATT_ACT_TEMP_HIGH,
841 AXP717_IRQ_BATT_CHG_TEMP_LOW,
842 AXP717_IRQ_BATT_CHG_TEMP_HIGH,
843 AXP717_IRQ_BATT_QUIT_TEMP_HIGH,
844 AXP717_IRQ_BC_USB_CHNG = 30,
845 AXP717_IRQ_BC_USB_DONE,
846 AXP717_IRQ_TYPEC_PLUGIN = 37,
847 AXP717_IRQ_TYPEC_REMOVE,
848 };
849
850 enum axp803_irqs {
851 AXP803_IRQ_ACIN_OVER_V = 1,
852 AXP803_IRQ_ACIN_PLUGIN,
853 AXP803_IRQ_ACIN_REMOVAL,
854 AXP803_IRQ_VBUS_OVER_V,
855 AXP803_IRQ_VBUS_PLUGIN,
856 AXP803_IRQ_VBUS_REMOVAL,
857 AXP803_IRQ_BATT_PLUGIN,
858 AXP803_IRQ_BATT_REMOVAL,
859 AXP803_IRQ_BATT_ENT_ACT_MODE,
860 AXP803_IRQ_BATT_EXIT_ACT_MODE,
861 AXP803_IRQ_CHARG,
862 AXP803_IRQ_CHARG_DONE,
863 AXP803_IRQ_BATT_CHG_TEMP_HIGH,
864 AXP803_IRQ_BATT_CHG_TEMP_HIGH_END,
865 AXP803_IRQ_BATT_CHG_TEMP_LOW,
866 AXP803_IRQ_BATT_CHG_TEMP_LOW_END,
867 AXP803_IRQ_BATT_ACT_TEMP_HIGH,
868 AXP803_IRQ_BATT_ACT_TEMP_HIGH_END,
869 AXP803_IRQ_BATT_ACT_TEMP_LOW,
870 AXP803_IRQ_BATT_ACT_TEMP_LOW_END,
871 AXP803_IRQ_DIE_TEMP_HIGH,
872 AXP803_IRQ_GPADC,
873 AXP803_IRQ_LOW_PWR_LVL1,
874 AXP803_IRQ_LOW_PWR_LVL2,
875 AXP803_IRQ_TIMER,
876 /* out of bit order to make sure the press event is handled first */
877 AXP803_IRQ_PEK_FAL_EDGE,
878 AXP803_IRQ_PEK_RIS_EDGE,
879 AXP803_IRQ_PEK_SHORT,
880 AXP803_IRQ_PEK_LONG,
881 AXP803_IRQ_PEK_OVER_OFF,
882 AXP803_IRQ_GPIO1_INPUT,
883 AXP803_IRQ_GPIO0_INPUT,
884 AXP803_IRQ_BC_USB_CHNG,
885 AXP803_IRQ_MV_CHNG,
886 };
887
888 enum axp806_irqs {
889 AXP806_IRQ_DIE_TEMP_HIGH_LV1,
890 AXP806_IRQ_DIE_TEMP_HIGH_LV2,
891 AXP806_IRQ_DCDCA_V_LOW,
892 AXP806_IRQ_DCDCB_V_LOW,
893 AXP806_IRQ_DCDCC_V_LOW,
894 AXP806_IRQ_DCDCD_V_LOW,
895 AXP806_IRQ_DCDCE_V_LOW,
896 AXP806_IRQ_POK_LONG,
897 AXP806_IRQ_POK_SHORT,
898 AXP806_IRQ_WAKEUP,
899 AXP806_IRQ_POK_FALL,
900 AXP806_IRQ_POK_RISE,
901 };
902
903 enum axp809_irqs {
904 AXP809_IRQ_ACIN_OVER_V = 1,
905 AXP809_IRQ_ACIN_PLUGIN,
906 AXP809_IRQ_ACIN_REMOVAL,
907 AXP809_IRQ_VBUS_OVER_V,
908 AXP809_IRQ_VBUS_PLUGIN,
909 AXP809_IRQ_VBUS_REMOVAL,
910 AXP809_IRQ_VBUS_V_LOW,
911 AXP809_IRQ_BATT_PLUGIN,
912 AXP809_IRQ_BATT_REMOVAL,
913 AXP809_IRQ_BATT_ENT_ACT_MODE,
914 AXP809_IRQ_BATT_EXIT_ACT_MODE,
915 AXP809_IRQ_CHARG,
916 AXP809_IRQ_CHARG_DONE,
917 AXP809_IRQ_BATT_CHG_TEMP_HIGH,
918 AXP809_IRQ_BATT_CHG_TEMP_HIGH_END,
919 AXP809_IRQ_BATT_CHG_TEMP_LOW,
920 AXP809_IRQ_BATT_CHG_TEMP_LOW_END,
921 AXP809_IRQ_BATT_ACT_TEMP_HIGH,
922 AXP809_IRQ_BATT_ACT_TEMP_HIGH_END,
923 AXP809_IRQ_BATT_ACT_TEMP_LOW,
924 AXP809_IRQ_BATT_ACT_TEMP_LOW_END,
925 AXP809_IRQ_DIE_TEMP_HIGH,
926 AXP809_IRQ_LOW_PWR_LVL1,
927 AXP809_IRQ_LOW_PWR_LVL2,
928 AXP809_IRQ_TIMER,
929 /* out of bit order to make sure the press event is handled first */
930 AXP809_IRQ_PEK_FAL_EDGE,
931 AXP809_IRQ_PEK_RIS_EDGE,
932 AXP809_IRQ_PEK_SHORT,
933 AXP809_IRQ_PEK_LONG,
934 AXP809_IRQ_PEK_OVER_OFF,
935 AXP809_IRQ_GPIO1_INPUT,
936 AXP809_IRQ_GPIO0_INPUT,
937 };
938
939 enum axp15060_irqs {
940 AXP15060_IRQ_DIE_TEMP_HIGH_LV1 = 1,
941 AXP15060_IRQ_DIE_TEMP_HIGH_LV2,
942 AXP15060_IRQ_DCDC1_V_LOW,
943 AXP15060_IRQ_DCDC2_V_LOW,
944 AXP15060_IRQ_DCDC3_V_LOW,
945 AXP15060_IRQ_DCDC4_V_LOW,
946 AXP15060_IRQ_DCDC5_V_LOW,
947 AXP15060_IRQ_DCDC6_V_LOW,
948 AXP15060_IRQ_PEK_LONG,
949 AXP15060_IRQ_PEK_SHORT,
950 AXP15060_IRQ_GPIO1_INPUT,
951 AXP15060_IRQ_PEK_FAL_EDGE,
952 AXP15060_IRQ_PEK_RIS_EDGE,
953 AXP15060_IRQ_GPIO2_INPUT,
954 };
955
956 struct axp20x_dev {
957 struct device *dev;
958 int irq;
959 unsigned long irq_flags;
960 struct regmap *regmap;
961 struct regmap_irq_chip_data *regmap_irqc;
962 long variant;
963 int nr_cells;
964 const struct mfd_cell *cells;
965 const struct regmap_config *regmap_cfg;
966 const struct regmap_irq_chip *regmap_irq_chip;
967 };
968
969 /* generic helper function for reading 9-16 bit wide regs */
axp20x_read_variable_width(struct regmap * regmap,unsigned int reg,unsigned int width)970 static inline int axp20x_read_variable_width(struct regmap *regmap,
971 unsigned int reg, unsigned int width)
972 {
973 unsigned int reg_val, result;
974 int err;
975
976 err = regmap_read(regmap, reg, ®_val);
977 if (err)
978 return err;
979
980 result = reg_val << (width - 8);
981
982 err = regmap_read(regmap, reg + 1, ®_val);
983 if (err)
984 return err;
985
986 result |= reg_val;
987
988 return result;
989 }
990
991 /**
992 * axp20x_match_device(): Setup axp20x variant related fields
993 *
994 * @axp20x: axp20x device to setup (.dev field must be set)
995 * @dev: device associated with this axp20x device
996 *
997 * This lets the axp20x core configure the mfd cells and register maps
998 * for later use.
999 */
1000 int axp20x_match_device(struct axp20x_dev *axp20x);
1001
1002 /**
1003 * axp20x_device_probe(): Probe a configured axp20x device
1004 *
1005 * @axp20x: axp20x device to probe (must be configured)
1006 *
1007 * This function lets the axp20x core register the axp20x mfd devices
1008 * and irqchip. The axp20x device passed in must be fully configured
1009 * with axp20x_match_device, its irq set, and regmap created.
1010 */
1011 int axp20x_device_probe(struct axp20x_dev *axp20x);
1012
1013 /**
1014 * axp20x_device_remove(): Remove a axp20x device
1015 *
1016 * @axp20x: axp20x device to remove
1017 *
1018 * This tells the axp20x core to remove the associated mfd devices
1019 */
1020 void axp20x_device_remove(struct axp20x_dev *axp20x);
1021
1022 #endif /* __LINUX_MFD_AXP20X_H */
1023