1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *   Driver for the Conexant Riptide Soundchip
4  *
5  *	Copyright (c) 2004 Peter Gruber <nokos@gmx.net>
6  */
7 /*
8   History:
9    - 02/15/2004 first release
10 
11   This Driver is based on the OSS Driver version from Linuxant (riptide-0.6lnxtbeta03111100)
12   credits from the original files:
13 
14   MODULE NAME:        cnxt_rt.h
15   AUTHOR:             K. Lazarev  (Transcribed by KNL)
16   HISTORY:         Major Revision               Date        By
17             -----------------------------     --------     -----
18             Created                           02/1/2000     KNL
19 
20   MODULE NAME:     int_mdl.c
21   AUTHOR:          Konstantin Lazarev    (Transcribed by KNL)
22   HISTORY:         Major Revision               Date        By
23             -----------------------------     --------     -----
24             Created                           10/01/99      KNL
25 
26   MODULE NAME:        riptide.h
27   AUTHOR:             O. Druzhinin  (Transcribed by OLD)
28   HISTORY:         Major Revision               Date        By
29             -----------------------------     --------     -----
30             Created                           10/16/97      OLD
31 
32   MODULE NAME:        Rp_Cmdif.cpp
33   AUTHOR:             O. Druzhinin  (Transcribed by OLD)
34                       K. Lazarev    (Transcribed by KNL)
35   HISTORY:         Major Revision               Date        By
36             -----------------------------     --------     -----
37             Adopted from NT4 driver            6/22/99      OLD
38             Ported to Linux                    9/01/99      KNL
39 
40   MODULE NAME:        rt_hw.c
41   AUTHOR:             O. Druzhinin  (Transcribed by OLD)
42                       C. Lazarev    (Transcribed by CNL)
43   HISTORY:         Major Revision               Date        By
44             -----------------------------     --------     -----
45             Created                           11/18/97      OLD
46             Hardware functions for RipTide    11/24/97      CNL
47             (ES1) are coded
48             Hardware functions for RipTide    12/24/97      CNL
49             (A0) are coded
50             Hardware functions for RipTide    03/20/98      CNL
51             (A1) are coded
52             Boot loader is included           05/07/98      CNL
53             Redesigned for WDM                07/27/98      CNL
54             Redesigned for Linux              09/01/99      CNL
55 
56   MODULE NAME:        rt_hw.h
57   AUTHOR:             C. Lazarev    (Transcribed by CNL)
58   HISTORY:         Major Revision               Date        By
59             -----------------------------     --------     -----
60             Created                           11/18/97      CNL
61 
62   MODULE NAME:     rt_mdl.c
63   AUTHOR:          Konstantin Lazarev    (Transcribed by KNL)
64   HISTORY:         Major Revision               Date        By
65             -----------------------------     --------     -----
66             Created                           10/01/99      KNL
67 
68   MODULE NAME:        mixer.h
69   AUTHOR:             K. Kenney
70   HISTORY:         Major Revision                   Date          By
71             -----------------------------          --------     -----
72             Created from MS W95 Sample             11/28/95      KRS
73             RipTide                                10/15/97      KRS
74             Adopted for Windows NT driver          01/20/98      CNL
75 */
76 
77 #include <linux/delay.h>
78 #include <linux/init.h>
79 #include <linux/interrupt.h>
80 #include <linux/pci.h>
81 #include <linux/slab.h>
82 #include <linux/wait.h>
83 #include <linux/gameport.h>
84 #include <linux/device.h>
85 #include <linux/firmware.h>
86 #include <linux/kernel.h>
87 #include <linux/module.h>
88 #include <linux/io.h>
89 #include <sound/core.h>
90 #include <sound/info.h>
91 #include <sound/control.h>
92 #include <sound/pcm.h>
93 #include <sound/pcm_params.h>
94 #include <sound/ac97_codec.h>
95 #include <sound/mpu401.h>
96 #include <sound/opl3.h>
97 #include <sound/initval.h>
98 
99 #if IS_REACHABLE(CONFIG_GAMEPORT)
100 #define SUPPORT_JOYSTICK 1
101 #endif
102 
103 MODULE_AUTHOR("Peter Gruber <nokos@gmx.net>");
104 MODULE_DESCRIPTION("riptide");
105 MODULE_LICENSE("GPL");
106 MODULE_FIRMWARE("riptide.hex");
107 
108 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
109 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
110 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE;
111 
112 #ifdef SUPPORT_JOYSTICK
113 static int joystick_port[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS - 1)] = 0x200 };
114 #endif
115 static int mpu_port[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS - 1)] = 0x330 };
116 static int opl3_port[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS - 1)] = 0x388 };
117 
118 module_param_array(index, int, NULL, 0444);
119 MODULE_PARM_DESC(index, "Index value for Riptide soundcard.");
120 module_param_array(id, charp, NULL, 0444);
121 MODULE_PARM_DESC(id, "ID string for Riptide soundcard.");
122 module_param_array(enable, bool, NULL, 0444);
123 MODULE_PARM_DESC(enable, "Enable Riptide soundcard.");
124 #ifdef SUPPORT_JOYSTICK
125 module_param_hw_array(joystick_port, int, ioport, NULL, 0444);
126 MODULE_PARM_DESC(joystick_port, "Joystick port # for Riptide soundcard.");
127 #endif
128 module_param_hw_array(mpu_port, int, ioport, NULL, 0444);
129 MODULE_PARM_DESC(mpu_port, "MPU401 port # for Riptide driver.");
130 module_param_hw_array(opl3_port, int, ioport, NULL, 0444);
131 MODULE_PARM_DESC(opl3_port, "OPL3 port # for Riptide driver.");
132 
133 /*
134  */
135 
136 #define MPU401_HW_RIPTIDE MPU401_HW_MPU401
137 #define OPL3_HW_RIPTIDE   OPL3_HW_OPL3
138 
139 #define PCI_EXT_CapId       0x40
140 #define PCI_EXT_NextCapPrt  0x41
141 #define PCI_EXT_PWMC        0x42
142 #define PCI_EXT_PWSCR       0x44
143 #define PCI_EXT_Data00      0x46
144 #define PCI_EXT_PMSCR_BSE   0x47
145 #define PCI_EXT_SB_Base     0x48
146 #define PCI_EXT_FM_Base     0x4a
147 #define PCI_EXT_MPU_Base    0x4C
148 #define PCI_EXT_Game_Base   0x4E
149 #define PCI_EXT_Legacy_Mask 0x50
150 #define PCI_EXT_AsicRev     0x52
151 #define PCI_EXT_Reserved3   0x53
152 
153 #define LEGACY_ENABLE_ALL      0x8000	/* legacy device options */
154 #define LEGACY_ENABLE_SB       0x4000
155 #define LEGACY_ENABLE_FM       0x2000
156 #define LEGACY_ENABLE_MPU_INT  0x1000
157 #define LEGACY_ENABLE_MPU      0x0800
158 #define LEGACY_ENABLE_GAMEPORT 0x0400
159 
160 #define MAX_WRITE_RETRY  10	/* cmd interface limits */
161 #define MAX_ERROR_COUNT  10
162 #define CMDIF_TIMEOUT    50000
163 #define RESET_TRIES      5
164 
165 #define READ_PORT_ULONG(p)     inl((unsigned long)&(p))
166 #define WRITE_PORT_ULONG(p,x)  outl(x,(unsigned long)&(p))
167 
168 #define READ_AUDIO_CONTROL(p)     READ_PORT_ULONG(p->audio_control)
169 #define WRITE_AUDIO_CONTROL(p,x)  WRITE_PORT_ULONG(p->audio_control,x)
170 #define UMASK_AUDIO_CONTROL(p,x)  WRITE_PORT_ULONG(p->audio_control,READ_PORT_ULONG(p->audio_control)|x)
171 #define MASK_AUDIO_CONTROL(p,x)   WRITE_PORT_ULONG(p->audio_control,READ_PORT_ULONG(p->audio_control)&x)
172 #define READ_AUDIO_STATUS(p)      READ_PORT_ULONG(p->audio_status)
173 
174 #define SET_GRESET(p)     UMASK_AUDIO_CONTROL(p,0x0001)	/* global reset switch */
175 #define UNSET_GRESET(p)   MASK_AUDIO_CONTROL(p,~0x0001)
176 #define SET_AIE(p)        UMASK_AUDIO_CONTROL(p,0x0004)	/* interrupt enable */
177 #define UNSET_AIE(p)      MASK_AUDIO_CONTROL(p,~0x0004)
178 #define SET_AIACK(p)      UMASK_AUDIO_CONTROL(p,0x0008)	/* interrupt acknowledge */
179 #define UNSET_AIACKT(p)   MASKAUDIO_CONTROL(p,~0x0008)
180 #define SET_ECMDAE(p)     UMASK_AUDIO_CONTROL(p,0x0010)
181 #define UNSET_ECMDAE(p)   MASK_AUDIO_CONTROL(p,~0x0010)
182 #define SET_ECMDBE(p)     UMASK_AUDIO_CONTROL(p,0x0020)
183 #define UNSET_ECMDBE(p)   MASK_AUDIO_CONTROL(p,~0x0020)
184 #define SET_EDATAF(p)     UMASK_AUDIO_CONTROL(p,0x0040)
185 #define UNSET_EDATAF(p)   MASK_AUDIO_CONTROL(p,~0x0040)
186 #define SET_EDATBF(p)     UMASK_AUDIO_CONTROL(p,0x0080)
187 #define UNSET_EDATBF(p)   MASK_AUDIO_CONTROL(p,~0x0080)
188 #define SET_ESBIRQON(p)   UMASK_AUDIO_CONTROL(p,0x0100)
189 #define UNSET_ESBIRQON(p) MASK_AUDIO_CONTROL(p,~0x0100)
190 #define SET_EMPUIRQ(p)    UMASK_AUDIO_CONTROL(p,0x0200)
191 #define UNSET_EMPUIRQ(p)  MASK_AUDIO_CONTROL(p,~0x0200)
192 #define IS_CMDE(a)        (READ_PORT_ULONG(a->stat)&0x1)	/* cmd empty */
193 #define IS_DATF(a)        (READ_PORT_ULONG(a->stat)&0x2)	/* data filled */
194 #define IS_READY(p)       (READ_AUDIO_STATUS(p)&0x0001)
195 #define IS_DLREADY(p)     (READ_AUDIO_STATUS(p)&0x0002)
196 #define IS_DLERR(p)       (READ_AUDIO_STATUS(p)&0x0004)
197 #define IS_GERR(p)        (READ_AUDIO_STATUS(p)&0x0008)	/* error ! */
198 #define IS_CMDAEIRQ(p)    (READ_AUDIO_STATUS(p)&0x0010)
199 #define IS_CMDBEIRQ(p)    (READ_AUDIO_STATUS(p)&0x0020)
200 #define IS_DATAFIRQ(p)    (READ_AUDIO_STATUS(p)&0x0040)
201 #define IS_DATBFIRQ(p)    (READ_AUDIO_STATUS(p)&0x0080)
202 #define IS_EOBIRQ(p)      (READ_AUDIO_STATUS(p)&0x0100)	/* interrupt status */
203 #define IS_EOSIRQ(p)      (READ_AUDIO_STATUS(p)&0x0200)
204 #define IS_EOCIRQ(p)      (READ_AUDIO_STATUS(p)&0x0400)
205 #define IS_UNSLIRQ(p)     (READ_AUDIO_STATUS(p)&0x0800)
206 #define IS_SBIRQ(p)       (READ_AUDIO_STATUS(p)&0x1000)
207 #define IS_MPUIRQ(p)      (READ_AUDIO_STATUS(p)&0x2000)
208 
209 #define RESP 0x00000001		/* command flags */
210 #define PARM 0x00000002
211 #define CMDA 0x00000004
212 #define CMDB 0x00000008
213 #define NILL 0x00000000
214 
215 #define LONG0(a)   ((u32)a)	/* shifts and masks */
216 #define BYTE0(a)   (LONG0(a)&0xff)
217 #define BYTE1(a)   (BYTE0(a)<<8)
218 #define BYTE2(a)   (BYTE0(a)<<16)
219 #define BYTE3(a)   (BYTE0(a)<<24)
220 #define WORD0(a)   (LONG0(a)&0xffff)
221 #define WORD1(a)   (WORD0(a)<<8)
222 #define WORD2(a)   (WORD0(a)<<16)
223 #define TRINIB0(a) (LONG0(a)&0xffffff)
224 #define TRINIB1(a) (TRINIB0(a)<<8)
225 
226 #define RET(a)     ((union cmdret *)(a))
227 
228 #define SEND_GETV(p,b)             sendcmd(p,RESP,GETV,0,RET(b))	/* get version */
229 #define SEND_GETC(p,b,c)           sendcmd(p,PARM|RESP,GETC,c,RET(b))
230 #define SEND_GUNS(p,b)             sendcmd(p,RESP,GUNS,0,RET(b))
231 #define SEND_SCID(p,b)             sendcmd(p,RESP,SCID,0,RET(b))
232 #define SEND_RMEM(p,b,c,d)         sendcmd(p,PARM|RESP,RMEM|BYTE1(b),LONG0(c),RET(d))	/* memory access for firmware write */
233 #define SEND_SMEM(p,b,c)           sendcmd(p,PARM,SMEM|BYTE1(b),LONG0(c),RET(0))	/* memory access for firmware write */
234 #define SEND_WMEM(p,b,c)           sendcmd(p,PARM,WMEM|BYTE1(b),LONG0(c),RET(0))	/* memory access for firmware write */
235 #define SEND_SDTM(p,b,c)           sendcmd(p,PARM|RESP,SDTM|TRINIB1(b),0,RET(c))	/* memory access for firmware write */
236 #define SEND_GOTO(p,b)             sendcmd(p,PARM,GOTO,LONG0(b),RET(0))	/* memory access for firmware write */
237 #define SEND_SETDPLL(p)	           sendcmd(p,0,ARM_SETDPLL,0,RET(0))
238 #define SEND_SSTR(p,b,c)           sendcmd(p,PARM,SSTR|BYTE3(b),LONG0(c),RET(0))	/* start stream */
239 #define SEND_PSTR(p,b)             sendcmd(p,PARM,PSTR,BYTE3(b),RET(0))	/* pause stream */
240 #define SEND_KSTR(p,b)             sendcmd(p,PARM,KSTR,BYTE3(b),RET(0))	/* stop stream */
241 #define SEND_KDMA(p)               sendcmd(p,0,KDMA,0,RET(0))	/* stop all dma */
242 #define SEND_GPOS(p,b,c,d)         sendcmd(p,PARM|RESP,GPOS,BYTE3(c)|BYTE2(b),RET(d))	/* get position in dma */
243 #define SEND_SETF(p,b,c,d,e,f,g)   sendcmd(p,PARM,SETF|WORD1(b)|BYTE3(c),d|BYTE1(e)|BYTE2(f)|BYTE3(g),RET(0))	/* set sample format at mixer */
244 #define SEND_GSTS(p,b,c,d)         sendcmd(p,PARM|RESP,GSTS,BYTE3(c)|BYTE2(b),RET(d))
245 #define SEND_NGPOS(p,b,c,d)        sendcmd(p,PARM|RESP,NGPOS,BYTE3(c)|BYTE2(b),RET(d))
246 #define SEND_PSEL(p,b,c)           sendcmd(p,PARM,PSEL,BYTE2(b)|BYTE3(c),RET(0))	/* activate lbus path */
247 #define SEND_PCLR(p,b,c)           sendcmd(p,PARM,PCLR,BYTE2(b)|BYTE3(c),RET(0))	/* deactivate lbus path */
248 #define SEND_PLST(p,b)             sendcmd(p,PARM,PLST,BYTE3(b),RET(0))
249 #define SEND_RSSV(p,b,c,d)         sendcmd(p,PARM|RESP,RSSV,BYTE2(b)|BYTE3(c),RET(d))
250 #define SEND_LSEL(p,b,c,d,e,f,g,h) sendcmd(p,PARM,LSEL|BYTE1(b)|BYTE2(c)|BYTE3(d),BYTE0(e)|BYTE1(f)|BYTE2(g)|BYTE3(h),RET(0))	/* select paths for internal connections */
251 #define SEND_SSRC(p,b,c,d,e)       sendcmd(p,PARM,SSRC|BYTE1(b)|WORD2(c),WORD0(d)|WORD2(e),RET(0))	/* configure source */
252 #define SEND_SLST(p,b)             sendcmd(p,PARM,SLST,BYTE3(b),RET(0))
253 #define SEND_RSRC(p,b,c)           sendcmd(p,RESP,RSRC|BYTE1(b),0,RET(c))	/* read source config */
254 #define SEND_SSRB(p,b,c)           sendcmd(p,PARM,SSRB|BYTE1(b),WORD2(c),RET(0))
255 #define SEND_SDGV(p,b,c,d,e)       sendcmd(p,PARM,SDGV|BYTE2(b)|BYTE3(c),WORD0(d)|WORD2(e),RET(0))	/* set digital mixer */
256 #define SEND_RDGV(p,b,c,d)         sendcmd(p,PARM|RESP,RDGV|BYTE2(b)|BYTE3(c),0,RET(d))	/* read digital mixer */
257 #define SEND_DLST(p,b)             sendcmd(p,PARM,DLST,BYTE3(b),RET(0))
258 #define SEND_SACR(p,b,c)           sendcmd(p,PARM,SACR,WORD0(b)|WORD2(c),RET(0))	/* set AC97 register */
259 #define SEND_RACR(p,b,c)           sendcmd(p,PARM|RESP,RACR,WORD2(b),RET(c))	/* get AC97 register */
260 #define SEND_ALST(p,b)             sendcmd(p,PARM,ALST,BYTE3(b),RET(0))
261 #define SEND_TXAC(p,b,c,d,e,f)     sendcmd(p,PARM,TXAC|BYTE1(b)|WORD2(c),WORD0(d)|BYTE2(e)|BYTE3(f),RET(0))
262 #define SEND_RXAC(p,b,c,d)         sendcmd(p,PARM|RESP,RXAC,BYTE2(b)|BYTE3(c),RET(d))
263 #define SEND_SI2S(p,b)             sendcmd(p,PARM,SI2S,WORD2(b),RET(0))
264 
265 #define EOB_STATUS         0x80000000	/* status flags : block boundary */
266 #define EOS_STATUS         0x40000000	/*              : stoppped */
267 #define EOC_STATUS         0x20000000	/*              : stream end */
268 #define ERR_STATUS         0x10000000
269 #define EMPTY_STATUS       0x08000000
270 
271 #define IEOB_ENABLE        0x1	/* enable interrupts for status notification above */
272 #define IEOS_ENABLE        0x2
273 #define IEOC_ENABLE        0x4
274 #define RDONCE             0x8
275 #define DESC_MAX_MASK      0xff
276 
277 #define ST_PLAY  0x1		/* stream states */
278 #define ST_STOP  0x2
279 #define ST_PAUSE 0x4
280 
281 #define I2S_INTDEC     3	/* config for I2S link */
282 #define I2S_MERGER     0
283 #define I2S_SPLITTER   0
284 #define I2S_MIXER      7
285 #define I2S_RATE       44100
286 
287 #define MODEM_INTDEC   4	/* config for modem link */
288 #define MODEM_MERGER   3
289 #define MODEM_SPLITTER 0
290 #define MODEM_MIXER    11
291 
292 #define FM_INTDEC      3	/* config for FM/OPL3 link */
293 #define FM_MERGER      0
294 #define FM_SPLITTER    0
295 #define FM_MIXER       9
296 
297 #define SPLIT_PATH  0x80	/* path splitting flag */
298 
299 enum FIRMWARE {
300 	DATA_REC = 0, EXT_END_OF_FILE, EXT_SEG_ADDR_REC, EXT_GOTO_CMD_REC,
301 	EXT_LIN_ADDR_REC,
302 };
303 
304 enum CMDS {
305 	GETV = 0x00, GETC, GUNS, SCID, RMEM =
306 	    0x10, SMEM, WMEM, SDTM, GOTO, SSTR =
307 	    0x20, PSTR, KSTR, KDMA, GPOS, SETF, GSTS, NGPOS, PSEL =
308 	    0x30, PCLR, PLST, RSSV, LSEL, SSRC = 0x40, SLST, RSRC, SSRB, SDGV =
309 	    0x50, RDGV, DLST, SACR = 0x60, RACR, ALST, TXAC, RXAC, SI2S =
310 	    0x70, ARM_SETDPLL = 0x72,
311 };
312 
313 enum E1SOURCE {
314 	ARM2LBUS_FIFO0 = 0, ARM2LBUS_FIFO1, ARM2LBUS_FIFO2, ARM2LBUS_FIFO3,
315 	ARM2LBUS_FIFO4, ARM2LBUS_FIFO5, ARM2LBUS_FIFO6, ARM2LBUS_FIFO7,
316 	ARM2LBUS_FIFO8, ARM2LBUS_FIFO9, ARM2LBUS_FIFO10, ARM2LBUS_FIFO11,
317 	ARM2LBUS_FIFO12, ARM2LBUS_FIFO13, ARM2LBUS_FIFO14, ARM2LBUS_FIFO15,
318 	INTER0_OUT, INTER1_OUT, INTER2_OUT, INTER3_OUT, INTER4_OUT,
319 	INTERM0_OUT, INTERM1_OUT, INTERM2_OUT, INTERM3_OUT, INTERM4_OUT,
320 	INTERM5_OUT, INTERM6_OUT, DECIMM0_OUT, DECIMM1_OUT, DECIMM2_OUT,
321 	DECIMM3_OUT, DECIM0_OUT, SR3_4_OUT, OPL3_SAMPLE, ASRC0, ASRC1,
322 	ACLNK2PADC, ACLNK2MODEM0RX, ACLNK2MIC, ACLNK2MODEM1RX, ACLNK2HNDMIC,
323 	DIGITAL_MIXER_OUT0, GAINFUNC0_OUT, GAINFUNC1_OUT, GAINFUNC2_OUT,
324 	GAINFUNC3_OUT, GAINFUNC4_OUT, SOFTMODEMTX, SPLITTER0_OUTL,
325 	SPLITTER0_OUTR, SPLITTER1_OUTL, SPLITTER1_OUTR, SPLITTER2_OUTL,
326 	SPLITTER2_OUTR, SPLITTER3_OUTL, SPLITTER3_OUTR, MERGER0_OUT,
327 	MERGER1_OUT, MERGER2_OUT, MERGER3_OUT, ARM2LBUS_FIFO_DIRECT, NO_OUT
328 };
329 
330 enum E2SINK {
331 	LBUS2ARM_FIFO0 = 0, LBUS2ARM_FIFO1, LBUS2ARM_FIFO2, LBUS2ARM_FIFO3,
332 	LBUS2ARM_FIFO4, LBUS2ARM_FIFO5, LBUS2ARM_FIFO6, LBUS2ARM_FIFO7,
333 	INTER0_IN, INTER1_IN, INTER2_IN, INTER3_IN, INTER4_IN, INTERM0_IN,
334 	INTERM1_IN, INTERM2_IN, INTERM3_IN, INTERM4_IN, INTERM5_IN, INTERM6_IN,
335 	DECIMM0_IN, DECIMM1_IN, DECIMM2_IN, DECIMM3_IN, DECIM0_IN, SR3_4_IN,
336 	PDAC2ACLNK, MODEM0TX2ACLNK, MODEM1TX2ACLNK, HNDSPK2ACLNK,
337 	DIGITAL_MIXER_IN0, DIGITAL_MIXER_IN1, DIGITAL_MIXER_IN2,
338 	DIGITAL_MIXER_IN3, DIGITAL_MIXER_IN4, DIGITAL_MIXER_IN5,
339 	DIGITAL_MIXER_IN6, DIGITAL_MIXER_IN7, DIGITAL_MIXER_IN8,
340 	DIGITAL_MIXER_IN9, DIGITAL_MIXER_IN10, DIGITAL_MIXER_IN11,
341 	GAINFUNC0_IN, GAINFUNC1_IN, GAINFUNC2_IN, GAINFUNC3_IN, GAINFUNC4_IN,
342 	SOFTMODEMRX, SPLITTER0_IN, SPLITTER1_IN, SPLITTER2_IN, SPLITTER3_IN,
343 	MERGER0_INL, MERGER0_INR, MERGER1_INL, MERGER1_INR, MERGER2_INL,
344 	MERGER2_INR, MERGER3_INL, MERGER3_INR, E2SINK_MAX
345 };
346 
347 enum LBUS_SINK {
348 	LS_SRC_INTERPOLATOR = 0, LS_SRC_INTERPOLATORM, LS_SRC_DECIMATOR,
349 	LS_SRC_DECIMATORM, LS_MIXER_IN, LS_MIXER_GAIN_FUNCTION,
350 	LS_SRC_SPLITTER, LS_SRC_MERGER, LS_NONE1, LS_NONE2,
351 };
352 
353 enum RT_CHANNEL_IDS {
354 	M0TX = 0, M1TX, TAMTX, HSSPKR, PDAC, DSNDTX0, DSNDTX1, DSNDTX2,
355 	DSNDTX3, DSNDTX4, DSNDTX5, DSNDTX6, DSNDTX7, WVSTRTX, COP3DTX, SPARE,
356 	M0RX, HSMIC, M1RX, CLEANRX, MICADC, PADC, COPRX1, COPRX2,
357 	CHANNEL_ID_COUNTER
358 };
359 
360 enum { SB_CMD = 0, MODEM_CMD, I2S_CMD0, I2S_CMD1, FM_CMD, MAX_CMD };
361 
362 struct lbuspath {
363 	const unsigned char *noconv;
364 	const unsigned char *stereo;
365 	const unsigned char *mono;
366 };
367 
368 struct cmdport {
369 	u32 data1;		/* cmd,param */
370 	u32 data2;		/* param */
371 	u32 stat;		/* status */
372 	u32 pad[5];
373 };
374 
375 struct riptideport {
376 	u32 audio_control;	/* status registers */
377 	u32 audio_status;
378 	u32 pad[2];
379 	struct cmdport port[2];	/* command ports */
380 };
381 
382 struct cmdif {
383 	struct device *dev;
384 	struct riptideport *hwport;
385 	spinlock_t lock;
386 	unsigned int cmdcnt;	/* cmd statistics */
387 	unsigned int cmdtime;
388 	unsigned int cmdtimemax;
389 	unsigned int cmdtimemin;
390 	unsigned int errcnt;
391 	int is_reset;
392 };
393 
394 struct riptide_firmware {
395 	u16 ASIC;
396 	u16 CODEC;
397 	u16 AUXDSP;
398 	u16 PROG;
399 };
400 
401 union cmdret {
402 	u8 retbytes[8];
403 	u16 retwords[4];
404 	u32 retlongs[2];
405 };
406 
407 union firmware_version {
408 	union cmdret ret;
409 	struct riptide_firmware firmware;
410 };
411 
412 #define get_pcmhwdev(substream) (struct pcmhw *)(substream->runtime->private_data)
413 
414 #define PLAYBACK_SUBSTREAMS 3
415 struct snd_riptide {
416 	struct snd_card *card;
417 	struct pci_dev *pci;
418 	const struct firmware *fw_entry;
419 
420 	struct cmdif *cif;
421 
422 	struct snd_pcm *pcm;
423 	struct snd_pcm *pcm_i2s;
424 	struct snd_rawmidi *rmidi;
425 	struct snd_opl3 *opl3;
426 	struct snd_ac97 *ac97;
427 	struct snd_ac97_bus *ac97_bus;
428 
429 	struct snd_pcm_substream *playback_substream[PLAYBACK_SUBSTREAMS];
430 	struct snd_pcm_substream *capture_substream;
431 
432 	int openstreams;
433 
434 	int irq;
435 	unsigned long port;
436 	unsigned short mpuaddr;
437 	unsigned short opladdr;
438 #ifdef SUPPORT_JOYSTICK
439 	unsigned short gameaddr;
440 #endif
441 	struct resource *res_port;
442 
443 	unsigned short device_id;
444 
445 	union firmware_version firmware;
446 
447 	spinlock_t lock;
448 	struct snd_info_entry *proc_entry;
449 
450 	unsigned long received_irqs;
451 	unsigned long handled_irqs;
452 	int in_suspend;
453 };
454 
455 struct sgd {			/* scatter gather desriptor */
456 	__le32 dwNextLink;
457 	__le32 dwSegPtrPhys;
458 	__le32 dwSegLen;
459 	__le32 dwStat_Ctl;
460 };
461 
462 struct pcmhw {			/* pcm descriptor */
463 	struct lbuspath paths;
464 	const unsigned char *lbuspath;
465 	unsigned char source;
466 	unsigned char intdec[2];
467 	unsigned char mixer;
468 	unsigned char id;
469 	unsigned char state;
470 	unsigned int rate;
471 	unsigned int channels;
472 	snd_pcm_format_t format;
473 	struct snd_dma_buffer sgdlist;
474 	struct sgd *sgdbuf;
475 	unsigned int size;
476 	unsigned int pages;
477 	unsigned int oldpos;
478 	unsigned int pointer;
479 };
480 
481 #define CMDRET_ZERO (union cmdret){{(u32)0, (u32) 0}}
482 
483 static int sendcmd(struct cmdif *cif, u32 flags, u32 cmd, u32 parm,
484 		   union cmdret *ret);
485 static int getsourcesink(struct cmdif *cif, unsigned char source,
486 			 unsigned char sink, unsigned char *a,
487 			 unsigned char *b);
488 static int snd_riptide_initialize(struct snd_riptide *chip);
489 static int riptide_reset(struct cmdif *cif, struct snd_riptide *chip);
490 
491 /*
492  */
493 
494 static const struct pci_device_id snd_riptide_ids[] = {
495 	{ PCI_DEVICE(0x127a, 0x4310) },
496 	{ PCI_DEVICE(0x127a, 0x4320) },
497 	{ PCI_DEVICE(0x127a, 0x4330) },
498 	{ PCI_DEVICE(0x127a, 0x4340) },
499 	{0,},
500 };
501 
502 #ifdef SUPPORT_JOYSTICK
503 static const struct pci_device_id snd_riptide_joystick_ids[] = {
504 	{ PCI_DEVICE(0x127a, 0x4312) },
505 	{ PCI_DEVICE(0x127a, 0x4322) },
506 	{ PCI_DEVICE(0x127a, 0x4332) },
507 	{ PCI_DEVICE(0x127a, 0x4342) },
508 	{0,},
509 };
510 #endif
511 
512 MODULE_DEVICE_TABLE(pci, snd_riptide_ids);
513 
514 /*
515  */
516 
517 static const unsigned char lbusin2out[E2SINK_MAX + 1][2] = {
518 	{NO_OUT, LS_NONE1}, {NO_OUT, LS_NONE2}, {NO_OUT, LS_NONE1}, {NO_OUT,
519 								     LS_NONE2},
520 	{NO_OUT, LS_NONE1}, {NO_OUT, LS_NONE2}, {NO_OUT, LS_NONE1}, {NO_OUT,
521 								     LS_NONE2},
522 	{INTER0_OUT, LS_SRC_INTERPOLATOR}, {INTER1_OUT, LS_SRC_INTERPOLATOR},
523 	{INTER2_OUT, LS_SRC_INTERPOLATOR}, {INTER3_OUT, LS_SRC_INTERPOLATOR},
524 	{INTER4_OUT, LS_SRC_INTERPOLATOR}, {INTERM0_OUT, LS_SRC_INTERPOLATORM},
525 	{INTERM1_OUT, LS_SRC_INTERPOLATORM}, {INTERM2_OUT,
526 					      LS_SRC_INTERPOLATORM},
527 	{INTERM3_OUT, LS_SRC_INTERPOLATORM}, {INTERM4_OUT,
528 					      LS_SRC_INTERPOLATORM},
529 	{INTERM5_OUT, LS_SRC_INTERPOLATORM}, {INTERM6_OUT,
530 					      LS_SRC_INTERPOLATORM},
531 	{DECIMM0_OUT, LS_SRC_DECIMATORM}, {DECIMM1_OUT, LS_SRC_DECIMATORM},
532 	{DECIMM2_OUT, LS_SRC_DECIMATORM}, {DECIMM3_OUT, LS_SRC_DECIMATORM},
533 	{DECIM0_OUT, LS_SRC_DECIMATOR}, {SR3_4_OUT, LS_NONE1}, {NO_OUT,
534 								LS_NONE2},
535 	{NO_OUT, LS_NONE1}, {NO_OUT, LS_NONE2}, {NO_OUT, LS_NONE1},
536 	{DIGITAL_MIXER_OUT0, LS_MIXER_IN}, {DIGITAL_MIXER_OUT0, LS_MIXER_IN},
537 	{DIGITAL_MIXER_OUT0, LS_MIXER_IN}, {DIGITAL_MIXER_OUT0, LS_MIXER_IN},
538 	{DIGITAL_MIXER_OUT0, LS_MIXER_IN}, {DIGITAL_MIXER_OUT0, LS_MIXER_IN},
539 	{DIGITAL_MIXER_OUT0, LS_MIXER_IN}, {DIGITAL_MIXER_OUT0, LS_MIXER_IN},
540 	{DIGITAL_MIXER_OUT0, LS_MIXER_IN}, {DIGITAL_MIXER_OUT0, LS_MIXER_IN},
541 	{DIGITAL_MIXER_OUT0, LS_MIXER_IN}, {DIGITAL_MIXER_OUT0, LS_MIXER_IN},
542 	{GAINFUNC0_OUT, LS_MIXER_GAIN_FUNCTION}, {GAINFUNC1_OUT,
543 						  LS_MIXER_GAIN_FUNCTION},
544 	{GAINFUNC2_OUT, LS_MIXER_GAIN_FUNCTION}, {GAINFUNC3_OUT,
545 						  LS_MIXER_GAIN_FUNCTION},
546 	{GAINFUNC4_OUT, LS_MIXER_GAIN_FUNCTION}, {SOFTMODEMTX, LS_NONE1},
547 	{SPLITTER0_OUTL, LS_SRC_SPLITTER}, {SPLITTER1_OUTL, LS_SRC_SPLITTER},
548 	{SPLITTER2_OUTL, LS_SRC_SPLITTER}, {SPLITTER3_OUTL, LS_SRC_SPLITTER},
549 	{MERGER0_OUT, LS_SRC_MERGER}, {MERGER0_OUT, LS_SRC_MERGER},
550 	{MERGER1_OUT, LS_SRC_MERGER},
551 	{MERGER1_OUT, LS_SRC_MERGER}, {MERGER2_OUT, LS_SRC_MERGER},
552 	{MERGER2_OUT, LS_SRC_MERGER},
553 	{MERGER3_OUT, LS_SRC_MERGER}, {MERGER3_OUT, LS_SRC_MERGER}, {NO_OUT,
554 								     LS_NONE2},
555 };
556 
557 static const unsigned char lbus_play_opl3[] = {
558 	DIGITAL_MIXER_IN0 + FM_MIXER, 0xff
559 };
560 static const unsigned char lbus_play_modem[] = {
561 	DIGITAL_MIXER_IN0 + MODEM_MIXER, 0xff
562 };
563 static const unsigned char lbus_play_i2s[] = {
564 	INTER0_IN + I2S_INTDEC, DIGITAL_MIXER_IN0 + I2S_MIXER, 0xff
565 };
566 static const unsigned char lbus_play_out[] = {
567 	PDAC2ACLNK, 0xff
568 };
569 static const unsigned char lbus_play_outhp[] = {
570 	HNDSPK2ACLNK, 0xff
571 };
572 static const unsigned char lbus_play_noconv1[] = {
573 	DIGITAL_MIXER_IN0, 0xff
574 };
575 static const unsigned char lbus_play_stereo1[] = {
576 	INTER0_IN, DIGITAL_MIXER_IN0, 0xff
577 };
578 static const unsigned char lbus_play_mono1[] = {
579 	INTERM0_IN, DIGITAL_MIXER_IN0, 0xff
580 };
581 static const unsigned char lbus_play_noconv2[] = {
582 	DIGITAL_MIXER_IN1, 0xff
583 };
584 static const unsigned char lbus_play_stereo2[] = {
585 	INTER1_IN, DIGITAL_MIXER_IN1, 0xff
586 };
587 static const unsigned char lbus_play_mono2[] = {
588 	INTERM1_IN, DIGITAL_MIXER_IN1, 0xff
589 };
590 static const unsigned char lbus_play_noconv3[] = {
591 	DIGITAL_MIXER_IN2, 0xff
592 };
593 static const unsigned char lbus_play_stereo3[] = {
594 	INTER2_IN, DIGITAL_MIXER_IN2, 0xff
595 };
596 static const unsigned char lbus_play_mono3[] = {
597 	INTERM2_IN, DIGITAL_MIXER_IN2, 0xff
598 };
599 static const unsigned char lbus_rec_noconv1[] = {
600 	LBUS2ARM_FIFO5, 0xff
601 };
602 static const unsigned char lbus_rec_stereo1[] = {
603 	DECIM0_IN, LBUS2ARM_FIFO5, 0xff
604 };
605 static const unsigned char lbus_rec_mono1[] = {
606 	DECIMM3_IN, LBUS2ARM_FIFO5, 0xff
607 };
608 
609 static const unsigned char play_ids[] = { 4, 1, 2, };
610 static const unsigned char play_sources[] = {
611 	ARM2LBUS_FIFO4, ARM2LBUS_FIFO1, ARM2LBUS_FIFO2,
612 };
613 static const struct lbuspath lbus_play_paths[] = {
614 	{
615 	 .noconv = lbus_play_noconv1,
616 	 .stereo = lbus_play_stereo1,
617 	 .mono = lbus_play_mono1,
618 	 },
619 	{
620 	 .noconv = lbus_play_noconv2,
621 	 .stereo = lbus_play_stereo2,
622 	 .mono = lbus_play_mono2,
623 	 },
624 	{
625 	 .noconv = lbus_play_noconv3,
626 	 .stereo = lbus_play_stereo3,
627 	 .mono = lbus_play_mono3,
628 	 },
629 };
630 static const struct lbuspath lbus_rec_path = {
631 	.noconv = lbus_rec_noconv1,
632 	.stereo = lbus_rec_stereo1,
633 	.mono = lbus_rec_mono1,
634 };
635 
636 #define FIRMWARE_VERSIONS 1
637 static union firmware_version firmware_versions[] = {
638 	{
639 		.firmware = {
640 			.ASIC = 3,
641 			.CODEC = 2,
642 			.AUXDSP = 3,
643 			.PROG = 773,
644 		},
645 	},
646 };
647 
atoh(const unsigned char * in,unsigned int len)648 static u32 atoh(const unsigned char *in, unsigned int len)
649 {
650 	u32 sum = 0;
651 	unsigned int mult = 1;
652 	unsigned char c;
653 
654 	while (len) {
655 		int value;
656 
657 		c = in[len - 1];
658 		value = hex_to_bin(c);
659 		if (value >= 0)
660 			sum += mult * value;
661 		mult *= 16;
662 		--len;
663 	}
664 	return sum;
665 }
666 
senddata(struct cmdif * cif,const unsigned char * in,u32 offset)667 static int senddata(struct cmdif *cif, const unsigned char *in, u32 offset)
668 {
669 	u32 addr;
670 	u32 data;
671 	u32 i;
672 	const unsigned char *p;
673 
674 	i = atoh(&in[1], 2);
675 	addr = offset + atoh(&in[3], 4);
676 	if (SEND_SMEM(cif, 0, addr) != 0)
677 		return -EACCES;
678 	p = in + 9;
679 	while (i) {
680 		data = atoh(p, 8);
681 		if (SEND_WMEM(cif, 2,
682 			      ((data & 0x0f0f0f0f) << 4) | ((data & 0xf0f0f0f0)
683 							    >> 4)))
684 			return -EACCES;
685 		i -= 4;
686 		p += 8;
687 	}
688 	return 0;
689 }
690 
loadfirmware(struct cmdif * cif,const unsigned char * img,unsigned int size)691 static int loadfirmware(struct cmdif *cif, const unsigned char *img,
692 			unsigned int size)
693 {
694 	const unsigned char *in;
695 	u32 laddr, saddr, t, val;
696 	int err = 0;
697 
698 	laddr = saddr = 0;
699 	while (size > 0 && err == 0) {
700 		in = img;
701 		if (in[0] == ':') {
702 			t = atoh(&in[7], 2);
703 			switch (t) {
704 			case DATA_REC:
705 				err = senddata(cif, in, laddr + saddr);
706 				break;
707 			case EXT_SEG_ADDR_REC:
708 				saddr = atoh(&in[9], 4) << 4;
709 				break;
710 			case EXT_LIN_ADDR_REC:
711 				laddr = atoh(&in[9], 4) << 16;
712 				break;
713 			case EXT_GOTO_CMD_REC:
714 				val = atoh(&in[9], 8);
715 				if (SEND_GOTO(cif, val) != 0)
716 					err = -EACCES;
717 				break;
718 			case EXT_END_OF_FILE:
719 				size = 0;
720 				break;
721 			default:
722 				break;
723 			}
724 			while (size > 0) {
725 				size--;
726 				if (*img++ == '\n')
727 					break;
728 			}
729 		}
730 	}
731 	dev_dbg(cif->dev, "load firmware return %d\n", err);
732 	return err;
733 }
734 
735 static void
alloclbuspath(struct cmdif * cif,unsigned char source,const unsigned char * path,unsigned char * mixer,unsigned char * s)736 alloclbuspath(struct cmdif *cif, unsigned char source,
737 	      const unsigned char *path, unsigned char *mixer, unsigned char *s)
738 {
739 	while (*path != 0xff) {
740 		unsigned char sink, type;
741 
742 		sink = *path & (~SPLIT_PATH);
743 		if (sink != E2SINK_MAX) {
744 			dev_dbg(cif->dev, "alloc path 0x%x->0x%x\n", source, sink);
745 			SEND_PSEL(cif, source, sink);
746 			source = lbusin2out[sink][0];
747 			type = lbusin2out[sink][1];
748 			if (type == LS_MIXER_IN) {
749 				if (mixer)
750 					*mixer = sink - DIGITAL_MIXER_IN0;
751 			}
752 			if (type == LS_SRC_DECIMATORM ||
753 			    type == LS_SRC_DECIMATOR ||
754 			    type == LS_SRC_INTERPOLATORM ||
755 			    type == LS_SRC_INTERPOLATOR) {
756 				if (s) {
757 					if (s[0] != 0xff)
758 						s[1] = sink;
759 					else
760 						s[0] = sink;
761 				}
762 			}
763 		}
764 		if (*path++ & SPLIT_PATH) {
765 			const unsigned char *npath = path;
766 
767 			while (*npath != 0xff)
768 				npath++;
769 			alloclbuspath(cif, source + 1, ++npath, mixer, s);
770 		}
771 	}
772 }
773 
774 static void
freelbuspath(struct cmdif * cif,unsigned char source,const unsigned char * path)775 freelbuspath(struct cmdif *cif, unsigned char source, const unsigned char *path)
776 {
777 	while (*path != 0xff) {
778 		unsigned char sink;
779 
780 		sink = *path & (~SPLIT_PATH);
781 		if (sink != E2SINK_MAX) {
782 			dev_dbg(cif->dev, "free path 0x%x->0x%x\n", source, sink);
783 			SEND_PCLR(cif, source, sink);
784 			source = lbusin2out[sink][0];
785 		}
786 		if (*path++ & SPLIT_PATH) {
787 			const unsigned char *npath = path;
788 
789 			while (*npath != 0xff)
790 				npath++;
791 			freelbuspath(cif, source + 1, ++npath);
792 		}
793 	}
794 }
795 
writearm(struct cmdif * cif,u32 addr,u32 data,u32 mask)796 static int writearm(struct cmdif *cif, u32 addr, u32 data, u32 mask)
797 {
798 	union cmdret rptr = CMDRET_ZERO;
799 	unsigned int i = MAX_WRITE_RETRY;
800 	int flag = 1;
801 
802 	SEND_RMEM(cif, 0x02, addr, &rptr);
803 	rptr.retlongs[0] &= (~mask);
804 
805 	while (--i) {
806 		SEND_SMEM(cif, 0x01, addr);
807 		SEND_WMEM(cif, 0x02, (rptr.retlongs[0] | data));
808 		SEND_RMEM(cif, 0x02, addr, &rptr);
809 		if ((rptr.retlongs[0] & data) == data) {
810 			flag = 0;
811 			break;
812 		} else
813 			rptr.retlongs[0] &= ~mask;
814 	}
815 	dev_dbg(cif->dev, "send arm 0x%x 0x%x 0x%x return %d\n", addr, data, mask,
816 		flag);
817 	return flag;
818 }
819 
sendcmd(struct cmdif * cif,u32 flags,u32 cmd,u32 parm,union cmdret * ret)820 static int sendcmd(struct cmdif *cif, u32 flags, u32 cmd, u32 parm,
821 		   union cmdret *ret)
822 {
823 	int i, j;
824 	int err;
825 	unsigned int time = 0;
826 	unsigned long irqflags;
827 	struct riptideport *hwport;
828 	struct cmdport *cmdport = NULL;
829 
830 	if (snd_BUG_ON(!cif))
831 		return -EINVAL;
832 
833 	hwport = cif->hwport;
834 	if (cif->errcnt > MAX_ERROR_COUNT) {
835 		if (cif->is_reset) {
836 			dev_err(cif->dev,
837 				"Riptide: Too many failed cmds, reinitializing\n");
838 			if (riptide_reset(cif, NULL) == 0) {
839 				cif->errcnt = 0;
840 				return -EIO;
841 			}
842 		}
843 		dev_err(cif->dev, "Riptide: Initialization failed.\n");
844 		return -EINVAL;
845 	}
846 	if (ret) {
847 		ret->retlongs[0] = 0;
848 		ret->retlongs[1] = 0;
849 	}
850 	i = 0;
851 	spin_lock_irqsave(&cif->lock, irqflags);
852 	while (i++ < CMDIF_TIMEOUT && !IS_READY(cif->hwport))
853 		udelay(10);
854 	if (i > CMDIF_TIMEOUT) {
855 		err = -EBUSY;
856 		goto errout;
857 	}
858 
859 	err = 0;
860 	for (j = 0, time = 0; time < CMDIF_TIMEOUT; j++, time += 2) {
861 		cmdport = &(hwport->port[j % 2]);
862 		if (IS_DATF(cmdport)) {	/* free pending data */
863 			READ_PORT_ULONG(cmdport->data1);
864 			READ_PORT_ULONG(cmdport->data2);
865 		}
866 		if (IS_CMDE(cmdport)) {
867 			if (flags & PARM)	/* put data */
868 				WRITE_PORT_ULONG(cmdport->data2, parm);
869 			WRITE_PORT_ULONG(cmdport->data1, cmd);	/* write cmd */
870 			if ((flags & RESP) && ret) {
871 				while (!IS_DATF(cmdport) &&
872 				       time < CMDIF_TIMEOUT) {
873 					udelay(10);
874 					time++;
875 				}
876 				if (time < CMDIF_TIMEOUT) {	/* read response */
877 					ret->retlongs[0] =
878 					    READ_PORT_ULONG(cmdport->data1);
879 					ret->retlongs[1] =
880 					    READ_PORT_ULONG(cmdport->data2);
881 				} else {
882 					err = -ENOSYS;
883 					goto errout;
884 				}
885 			}
886 			break;
887 		}
888 		udelay(20);
889 	}
890 	if (time == CMDIF_TIMEOUT) {
891 		err = -ENODATA;
892 		goto errout;
893 	}
894 	spin_unlock_irqrestore(&cif->lock, irqflags);
895 
896 	cif->cmdcnt++;		/* update command statistics */
897 	cif->cmdtime += time;
898 	if (time > cif->cmdtimemax)
899 		cif->cmdtimemax = time;
900 	if (time < cif->cmdtimemin)
901 		cif->cmdtimemin = time;
902 	if ((cif->cmdcnt) % 1000 == 0)
903 		dev_dbg(cif->dev,
904 			"send cmd %d time: %d mintime: %d maxtime %d err: %d\n",
905 			cif->cmdcnt, cif->cmdtime, cif->cmdtimemin,
906 			cif->cmdtimemax, cif->errcnt);
907 	return 0;
908 
909       errout:
910 	cif->errcnt++;
911 	spin_unlock_irqrestore(&cif->lock, irqflags);
912 	dev_dbg(cif->dev,
913 		"send cmd %d hw: 0x%x flag: 0x%x cmd: 0x%x parm: 0x%x ret: 0x%x 0x%x CMDE: %d DATF: %d failed %d\n",
914 		cif->cmdcnt, (int)((void *)&(cmdport->stat) - (void *)hwport),
915 		flags, cmd, parm, ret ? ret->retlongs[0] : 0,
916 		ret ? ret->retlongs[1] : 0, IS_CMDE(cmdport), IS_DATF(cmdport),
917 		err);
918 	return err;
919 }
920 
921 static int
setmixer(struct cmdif * cif,short num,unsigned short rval,unsigned short lval)922 setmixer(struct cmdif *cif, short num, unsigned short rval, unsigned short lval)
923 {
924 	union cmdret rptr = CMDRET_ZERO;
925 	int i = 0;
926 
927 	dev_dbg(cif->dev, "sent mixer %d: 0x%x 0x%x\n", num, rval, lval);
928 	do {
929 		SEND_SDGV(cif, num, num, rval, lval);
930 		SEND_RDGV(cif, num, num, &rptr);
931 		if (rptr.retwords[0] == lval && rptr.retwords[1] == rval)
932 			return 0;
933 	} while (i++ < MAX_WRITE_RETRY);
934 	dev_dbg(cif->dev, "sent mixer failed\n");
935 	return -EIO;
936 }
937 
getpaths(struct cmdif * cif,unsigned char * o)938 static int getpaths(struct cmdif *cif, unsigned char *o)
939 {
940 	unsigned char src[E2SINK_MAX];
941 	unsigned char sink[E2SINK_MAX];
942 	int i, j = 0;
943 
944 	for (i = 0; i < E2SINK_MAX; i++) {
945 		getsourcesink(cif, i, i, &src[i], &sink[i]);
946 		if (sink[i] < E2SINK_MAX) {
947 			o[j++] = sink[i];
948 			o[j++] = i;
949 		}
950 	}
951 	return j;
952 }
953 
954 static int
getsourcesink(struct cmdif * cif,unsigned char source,unsigned char sink,unsigned char * a,unsigned char * b)955 getsourcesink(struct cmdif *cif, unsigned char source, unsigned char sink,
956 	      unsigned char *a, unsigned char *b)
957 {
958 	union cmdret rptr = CMDRET_ZERO;
959 
960 	if (SEND_RSSV(cif, source, sink, &rptr) &&
961 	    SEND_RSSV(cif, source, sink, &rptr))
962 		return -EIO;
963 	*a = rptr.retbytes[0];
964 	*b = rptr.retbytes[1];
965 	dev_dbg(cif->dev, "%s 0x%x 0x%x\n", __func__, *a, *b);
966 	return 0;
967 }
968 
969 static int
getsamplerate(struct cmdif * cif,unsigned char * intdec,unsigned int * rate)970 getsamplerate(struct cmdif *cif, unsigned char *intdec, unsigned int *rate)
971 {
972 	unsigned char *s;
973 	unsigned int p[2] = { 0, 0 };
974 	int i;
975 	union cmdret rptr = CMDRET_ZERO;
976 
977 	s = intdec;
978 	for (i = 0; i < 2; i++) {
979 		if (*s != 0xff) {
980 			if (SEND_RSRC(cif, *s, &rptr) &&
981 			    SEND_RSRC(cif, *s, &rptr))
982 				return -EIO;
983 			p[i] += rptr.retwords[1];
984 			p[i] *= rptr.retwords[2];
985 			p[i] += rptr.retwords[3];
986 			p[i] /= 65536;
987 		}
988 		s++;
989 	}
990 	if (p[0]) {
991 		if (p[1] != p[0])
992 			dev_dbg(cif->dev, "rates differ %d %d\n", p[0], p[1]);
993 		*rate = (unsigned int)p[0];
994 	} else
995 		*rate = (unsigned int)p[1];
996 	dev_dbg(cif->dev, "getsampleformat %d %d %d\n", intdec[0], intdec[1], *rate);
997 	return 0;
998 }
999 
1000 static int
setsampleformat(struct cmdif * cif,unsigned char mixer,unsigned char id,unsigned char channels,snd_pcm_format_t format)1001 setsampleformat(struct cmdif *cif,
1002 		unsigned char mixer, unsigned char id,
1003 		unsigned char channels, snd_pcm_format_t format)
1004 {
1005 	unsigned char w, ch, sig, order;
1006 
1007 	dev_dbg(cif->dev,
1008 		"%s mixer: %d id: %d channels: %d format: %d\n",
1009 		__func__, mixer, id, channels, format);
1010 	ch = channels == 1;
1011 	w = snd_pcm_format_width(format) == 8;
1012 	sig = snd_pcm_format_unsigned(format) != 0;
1013 	order = snd_pcm_format_big_endian(format) != 0;
1014 
1015 	if (SEND_SETF(cif, mixer, w, ch, order, sig, id) &&
1016 	    SEND_SETF(cif, mixer, w, ch, order, sig, id)) {
1017 		dev_dbg(cif->dev, "%s failed\n", __func__);
1018 		return -EIO;
1019 	}
1020 	return 0;
1021 }
1022 
1023 static int
setsamplerate(struct cmdif * cif,unsigned char * intdec,unsigned int rate)1024 setsamplerate(struct cmdif *cif, unsigned char *intdec, unsigned int rate)
1025 {
1026 	u32 D, M, N;
1027 	union cmdret rptr = CMDRET_ZERO;
1028 	int i;
1029 
1030 	dev_dbg(cif->dev, "%s intdec: %d,%d rate: %d\n", __func__,
1031 		intdec[0], intdec[1], rate);
1032 	D = 48000;
1033 	M = ((rate == 48000) ? 47999 : rate) * 65536;
1034 	N = M % D;
1035 	M /= D;
1036 	for (i = 0; i < 2; i++) {
1037 		if (*intdec != 0xff) {
1038 			do {
1039 				SEND_SSRC(cif, *intdec, D, M, N);
1040 				SEND_RSRC(cif, *intdec, &rptr);
1041 			} while (rptr.retwords[1] != D &&
1042 				 rptr.retwords[2] != M &&
1043 				 rptr.retwords[3] != N &&
1044 				 i++ < MAX_WRITE_RETRY);
1045 			if (i > MAX_WRITE_RETRY) {
1046 				dev_dbg(cif->dev, "sent samplerate %d: %d failed\n",
1047 					*intdec, rate);
1048 				return -EIO;
1049 			}
1050 		}
1051 		intdec++;
1052 	}
1053 	return 0;
1054 }
1055 
1056 static int
getmixer(struct cmdif * cif,short num,unsigned short * rval,unsigned short * lval)1057 getmixer(struct cmdif *cif, short num, unsigned short *rval,
1058 	 unsigned short *lval)
1059 {
1060 	union cmdret rptr = CMDRET_ZERO;
1061 
1062 	if (SEND_RDGV(cif, num, num, &rptr) && SEND_RDGV(cif, num, num, &rptr))
1063 		return -EIO;
1064 	*rval = rptr.retwords[0];
1065 	*lval = rptr.retwords[1];
1066 	dev_dbg(cif->dev, "got mixer %d: 0x%x 0x%x\n", num, *rval, *lval);
1067 	return 0;
1068 }
1069 
riptide_handleirq(int irq,void * dev_id)1070 static irqreturn_t riptide_handleirq(int irq, void *dev_id)
1071 {
1072 	struct snd_riptide *chip = dev_id;
1073 	struct cmdif *cif = chip->cif;
1074 	struct snd_pcm_substream *substream[PLAYBACK_SUBSTREAMS + 1];
1075 	struct snd_pcm_runtime *runtime;
1076 	struct pcmhw *data = NULL;
1077 	unsigned int pos, period_bytes;
1078 	struct sgd *c;
1079 	int i, j;
1080 	unsigned int flag;
1081 
1082 	if (!cif)
1083 		return IRQ_HANDLED;
1084 
1085 	for (i = 0; i < PLAYBACK_SUBSTREAMS; i++)
1086 		substream[i] = chip->playback_substream[i];
1087 	substream[i] = chip->capture_substream;
1088 	for (i = 0; i < PLAYBACK_SUBSTREAMS + 1; i++) {
1089 		if (!substream[i])
1090 			continue;
1091 		runtime = substream[i]->runtime;
1092 		if (!runtime)
1093 			continue;
1094 		data = runtime->private_data;
1095 		if (!data)
1096 			continue;
1097 		if (data->state != ST_STOP) {
1098 			pos = 0;
1099 			for (j = 0; j < data->pages; j++) {
1100 				c = &data->sgdbuf[j];
1101 				flag = le32_to_cpu(c->dwStat_Ctl);
1102 				if (flag & EOB_STATUS)
1103 					pos += le32_to_cpu(c->dwSegLen);
1104 				if (flag & EOC_STATUS)
1105 					pos += le32_to_cpu(c->dwSegLen);
1106 				if ((flag & EOS_STATUS)
1107 				    && (data->state == ST_PLAY)) {
1108 					data->state = ST_STOP;
1109 					dev_err(cif->dev,
1110 						"Riptide: DMA stopped unexpectedly\n");
1111 				}
1112 				c->dwStat_Ctl =
1113 				    cpu_to_le32(flag &
1114 						~(EOS_STATUS | EOB_STATUS |
1115 						  EOC_STATUS));
1116 			}
1117 			data->pointer += pos;
1118 			pos += data->oldpos;
1119 			if (data->state != ST_STOP) {
1120 				period_bytes =
1121 				    frames_to_bytes(runtime,
1122 						    runtime->period_size);
1123 				dev_dbg(cif->dev,
1124 					"interrupt 0x%x after 0x%lx of 0x%lx frames in period\n",
1125 					READ_AUDIO_STATUS(cif->hwport),
1126 					bytes_to_frames(runtime, pos),
1127 					runtime->period_size);
1128 				j = 0;
1129 				if (pos >= period_bytes) {
1130 					j++;
1131 					while (pos >= period_bytes)
1132 						pos -= period_bytes;
1133 				}
1134 				data->oldpos = pos;
1135 				if (j > 0)
1136 					snd_pcm_period_elapsed(substream[i]);
1137 			}
1138 		}
1139 	}
1140 
1141 	return IRQ_HANDLED;
1142 }
1143 
riptide_suspend(struct device * dev)1144 static int riptide_suspend(struct device *dev)
1145 {
1146 	struct snd_card *card = dev_get_drvdata(dev);
1147 	struct snd_riptide *chip = card->private_data;
1148 
1149 	chip->in_suspend = 1;
1150 	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1151 	snd_ac97_suspend(chip->ac97);
1152 	return 0;
1153 }
1154 
riptide_resume(struct device * dev)1155 static int riptide_resume(struct device *dev)
1156 {
1157 	struct snd_card *card = dev_get_drvdata(dev);
1158 	struct snd_riptide *chip = card->private_data;
1159 
1160 	snd_riptide_initialize(chip);
1161 	snd_ac97_resume(chip->ac97);
1162 	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1163 	chip->in_suspend = 0;
1164 	return 0;
1165 }
1166 
1167 static DEFINE_SIMPLE_DEV_PM_OPS(riptide_pm, riptide_suspend, riptide_resume);
1168 
try_to_load_firmware(struct cmdif * cif,struct snd_riptide * chip)1169 static int try_to_load_firmware(struct cmdif *cif, struct snd_riptide *chip)
1170 {
1171 	union firmware_version firmware = { .ret = CMDRET_ZERO };
1172 	int i, timeout, err;
1173 
1174 	for (i = 0; i < 2; i++) {
1175 		WRITE_PORT_ULONG(cif->hwport->port[i].data1, 0);
1176 		WRITE_PORT_ULONG(cif->hwport->port[i].data2, 0);
1177 	}
1178 	SET_GRESET(cif->hwport);
1179 	udelay(100);
1180 	UNSET_GRESET(cif->hwport);
1181 	udelay(100);
1182 
1183 	for (timeout = 100000; --timeout; udelay(10)) {
1184 		if (IS_READY(cif->hwport) && !IS_GERR(cif->hwport))
1185 			break;
1186 	}
1187 	if (!timeout) {
1188 		dev_err(cif->dev,
1189 			"Riptide: device not ready, audio status: 0x%x ready: %d gerr: %d\n",
1190 			READ_AUDIO_STATUS(cif->hwport),
1191 			IS_READY(cif->hwport), IS_GERR(cif->hwport));
1192 		return -EIO;
1193 	} else {
1194 		dev_dbg(cif->dev,
1195 			"Riptide: audio status: 0x%x ready: %d gerr: %d\n",
1196 			READ_AUDIO_STATUS(cif->hwport),
1197 			IS_READY(cif->hwport), IS_GERR(cif->hwport));
1198 	}
1199 
1200 	SEND_GETV(cif, &firmware.ret);
1201 	dev_dbg(cif->dev,
1202 		"Firmware version: ASIC: %d CODEC %d AUXDSP %d PROG %d\n",
1203 		firmware.firmware.ASIC, firmware.firmware.CODEC,
1204 		firmware.firmware.AUXDSP, firmware.firmware.PROG);
1205 
1206 	if (!chip)
1207 		return 1;
1208 
1209 	for (i = 0; i < FIRMWARE_VERSIONS; i++) {
1210 		if (!memcmp(&firmware_versions[i], &firmware, sizeof(firmware)))
1211 			return 1; /* OK */
1212 
1213 	}
1214 
1215 	dev_dbg(cif->dev, "Writing Firmware\n");
1216 	if (!chip->fw_entry) {
1217 		err = request_firmware(&chip->fw_entry, "riptide.hex",
1218 				       &chip->pci->dev);
1219 		if (err) {
1220 			dev_err(cif->dev,
1221 				"Riptide: Firmware not available %d\n", err);
1222 			return -EIO;
1223 		}
1224 	}
1225 	err = loadfirmware(cif, chip->fw_entry->data, chip->fw_entry->size);
1226 	if (err) {
1227 		dev_err(cif->dev,
1228 			"Riptide: Could not load firmware %d\n", err);
1229 		return err;
1230 	}
1231 
1232 	chip->firmware = firmware;
1233 
1234 	return 1; /* OK */
1235 }
1236 
riptide_reset(struct cmdif * cif,struct snd_riptide * chip)1237 static int riptide_reset(struct cmdif *cif, struct snd_riptide *chip)
1238 {
1239 	union cmdret rptr = CMDRET_ZERO;
1240 	int err, tries;
1241 
1242 	if (!cif)
1243 		return -EINVAL;
1244 
1245 	cif->cmdcnt = 0;
1246 	cif->cmdtime = 0;
1247 	cif->cmdtimemax = 0;
1248 	cif->cmdtimemin = 0xffffffff;
1249 	cif->errcnt = 0;
1250 	cif->is_reset = 0;
1251 
1252 	tries = RESET_TRIES;
1253 	do {
1254 		err = try_to_load_firmware(cif, chip);
1255 		if (err < 0)
1256 			return err;
1257 	} while (!err && --tries);
1258 
1259 	SEND_SACR(cif, 0, AC97_RESET);
1260 	SEND_RACR(cif, AC97_RESET, &rptr);
1261 	dev_dbg(cif->dev, "AC97: 0x%x 0x%x\n", rptr.retlongs[0], rptr.retlongs[1]);
1262 
1263 	SEND_PLST(cif, 0);
1264 	SEND_SLST(cif, 0);
1265 	SEND_DLST(cif, 0);
1266 	SEND_ALST(cif, 0);
1267 	SEND_KDMA(cif);
1268 
1269 	writearm(cif, 0x301F8, 1, 1);
1270 	writearm(cif, 0x301F4, 1, 1);
1271 
1272 	SEND_LSEL(cif, MODEM_CMD, 0, 0, MODEM_INTDEC, MODEM_MERGER,
1273 		  MODEM_SPLITTER, MODEM_MIXER);
1274 	setmixer(cif, MODEM_MIXER, 0x7fff, 0x7fff);
1275 	alloclbuspath(cif, ARM2LBUS_FIFO13, lbus_play_modem, NULL, NULL);
1276 
1277 	SEND_LSEL(cif, FM_CMD, 0, 0, FM_INTDEC, FM_MERGER, FM_SPLITTER,
1278 		  FM_MIXER);
1279 	setmixer(cif, FM_MIXER, 0x7fff, 0x7fff);
1280 	writearm(cif, 0x30648 + FM_MIXER * 4, 0x01, 0x00000005);
1281 	writearm(cif, 0x301A8, 0x02, 0x00000002);
1282 	writearm(cif, 0x30264, 0x08, 0xffffffff);
1283 	alloclbuspath(cif, OPL3_SAMPLE, lbus_play_opl3, NULL, NULL);
1284 
1285 	SEND_SSRC(cif, I2S_INTDEC, 48000,
1286 		  ((u32) I2S_RATE * 65536) / 48000,
1287 		  ((u32) I2S_RATE * 65536) % 48000);
1288 	SEND_LSEL(cif, I2S_CMD0, 0, 0, I2S_INTDEC, I2S_MERGER, I2S_SPLITTER,
1289 		  I2S_MIXER);
1290 	SEND_SI2S(cif, 1);
1291 	alloclbuspath(cif, ARM2LBUS_FIFO0, lbus_play_i2s, NULL, NULL);
1292 	alloclbuspath(cif, DIGITAL_MIXER_OUT0, lbus_play_out, NULL, NULL);
1293 	alloclbuspath(cif, DIGITAL_MIXER_OUT0, lbus_play_outhp, NULL, NULL);
1294 
1295 	SET_AIACK(cif->hwport);
1296 	SET_AIE(cif->hwport);
1297 	SET_AIACK(cif->hwport);
1298 	cif->is_reset = 1;
1299 
1300 	return 0;
1301 }
1302 
1303 static const struct snd_pcm_hardware snd_riptide_playback = {
1304 	.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1305 		 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1306 		 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_MMAP_VALID),
1307 	.formats =
1308 	    SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8
1309 	    | SNDRV_PCM_FMTBIT_U16_LE,
1310 	.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1311 	.rate_min = 5500,
1312 	.rate_max = 48000,
1313 	.channels_min = 1,
1314 	.channels_max = 2,
1315 	.buffer_bytes_max = (64 * 1024),
1316 	.period_bytes_min = PAGE_SIZE >> 1,
1317 	.period_bytes_max = PAGE_SIZE << 8,
1318 	.periods_min = 2,
1319 	.periods_max = 64,
1320 	.fifo_size = 0,
1321 };
1322 static const struct snd_pcm_hardware snd_riptide_capture = {
1323 	.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1324 		 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1325 		 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_MMAP_VALID),
1326 	.formats =
1327 	    SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8
1328 	    | SNDRV_PCM_FMTBIT_U16_LE,
1329 	.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1330 	.rate_min = 5500,
1331 	.rate_max = 48000,
1332 	.channels_min = 1,
1333 	.channels_max = 2,
1334 	.buffer_bytes_max = (64 * 1024),
1335 	.period_bytes_min = PAGE_SIZE >> 1,
1336 	.period_bytes_max = PAGE_SIZE << 3,
1337 	.periods_min = 2,
1338 	.periods_max = 64,
1339 	.fifo_size = 0,
1340 };
1341 
snd_riptide_pointer(struct snd_pcm_substream * substream)1342 static snd_pcm_uframes_t snd_riptide_pointer(struct snd_pcm_substream
1343 					     *substream)
1344 {
1345 	struct snd_riptide *chip = snd_pcm_substream_chip(substream);
1346 	struct snd_pcm_runtime *runtime = substream->runtime;
1347 	struct pcmhw *data = get_pcmhwdev(substream);
1348 	struct cmdif *cif = chip->cif;
1349 	union cmdret rptr = CMDRET_ZERO;
1350 	snd_pcm_uframes_t ret;
1351 
1352 	SEND_GPOS(cif, 0, data->id, &rptr);
1353 	if (data->size && runtime->period_size) {
1354 		dev_dbg(cif->dev,
1355 			"pointer stream %d position 0x%x(0x%x in buffer) bytes 0x%lx(0x%lx in period) frames\n",
1356 			data->id, rptr.retlongs[1], rptr.retlongs[1] % data->size,
1357 			bytes_to_frames(runtime, rptr.retlongs[1]),
1358 			bytes_to_frames(runtime,
1359 				     rptr.retlongs[1]) % runtime->period_size);
1360 		if (rptr.retlongs[1] > data->pointer)
1361 			ret =
1362 			    bytes_to_frames(runtime,
1363 					    rptr.retlongs[1] % data->size);
1364 		else
1365 			ret =
1366 			    bytes_to_frames(runtime,
1367 					    data->pointer % data->size);
1368 	} else {
1369 		dev_dbg(cif->dev,
1370 			"stream not started or strange parms (%d %ld)\n",
1371 			data->size, runtime->period_size);
1372 		ret = bytes_to_frames(runtime, 0);
1373 	}
1374 	return ret;
1375 }
1376 
snd_riptide_trigger(struct snd_pcm_substream * substream,int cmd)1377 static int snd_riptide_trigger(struct snd_pcm_substream *substream, int cmd)
1378 {
1379 	int i, j;
1380 	struct snd_riptide *chip = snd_pcm_substream_chip(substream);
1381 	struct pcmhw *data = get_pcmhwdev(substream);
1382 	struct cmdif *cif = chip->cif;
1383 	union cmdret rptr = CMDRET_ZERO;
1384 
1385 	spin_lock(&chip->lock);
1386 	switch (cmd) {
1387 	case SNDRV_PCM_TRIGGER_START:
1388 	case SNDRV_PCM_TRIGGER_RESUME:
1389 		if (!(data->state & ST_PLAY)) {
1390 			SEND_SSTR(cif, data->id, data->sgdlist.addr);
1391 			SET_AIE(cif->hwport);
1392 			data->state = ST_PLAY;
1393 			if (data->mixer != 0xff)
1394 				setmixer(cif, data->mixer, 0x7fff, 0x7fff);
1395 			chip->openstreams++;
1396 			data->oldpos = 0;
1397 			data->pointer = 0;
1398 		}
1399 		break;
1400 	case SNDRV_PCM_TRIGGER_STOP:
1401 	case SNDRV_PCM_TRIGGER_SUSPEND:
1402 		if (data->mixer != 0xff)
1403 			setmixer(cif, data->mixer, 0, 0);
1404 		setmixer(cif, data->mixer, 0, 0);
1405 		SEND_KSTR(cif, data->id);
1406 		data->state = ST_STOP;
1407 		chip->openstreams--;
1408 		j = 0;
1409 		do {
1410 			i = rptr.retlongs[1];
1411 			SEND_GPOS(cif, 0, data->id, &rptr);
1412 			udelay(1);
1413 		} while (i != rptr.retlongs[1] && j++ < MAX_WRITE_RETRY);
1414 		if (j > MAX_WRITE_RETRY)
1415 			dev_err(cif->dev, "Riptide: Could not stop stream!");
1416 		break;
1417 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1418 		if (!(data->state & ST_PAUSE)) {
1419 			SEND_PSTR(cif, data->id);
1420 			data->state |= ST_PAUSE;
1421 			chip->openstreams--;
1422 		}
1423 		break;
1424 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1425 		if (data->state & ST_PAUSE) {
1426 			SEND_SSTR(cif, data->id, data->sgdlist.addr);
1427 			data->state &= ~ST_PAUSE;
1428 			chip->openstreams++;
1429 		}
1430 		break;
1431 	default:
1432 		spin_unlock(&chip->lock);
1433 		return -EINVAL;
1434 	}
1435 	spin_unlock(&chip->lock);
1436 	return 0;
1437 }
1438 
snd_riptide_prepare(struct snd_pcm_substream * substream)1439 static int snd_riptide_prepare(struct snd_pcm_substream *substream)
1440 {
1441 	struct snd_riptide *chip = snd_pcm_substream_chip(substream);
1442 	struct snd_pcm_runtime *runtime = substream->runtime;
1443 	struct pcmhw *data = get_pcmhwdev(substream);
1444 	struct cmdif *cif = chip->cif;
1445 	const unsigned char *lbuspath = NULL;
1446 	unsigned int rate, channels;
1447 	int err = 0;
1448 	snd_pcm_format_t format;
1449 
1450 	if (snd_BUG_ON(!cif || !data))
1451 		return -EINVAL;
1452 
1453 	dev_dbg(cif->dev, "prepare id %d ch: %d f:0x%x r:%d\n", data->id,
1454 		runtime->channels, runtime->format, runtime->rate);
1455 
1456 	spin_lock_irq(&chip->lock);
1457 	channels = runtime->channels;
1458 	format = runtime->format;
1459 	rate = runtime->rate;
1460 	switch (channels) {
1461 	case 1:
1462 		if (rate == 48000 && format == SNDRV_PCM_FORMAT_S16_LE)
1463 			lbuspath = data->paths.noconv;
1464 		else
1465 			lbuspath = data->paths.mono;
1466 		break;
1467 	case 2:
1468 		if (rate == 48000 && format == SNDRV_PCM_FORMAT_S16_LE)
1469 			lbuspath = data->paths.noconv;
1470 		else
1471 			lbuspath = data->paths.stereo;
1472 		break;
1473 	}
1474 	dev_dbg(cif->dev, "use sgdlist at 0x%p\n", data->sgdlist.area);
1475 	if (data->sgdlist.area) {
1476 		unsigned int i, j, size, pages, f, pt, period;
1477 		struct sgd *c, *p = NULL;
1478 
1479 		size = frames_to_bytes(runtime, runtime->buffer_size);
1480 		period = frames_to_bytes(runtime, runtime->period_size);
1481 		f = PAGE_SIZE;
1482 		while ((size + (f >> 1) - 1) <= (f << 7) && (f << 1) > period)
1483 			f = f >> 1;
1484 		pages = DIV_ROUND_UP(size, f);
1485 		data->size = size;
1486 		data->pages = pages;
1487 		dev_dbg(cif->dev,
1488 			"create sgd size: 0x%x pages %d of size 0x%x for period 0x%x\n",
1489 			size, pages, f, period);
1490 		pt = 0;
1491 		j = 0;
1492 		for (i = 0; i < pages; i++) {
1493 			unsigned int ofs, addr;
1494 			c = &data->sgdbuf[i];
1495 			if (p)
1496 				p->dwNextLink = cpu_to_le32(data->sgdlist.addr +
1497 							    (i *
1498 							     sizeof(struct
1499 								    sgd)));
1500 			c->dwNextLink = cpu_to_le32(data->sgdlist.addr);
1501 			ofs = j << PAGE_SHIFT;
1502 			addr = snd_pcm_sgbuf_get_addr(substream, ofs) + pt;
1503 			c->dwSegPtrPhys = cpu_to_le32(addr);
1504 			pt = (pt + f) % PAGE_SIZE;
1505 			if (pt == 0)
1506 				j++;
1507 			c->dwSegLen = cpu_to_le32(f);
1508 			c->dwStat_Ctl =
1509 			    cpu_to_le32(IEOB_ENABLE | IEOS_ENABLE |
1510 					IEOC_ENABLE);
1511 			p = c;
1512 			size -= f;
1513 		}
1514 		data->sgdbuf[i].dwSegLen = cpu_to_le32(size);
1515 	}
1516 	if (lbuspath && lbuspath != data->lbuspath) {
1517 		if (data->lbuspath)
1518 			freelbuspath(cif, data->source, data->lbuspath);
1519 		alloclbuspath(cif, data->source, lbuspath,
1520 			      &data->mixer, data->intdec);
1521 		data->lbuspath = lbuspath;
1522 		data->rate = 0;
1523 	}
1524 	if (data->rate != rate || data->format != format ||
1525 	    data->channels != channels) {
1526 		data->rate = rate;
1527 		data->format = format;
1528 		data->channels = channels;
1529 		if (setsampleformat
1530 		    (cif, data->mixer, data->id, channels, format)
1531 		    || setsamplerate(cif, data->intdec, rate))
1532 			err = -EIO;
1533 	}
1534 	spin_unlock_irq(&chip->lock);
1535 	return err;
1536 }
1537 
1538 static int
snd_riptide_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * hw_params)1539 snd_riptide_hw_params(struct snd_pcm_substream *substream,
1540 		      struct snd_pcm_hw_params *hw_params)
1541 {
1542 	struct snd_riptide *chip = snd_pcm_substream_chip(substream);
1543 	struct pcmhw *data = get_pcmhwdev(substream);
1544 	struct snd_dma_buffer *sgdlist = &data->sgdlist;
1545 	int err;
1546 
1547 	dev_dbg(chip->card->dev, "hw params id %d (sgdlist: 0x%p 0x%lx %d)\n",
1548 		data->id, sgdlist->area, (unsigned long)sgdlist->addr,
1549 		(int)sgdlist->bytes);
1550 	if (sgdlist->area)
1551 		snd_dma_free_pages(sgdlist);
1552 	err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
1553 				  sizeof(struct sgd) * (DESC_MAX_MASK + 1),
1554 				  sgdlist);
1555 	if (err < 0) {
1556 		dev_err(chip->card->dev,
1557 			"Riptide: failed to alloc %d dma bytes\n",
1558 			(int)sizeof(struct sgd) * (DESC_MAX_MASK + 1));
1559 		return err;
1560 	}
1561 	data->sgdbuf = (struct sgd *)sgdlist->area;
1562 	return 0;
1563 }
1564 
snd_riptide_hw_free(struct snd_pcm_substream * substream)1565 static int snd_riptide_hw_free(struct snd_pcm_substream *substream)
1566 {
1567 	struct snd_riptide *chip = snd_pcm_substream_chip(substream);
1568 	struct pcmhw *data = get_pcmhwdev(substream);
1569 	struct cmdif *cif = chip->cif;
1570 
1571 	if (cif && data) {
1572 		if (data->lbuspath)
1573 			freelbuspath(cif, data->source, data->lbuspath);
1574 		data->lbuspath = NULL;
1575 		data->source = 0xff;
1576 		data->intdec[0] = 0xff;
1577 		data->intdec[1] = 0xff;
1578 
1579 		if (data->sgdlist.area) {
1580 			snd_dma_free_pages(&data->sgdlist);
1581 			data->sgdlist.area = NULL;
1582 		}
1583 	}
1584 	return 0;
1585 }
1586 
snd_riptide_playback_open(struct snd_pcm_substream * substream)1587 static int snd_riptide_playback_open(struct snd_pcm_substream *substream)
1588 {
1589 	struct snd_riptide *chip = snd_pcm_substream_chip(substream);
1590 	struct snd_pcm_runtime *runtime = substream->runtime;
1591 	struct pcmhw *data;
1592 	int sub_num = substream->number;
1593 
1594 	chip->playback_substream[sub_num] = substream;
1595 	runtime->hw = snd_riptide_playback;
1596 
1597 	data = kzalloc(sizeof(struct pcmhw), GFP_KERNEL);
1598 	if (data == NULL)
1599 		return -ENOMEM;
1600 	data->paths = lbus_play_paths[sub_num];
1601 	data->id = play_ids[sub_num];
1602 	data->source = play_sources[sub_num];
1603 	data->intdec[0] = 0xff;
1604 	data->intdec[1] = 0xff;
1605 	data->state = ST_STOP;
1606 	runtime->private_data = data;
1607 	return snd_pcm_hw_constraint_integer(runtime,
1608 					     SNDRV_PCM_HW_PARAM_PERIODS);
1609 }
1610 
snd_riptide_capture_open(struct snd_pcm_substream * substream)1611 static int snd_riptide_capture_open(struct snd_pcm_substream *substream)
1612 {
1613 	struct snd_riptide *chip = snd_pcm_substream_chip(substream);
1614 	struct snd_pcm_runtime *runtime = substream->runtime;
1615 	struct pcmhw *data;
1616 
1617 	chip->capture_substream = substream;
1618 	runtime->hw = snd_riptide_capture;
1619 
1620 	data = kzalloc(sizeof(struct pcmhw), GFP_KERNEL);
1621 	if (data == NULL)
1622 		return -ENOMEM;
1623 	data->paths = lbus_rec_path;
1624 	data->id = PADC;
1625 	data->source = ACLNK2PADC;
1626 	data->intdec[0] = 0xff;
1627 	data->intdec[1] = 0xff;
1628 	data->state = ST_STOP;
1629 	runtime->private_data = data;
1630 	return snd_pcm_hw_constraint_integer(runtime,
1631 					     SNDRV_PCM_HW_PARAM_PERIODS);
1632 }
1633 
snd_riptide_playback_close(struct snd_pcm_substream * substream)1634 static int snd_riptide_playback_close(struct snd_pcm_substream *substream)
1635 {
1636 	struct snd_riptide *chip = snd_pcm_substream_chip(substream);
1637 	struct pcmhw *data = get_pcmhwdev(substream);
1638 	int sub_num = substream->number;
1639 
1640 	substream->runtime->private_data = NULL;
1641 	chip->playback_substream[sub_num] = NULL;
1642 	kfree(data);
1643 	return 0;
1644 }
1645 
snd_riptide_capture_close(struct snd_pcm_substream * substream)1646 static int snd_riptide_capture_close(struct snd_pcm_substream *substream)
1647 {
1648 	struct snd_riptide *chip = snd_pcm_substream_chip(substream);
1649 	struct pcmhw *data = get_pcmhwdev(substream);
1650 
1651 	substream->runtime->private_data = NULL;
1652 	chip->capture_substream = NULL;
1653 	kfree(data);
1654 	return 0;
1655 }
1656 
1657 static const struct snd_pcm_ops snd_riptide_playback_ops = {
1658 	.open = snd_riptide_playback_open,
1659 	.close = snd_riptide_playback_close,
1660 	.hw_params = snd_riptide_hw_params,
1661 	.hw_free = snd_riptide_hw_free,
1662 	.prepare = snd_riptide_prepare,
1663 	.trigger = snd_riptide_trigger,
1664 	.pointer = snd_riptide_pointer,
1665 };
1666 static const struct snd_pcm_ops snd_riptide_capture_ops = {
1667 	.open = snd_riptide_capture_open,
1668 	.close = snd_riptide_capture_close,
1669 	.hw_params = snd_riptide_hw_params,
1670 	.hw_free = snd_riptide_hw_free,
1671 	.prepare = snd_riptide_prepare,
1672 	.trigger = snd_riptide_trigger,
1673 	.pointer = snd_riptide_pointer,
1674 };
1675 
snd_riptide_pcm(struct snd_riptide * chip,int device)1676 static int snd_riptide_pcm(struct snd_riptide *chip, int device)
1677 {
1678 	struct snd_pcm *pcm;
1679 	int err;
1680 
1681 	err = snd_pcm_new(chip->card, "RIPTIDE", device, PLAYBACK_SUBSTREAMS, 1,
1682 			  &pcm);
1683 	if (err < 0)
1684 		return err;
1685 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1686 			&snd_riptide_playback_ops);
1687 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1688 			&snd_riptide_capture_ops);
1689 	pcm->private_data = chip;
1690 	pcm->info_flags = 0;
1691 	strcpy(pcm->name, "RIPTIDE");
1692 	chip->pcm = pcm;
1693 	snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1694 				       &chip->pci->dev, 64 * 1024, 128 * 1024);
1695 	return 0;
1696 }
1697 
1698 static irqreturn_t
snd_riptide_interrupt(int irq,void * dev_id)1699 snd_riptide_interrupt(int irq, void *dev_id)
1700 {
1701 	struct snd_riptide *chip = dev_id;
1702 	struct cmdif *cif = chip->cif;
1703 	irqreturn_t ret = IRQ_HANDLED;
1704 
1705 	if (cif) {
1706 		chip->received_irqs++;
1707 		if (IS_EOBIRQ(cif->hwport) || IS_EOSIRQ(cif->hwport) ||
1708 		    IS_EOCIRQ(cif->hwport)) {
1709 			chip->handled_irqs++;
1710 			ret = IRQ_WAKE_THREAD;
1711 		}
1712 		if (chip->rmidi && IS_MPUIRQ(cif->hwport)) {
1713 			chip->handled_irqs++;
1714 			snd_mpu401_uart_interrupt(irq,
1715 						  chip->rmidi->private_data);
1716 		}
1717 		SET_AIACK(cif->hwport);
1718 	}
1719 	return ret;
1720 }
1721 
1722 static void
snd_riptide_codec_write(struct snd_ac97 * ac97,unsigned short reg,unsigned short val)1723 snd_riptide_codec_write(struct snd_ac97 *ac97, unsigned short reg,
1724 			unsigned short val)
1725 {
1726 	struct snd_riptide *chip = ac97->private_data;
1727 	struct cmdif *cif = chip->cif;
1728 	union cmdret rptr = CMDRET_ZERO;
1729 	int i = 0;
1730 
1731 	if (snd_BUG_ON(!cif))
1732 		return;
1733 
1734 	dev_dbg(cif->dev, "Write AC97 reg 0x%x 0x%x\n", reg, val);
1735 	do {
1736 		SEND_SACR(cif, val, reg);
1737 		SEND_RACR(cif, reg, &rptr);
1738 	} while (rptr.retwords[1] != val && i++ < MAX_WRITE_RETRY);
1739 	if (i > MAX_WRITE_RETRY)
1740 		dev_dbg(cif->dev, "Write AC97 reg failed\n");
1741 }
1742 
snd_riptide_codec_read(struct snd_ac97 * ac97,unsigned short reg)1743 static unsigned short snd_riptide_codec_read(struct snd_ac97 *ac97,
1744 					     unsigned short reg)
1745 {
1746 	struct snd_riptide *chip = ac97->private_data;
1747 	struct cmdif *cif = chip->cif;
1748 	union cmdret rptr = CMDRET_ZERO;
1749 
1750 	if (snd_BUG_ON(!cif))
1751 		return 0;
1752 
1753 	if (SEND_RACR(cif, reg, &rptr) != 0)
1754 		SEND_RACR(cif, reg, &rptr);
1755 	dev_dbg(cif->dev, "Read AC97 reg 0x%x got 0x%x\n", reg, rptr.retwords[1]);
1756 	return rptr.retwords[1];
1757 }
1758 
snd_riptide_initialize(struct snd_riptide * chip)1759 static int snd_riptide_initialize(struct snd_riptide *chip)
1760 {
1761 	struct cmdif *cif;
1762 	unsigned int device_id;
1763 	int err;
1764 
1765 	if (snd_BUG_ON(!chip))
1766 		return -EINVAL;
1767 
1768 	cif = chip->cif;
1769 	if (!cif) {
1770 		cif = kzalloc(sizeof(struct cmdif), GFP_KERNEL);
1771 		if (!cif)
1772 			return -ENOMEM;
1773 		cif->dev = chip->card->dev;
1774 		cif->hwport = (struct riptideport *)chip->port;
1775 		spin_lock_init(&cif->lock);
1776 		chip->cif = cif;
1777 	}
1778 	cif->is_reset = 0;
1779 	err = riptide_reset(cif, chip);
1780 	if (err)
1781 		return err;
1782 	device_id = chip->device_id;
1783 	switch (device_id) {
1784 	case 0x4310:
1785 	case 0x4320:
1786 	case 0x4330:
1787 		dev_dbg(cif->dev, "Modem enable?\n");
1788 		SEND_SETDPLL(cif);
1789 		break;
1790 	}
1791 	dev_dbg(cif->dev, "Enabling MPU IRQs\n");
1792 	if (chip->rmidi)
1793 		SET_EMPUIRQ(cif->hwport);
1794 	return err;
1795 }
1796 
snd_riptide_free(struct snd_card * card)1797 static void snd_riptide_free(struct snd_card *card)
1798 {
1799 	struct snd_riptide *chip = card->private_data;
1800 	struct cmdif *cif;
1801 
1802 	cif = chip->cif;
1803 	if (cif) {
1804 		SET_GRESET(cif->hwport);
1805 		udelay(100);
1806 		UNSET_GRESET(cif->hwport);
1807 		kfree(chip->cif);
1808 	}
1809 	release_firmware(chip->fw_entry);
1810 }
1811 
1812 static int
snd_riptide_create(struct snd_card * card,struct pci_dev * pci)1813 snd_riptide_create(struct snd_card *card, struct pci_dev *pci)
1814 {
1815 	struct snd_riptide *chip = card->private_data;
1816 	struct riptideport *hwport;
1817 	int err;
1818 
1819 	err = pcim_enable_device(pci);
1820 	if (err < 0)
1821 		return err;
1822 
1823 	spin_lock_init(&chip->lock);
1824 	chip->card = card;
1825 	chip->pci = pci;
1826 	chip->irq = -1;
1827 	chip->openstreams = 0;
1828 	chip->port = pci_resource_start(pci, 0);
1829 	chip->received_irqs = 0;
1830 	chip->handled_irqs = 0;
1831 	chip->cif = NULL;
1832 	card->private_free = snd_riptide_free;
1833 
1834 	err = pci_request_regions(pci, "RIPTIDE");
1835 	if (err < 0)
1836 		return err;
1837 	hwport = (struct riptideport *)chip->port;
1838 	UNSET_AIE(hwport);
1839 
1840 	if (devm_request_threaded_irq(&pci->dev, pci->irq,
1841 				      snd_riptide_interrupt,
1842 				      riptide_handleirq, IRQF_SHARED,
1843 				      KBUILD_MODNAME, chip)) {
1844 		dev_err(&pci->dev, "Riptide: unable to grab IRQ %d\n",
1845 			pci->irq);
1846 		return -EBUSY;
1847 	}
1848 	chip->irq = pci->irq;
1849 	card->sync_irq = chip->irq;
1850 	chip->device_id = pci->device;
1851 	pci_set_master(pci);
1852 	err = snd_riptide_initialize(chip);
1853 	if (err < 0)
1854 		return err;
1855 
1856 	return 0;
1857 }
1858 
1859 static void
snd_riptide_proc_read(struct snd_info_entry * entry,struct snd_info_buffer * buffer)1860 snd_riptide_proc_read(struct snd_info_entry *entry,
1861 		      struct snd_info_buffer *buffer)
1862 {
1863 	struct snd_riptide *chip = entry->private_data;
1864 	struct pcmhw *data;
1865 	int i;
1866 	struct cmdif *cif = NULL;
1867 	unsigned char p[256];
1868 	unsigned short rval = 0, lval = 0;
1869 	unsigned int rate;
1870 
1871 	if (!chip)
1872 		return;
1873 
1874 	snd_iprintf(buffer, "%s\n\n", chip->card->longname);
1875 	snd_iprintf(buffer, "Device ID: 0x%x\nReceived IRQs: (%ld)%ld\nPorts:",
1876 		    chip->device_id, chip->handled_irqs, chip->received_irqs);
1877 	for (i = 0; i < 64; i += 4)
1878 		snd_iprintf(buffer, "%c%02x: %08x",
1879 			    (i % 16) ? ' ' : '\n', i, inl(chip->port + i));
1880 	cif = chip->cif;
1881 	if (cif) {
1882 		snd_iprintf(buffer,
1883 			    "\nVersion: ASIC: %d CODEC: %d AUXDSP: %d PROG: %d",
1884 			    chip->firmware.firmware.ASIC,
1885 			    chip->firmware.firmware.CODEC,
1886 			    chip->firmware.firmware.AUXDSP,
1887 			    chip->firmware.firmware.PROG);
1888 		snd_iprintf(buffer, "\nDigital mixer:");
1889 		for (i = 0; i < 12; i++) {
1890 			getmixer(cif, i, &rval, &lval);
1891 			snd_iprintf(buffer, "\n %d: %d %d", i, rval, lval);
1892 		}
1893 		snd_iprintf(buffer,
1894 			    "\nARM Commands num: %d failed: %d time: %d max: %d min: %d",
1895 			    cif->cmdcnt, cif->errcnt,
1896 			    cif->cmdtime, cif->cmdtimemax, cif->cmdtimemin);
1897 	}
1898 	snd_iprintf(buffer, "\nOpen streams %d:\n", chip->openstreams);
1899 	for (i = 0; i < PLAYBACK_SUBSTREAMS; i++) {
1900 		if (!chip->playback_substream[i] ||
1901 		    !chip->playback_substream[i]->runtime)
1902 			continue;
1903 		data = chip->playback_substream[i]->runtime->private_data;
1904 		if (data) {
1905 			snd_iprintf(buffer,
1906 				    "stream: %d mixer: %d source: %d (%d,%d)\n",
1907 				    data->id, data->mixer, data->source,
1908 				    data->intdec[0], data->intdec[1]);
1909 			if (!(getsamplerate(cif, data->intdec, &rate)))
1910 				snd_iprintf(buffer, "rate: %d\n", rate);
1911 		}
1912 	}
1913 	if (chip->capture_substream && chip->capture_substream->runtime) {
1914 		data = chip->capture_substream->runtime->private_data;
1915 		if (data) {
1916 			snd_iprintf(buffer,
1917 				    "stream: %d mixer: %d source: %d (%d,%d)\n",
1918 				    data->id, data->mixer,
1919 				    data->source, data->intdec[0], data->intdec[1]);
1920 			if (!(getsamplerate(cif, data->intdec, &rate)))
1921 				snd_iprintf(buffer, "rate: %d\n", rate);
1922 		}
1923 	}
1924 	snd_iprintf(buffer, "Paths:\n");
1925 	i = getpaths(cif, p);
1926 	while (i >= 2) {
1927 		i -= 2;
1928 		snd_iprintf(buffer, "%x->%x ", p[i], p[i + 1]);
1929 	}
1930 	snd_iprintf(buffer, "\n");
1931 }
1932 
snd_riptide_proc_init(struct snd_riptide * chip)1933 static void snd_riptide_proc_init(struct snd_riptide *chip)
1934 {
1935 	snd_card_ro_proc_new(chip->card, "riptide", chip,
1936 			     snd_riptide_proc_read);
1937 }
1938 
snd_riptide_mixer(struct snd_riptide * chip)1939 static int snd_riptide_mixer(struct snd_riptide *chip)
1940 {
1941 	struct snd_ac97_bus *pbus;
1942 	struct snd_ac97_template ac97;
1943 	int err = 0;
1944 	static const struct snd_ac97_bus_ops ops = {
1945 		.write = snd_riptide_codec_write,
1946 		.read = snd_riptide_codec_read,
1947 	};
1948 
1949 	memset(&ac97, 0, sizeof(ac97));
1950 	ac97.private_data = chip;
1951 	ac97.scaps = AC97_SCAP_SKIP_MODEM;
1952 
1953 	err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus);
1954 	if (err < 0)
1955 		return err;
1956 
1957 	chip->ac97_bus = pbus;
1958 	ac97.pci = chip->pci;
1959 	err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);
1960 	if (err < 0)
1961 		return err;
1962 	return err;
1963 }
1964 
1965 #ifdef SUPPORT_JOYSTICK
1966 
1967 static int
snd_riptide_joystick_probe(struct pci_dev * pci,const struct pci_device_id * id)1968 snd_riptide_joystick_probe(struct pci_dev *pci, const struct pci_device_id *id)
1969 {
1970 	static int dev;
1971 	struct gameport *gameport;
1972 	int ret;
1973 
1974 	if (dev >= SNDRV_CARDS)
1975 		return -ENODEV;
1976 
1977 	if (!enable[dev]) {
1978 		ret = -ENOENT;
1979 		goto inc_dev;
1980 	}
1981 
1982 	if (!joystick_port[dev]) {
1983 		ret = 0;
1984 		goto inc_dev;
1985 	}
1986 
1987 	gameport = gameport_allocate_port();
1988 	if (!gameport) {
1989 		ret = -ENOMEM;
1990 		goto inc_dev;
1991 	}
1992 	if (!request_region(joystick_port[dev], 8, "Riptide gameport")) {
1993 		dev_err(&pci->dev,
1994 			"Riptide: cannot grab gameport 0x%x\n",
1995 			joystick_port[dev]);
1996 		gameport_free_port(gameport);
1997 		ret = -EBUSY;
1998 		goto inc_dev;
1999 	}
2000 
2001 	gameport->io = joystick_port[dev];
2002 	gameport_register_port(gameport);
2003 	pci_set_drvdata(pci, gameport);
2004 
2005 	ret = 0;
2006 inc_dev:
2007 	dev++;
2008 	return ret;
2009 }
2010 
snd_riptide_joystick_remove(struct pci_dev * pci)2011 static void snd_riptide_joystick_remove(struct pci_dev *pci)
2012 {
2013 	struct gameport *gameport = pci_get_drvdata(pci);
2014 	if (gameport) {
2015 		release_region(gameport->io, 8);
2016 		gameport_unregister_port(gameport);
2017 	}
2018 }
2019 #endif
2020 
2021 static int
__snd_card_riptide_probe(struct pci_dev * pci,const struct pci_device_id * pci_id)2022 __snd_card_riptide_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
2023 {
2024 	static int dev;
2025 	struct snd_card *card;
2026 	struct snd_riptide *chip;
2027 	unsigned short val;
2028 	int err;
2029 
2030 	if (dev >= SNDRV_CARDS)
2031 		return -ENODEV;
2032 	if (!enable[dev]) {
2033 		dev++;
2034 		return -ENOENT;
2035 	}
2036 
2037 	err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2038 				sizeof(*chip), &card);
2039 	if (err < 0)
2040 		return err;
2041 	chip = card->private_data;
2042 	err = snd_riptide_create(card, pci);
2043 	if (err < 0)
2044 		return err;
2045 	err = snd_riptide_pcm(chip, 0);
2046 	if (err < 0)
2047 		return err;
2048 	err = snd_riptide_mixer(chip);
2049 	if (err < 0)
2050 		return err;
2051 
2052 	val = LEGACY_ENABLE_ALL;
2053 	if (opl3_port[dev])
2054 		val |= LEGACY_ENABLE_FM;
2055 #ifdef SUPPORT_JOYSTICK
2056 	if (joystick_port[dev])
2057 		val |= LEGACY_ENABLE_GAMEPORT;
2058 #endif
2059 	if (mpu_port[dev])
2060 		val |= LEGACY_ENABLE_MPU_INT | LEGACY_ENABLE_MPU;
2061 	val |= (chip->irq << 4) & 0xf0;
2062 	pci_write_config_word(chip->pci, PCI_EXT_Legacy_Mask, val);
2063 	if (mpu_port[dev]) {
2064 		val = mpu_port[dev];
2065 		pci_write_config_word(chip->pci, PCI_EXT_MPU_Base, val);
2066 		err = snd_mpu401_uart_new(card, 0, MPU401_HW_RIPTIDE,
2067 					  val, MPU401_INFO_IRQ_HOOK, -1,
2068 					  &chip->rmidi);
2069 		if (err < 0)
2070 			dev_warn(&pci->dev,
2071 				 "Riptide: Can't Allocate MPU at 0x%x\n",
2072 				 val);
2073 		else
2074 			chip->mpuaddr = val;
2075 	}
2076 	if (opl3_port[dev]) {
2077 		val = opl3_port[dev];
2078 		pci_write_config_word(chip->pci, PCI_EXT_FM_Base, val);
2079 		err = snd_opl3_create(card, val, val + 2,
2080 				      OPL3_HW_RIPTIDE, 0, &chip->opl3);
2081 		if (err < 0)
2082 			dev_warn(&pci->dev,
2083 				 "Riptide: Can't Allocate OPL3 at 0x%x\n",
2084 				 val);
2085 		else {
2086 			chip->opladdr = val;
2087 			err = snd_opl3_hwdep_new(chip->opl3, 0, 1, NULL);
2088 			if (err < 0)
2089 				dev_warn(&pci->dev,
2090 					 "Riptide: Can't Allocate OPL3-HWDEP\n");
2091 		}
2092 	}
2093 #ifdef SUPPORT_JOYSTICK
2094 	if (joystick_port[dev]) {
2095 		val = joystick_port[dev];
2096 		pci_write_config_word(chip->pci, PCI_EXT_Game_Base, val);
2097 		chip->gameaddr = val;
2098 	}
2099 #endif
2100 
2101 	strcpy(card->driver, "RIPTIDE");
2102 	strcpy(card->shortname, "Riptide");
2103 #ifdef SUPPORT_JOYSTICK
2104 	scnprintf(card->longname, sizeof(card->longname),
2105 		  "%s at 0x%lx, irq %i mpu 0x%x opl3 0x%x gameport 0x%x",
2106 		  card->shortname, chip->port, chip->irq, chip->mpuaddr,
2107 		  chip->opladdr, chip->gameaddr);
2108 #else
2109 	scnprintf(card->longname, sizeof(card->longname),
2110 		  "%s at 0x%lx, irq %i mpu 0x%x opl3 0x%x",
2111 		  card->shortname, chip->port, chip->irq, chip->mpuaddr,
2112 		  chip->opladdr);
2113 #endif
2114 	snd_riptide_proc_init(chip);
2115 	err = snd_card_register(card);
2116 	if (err < 0)
2117 		return err;
2118 	pci_set_drvdata(pci, card);
2119 	dev++;
2120 	return 0;
2121 }
2122 
2123 static int
snd_card_riptide_probe(struct pci_dev * pci,const struct pci_device_id * pci_id)2124 snd_card_riptide_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
2125 {
2126 	return snd_card_free_on_error(&pci->dev, __snd_card_riptide_probe(pci, pci_id));
2127 }
2128 
2129 static struct pci_driver driver = {
2130 	.name = KBUILD_MODNAME,
2131 	.id_table = snd_riptide_ids,
2132 	.probe = snd_card_riptide_probe,
2133 	.driver = {
2134 		.pm = &riptide_pm,
2135 	},
2136 };
2137 
2138 #ifdef SUPPORT_JOYSTICK
2139 static struct pci_driver joystick_driver = {
2140 	.name = KBUILD_MODNAME "-joystick",
2141 	.id_table = snd_riptide_joystick_ids,
2142 	.probe = snd_riptide_joystick_probe,
2143 	.remove = snd_riptide_joystick_remove,
2144 };
2145 #endif
2146 
alsa_card_riptide_init(void)2147 static int __init alsa_card_riptide_init(void)
2148 {
2149 	int err;
2150 	err = pci_register_driver(&driver);
2151 	if (err < 0)
2152 		return err;
2153 #if defined(SUPPORT_JOYSTICK)
2154 	err = pci_register_driver(&joystick_driver);
2155 	/* On failure unregister formerly registered audio driver */
2156 	if (err < 0)
2157 		pci_unregister_driver(&driver);
2158 #endif
2159 	return err;
2160 }
2161 
alsa_card_riptide_exit(void)2162 static void __exit alsa_card_riptide_exit(void)
2163 {
2164 	pci_unregister_driver(&driver);
2165 #if defined(SUPPORT_JOYSTICK)
2166 	pci_unregister_driver(&joystick_driver);
2167 #endif
2168 }
2169 
2170 module_init(alsa_card_riptide_init);
2171 module_exit(alsa_card_riptide_exit);
2172