140 	param.tid = q_params->tid;  in target_if_rx_reorder_queue_setup()
167 	int tid;  in target_if_multi_rx_reorder_queue_setup()  local
196 	for (tid = 0; tid < DP_MAX_TIDS; tid++) {  in target_if_multi_rx_reorder_queue_setup()
197 		if (!(BIT(tid) & q_params->tid_bitmap))  in target_if_multi_rx_reorder_queue_setup()
199 		param.queue_params_list[tid].hw_qdesc_paddr =  in target_if_multi_rx_reorder_queue_setup()
200 			q_params->q_setup_list[tid].hw_qdesc_paddr;  in target_if_multi_rx_reorder_queue_setup()
201 		param.queue_params_list[tid].queue_no =  in target_if_multi_rx_reorder_queue_setup()
202 			q_params->q_setup_list[tid].queue_no;  in target_if_multi_rx_reorder_queue_setup()
203 		param.queue_params_list[tid].ba_window_size_valid =  in target_if_multi_rx_reorder_queue_setup()
204 			q_params->q_setup_list[tid].ba_window_size_valid;  in target_if_multi_rx_reorder_queue_setup()
205 		param.queue_params_list[tid].ba_window_size =  in target_if_multi_rx_reorder_queue_setup()
206 			q_params->q_setup_list[tid].ba_window_size;  in target_if_multi_rx_reorder_queue_setup()
222 				      qdf_dma_addr_t hw_qdesc, int tid,  in target_if_peer_rx_reorder_queue_setup()  argument
239 	q_params->tid = tid;  in target_if_peer_rx_reorder_queue_setup()
265 	int tid;  in target_if_peer_multi_rx_reorder_queue_setup()  local
279 	for (tid = 0; tid < DP_MAX_TIDS; tid++) {  in target_if_peer_multi_rx_reorder_queue_setup()
280 		if (!(BIT(tid) & tid_params->tid_bitmap))  in target_if_peer_multi_rx_reorder_queue_setup()
282 		q_params->q_setup_list[tid].hw_qdesc_paddr =  in target_if_peer_multi_rx_reorder_queue_setup()
283 			tid_params->queue_params_list[tid].hw_qdesc_paddr;  in target_if_peer_multi_rx_reorder_queue_setup()
284 		q_params->q_setup_list[tid].queue_no =  in target_if_peer_multi_rx_reorder_queue_setup()
285 			tid_params->queue_params_list[tid].queue_no;  in target_if_peer_multi_rx_reorder_queue_setup()
286 		q_params->q_setup_list[tid].ba_window_size_valid =  in target_if_peer_multi_rx_reorder_queue_setup()
287 			tid_params->queue_params_list[tid].ba_window_size_valid;  in target_if_peer_multi_rx_reorder_queue_setup()
288 		q_params->q_setup_list[tid].ba_window_size =  in target_if_peer_multi_rx_reorder_queue_setup()
289 			tid_params->queue_params_list[tid].ba_window_size;  in target_if_peer_multi_rx_reorder_queue_setup()
308 				      qdf_dma_addr_t hw_qdesc, int tid,  in target_if_peer_rx_reorder_queue_setup()  argument
331 	param.tid = tid;  in target_if_peer_rx_reorder_queue_setup()
692 				    uint32_t tid,  in send_peer_txq_flush_conf()  argument
715 	param.tid_mask = tid;  in send_peer_txq_flush_conf()
734 				    uint32_t tid)  in send_peer_txq_flush_tids()  argument
754 	param.peer_tid_bitmap = tid;  in send_peer_txq_flush_tids()
763 				    uint8_t ac, uint32_t tid,  in target_if_peer_txq_flush_config()  argument
776 	if (!tid && !ac) {  in target_if_peer_txq_flush_config()
781 	if (tid && policy == CDP_PEER_TXQ_FLUSH_POLICY_INVALID) {  in target_if_peer_txq_flush_config()
798 	if (tid) {  in target_if_peer_txq_flush_config()
800 			rc = send_peer_txq_flush_tids(psoc, addr, vdev_id, tid);  in target_if_peer_txq_flush_config()
804 		rc = send_peer_txq_flush_conf(psoc, addr, vdev_id, tid, policy);  in target_if_peer_txq_flush_config()
810 		tid = 0;  in target_if_peer_txq_flush_config()
813 				tid |= (1 << ac_to_tid[i][0]) |  in target_if_peer_txq_flush_config()
817 		rc = send_peer_txq_flush_tids(psoc, addr, vdev_id, tid);  in target_if_peer_txq_flush_config()