Lines Matching refs:hal

32 void hal_qca6290_attach(struct hal_soc *hal);
35 void hal_qca8074_attach(struct hal_soc *hal);
39 void hal_qca8074v2_attach(struct hal_soc *hal);
42 void hal_qca6390_attach(struct hal_soc *hal);
45 void hal_qca6490_attach(struct hal_soc *hal);
48 void hal_qcn9000_attach(struct hal_soc *hal);
51 void hal_qcn9224v2_attach(struct hal_soc *hal);
54 void hal_qcn6122_attach(struct hal_soc *hal);
57 void hal_qcn6432_attach(struct hal_soc *hal);
60 void hal_qca6750_attach(struct hal_soc *hal);
63 void hal_qca5018_attach(struct hal_soc *hal);
66 void hal_qca5332_attach(struct hal_soc *hal);
69 void hal_kiwi_attach(struct hal_soc *hal);
102 static void hal_reg_write_fail_history_init(struct hal_soc *hal) in hal_reg_write_fail_history_init() argument
104 hal->reg_wr_fail_hist = &hal_reg_wr_hist; in hal_reg_write_fail_history_init()
106 qdf_atomic_set(&hal->reg_wr_fail_hist->index, -1); in hal_reg_write_fail_history_init()
109 static void hal_reg_write_fail_history_init(struct hal_soc *hal) in hal_reg_write_fail_history_init() argument
123 static int hal_get_srng_ring_id(struct hal_soc *hal, int ring_type, in hal_get_srng_ring_id() argument
127 HAL_SRNG_CONFIG(hal, ring_type); in hal_get_srng_ring_id()
152 static struct hal_srng *hal_get_srng(struct hal_soc *hal, int ring_id) in hal_get_srng() argument
155 return &(hal->srng_list[ring_id]); in hal_get_srng()
195 void hal_set_one_target_reg_config(struct hal_soc *hal, in hal_set_one_target_reg_config() argument
202 hal->list_shadow_reg_config[i].target_register = in hal_set_one_target_reg_config()
204 hal->num_generic_shadow_regs_configured++; in hal_set_one_target_reg_config()
214 struct hal_soc *hal = (struct hal_soc *)hal_soc; in hal_set_shadow_regs() local
217 &hal->hw_srng_table[WBM2SW_RELEASE]; in hal_set_shadow_regs()
226 hal_set_one_target_reg_config(hal, target_reg_offset, i); in hal_set_shadow_regs()
234 hal_set_one_target_reg_config(hal, target_reg_offset, i); in hal_set_shadow_regs()
242 struct hal_soc *hal = (struct hal_soc *)hal_soc; in hal_construct_shadow_regs() local
243 int shadow_config_index = hal->num_shadow_registers_configured; in hal_construct_shadow_regs()
245 int num_regs = hal->num_generic_shadow_regs_configured; in hal_construct_shadow_regs()
249 hal->shadow_config[shadow_config_index].addr = in hal_construct_shadow_regs()
250 hal->list_shadow_reg_config[i].target_register; in hal_construct_shadow_regs()
251 hal->list_shadow_reg_config[i].shadow_config_index = in hal_construct_shadow_regs()
253 hal->list_shadow_reg_config[i].va = in hal_construct_shadow_regs()
255 (uintptr_t)hal->dev_base_addr; in hal_construct_shadow_regs()
257 hal->shadow_config[shadow_config_index].addr, in hal_construct_shadow_regs()
261 hal->num_shadow_registers_configured++; in hal_construct_shadow_regs()
276 struct hal_soc *hal = (struct hal_soc *)hal_soc; in hal_set_one_shadow_config() local
277 struct hal_hw_srng_config *srng_config = &hal->hw_srng_table[ring_type]; in hal_set_one_shadow_config()
278 int shadow_config_index = hal->num_shadow_registers_configured; in hal_set_one_shadow_config()
285 hal->num_shadow_registers_configured++; in hal_set_one_shadow_config()
295 hal->shadow_config[shadow_config_index].addr = target_register; in hal_set_one_shadow_config()
315 struct hal_soc *hal = (struct hal_soc *)hal_soc; in hal_construct_srng_shadow_regs() local
319 &hal->hw_srng_table[ring_type]; in hal_construct_srng_shadow_regs()
359 struct hal_soc *hal = (struct hal_soc *)hal_soc; in hal_get_shadow_config() local
361 *shadow_config = &hal->shadow_config[0].v2; in hal_get_shadow_config()
363 hal->num_shadow_registers_configured; in hal_get_shadow_config()
372 struct hal_soc *hal = (struct hal_soc *)hal_soc; in hal_get_shadow_v3_config() local
374 *shadow_config = &hal->shadow_config[0].v3; in hal_get_shadow_v3_config()
376 hal->num_shadow_registers_configured; in hal_get_shadow_v3_config()
381 static bool hal_validate_shadow_register(struct hal_soc *hal, in hal_validate_shadow_register() argument
386 uint32_t *shadow_0_offset = SHADOW_REGISTER(0) + hal->dev_base_addr; in hal_validate_shadow_register()
388 ((char *)destination) - (char *)hal->dev_base_addr; in hal_validate_shadow_register()
396 } else if (hal->shadow_config[index].addr != destination_ba_offset) { in hal_validate_shadow_register()
400 hal->shadow_config[index].addr); in hal_validate_shadow_register()
406 hal->dev_base_addr, destination, shadow_address, in hal_validate_shadow_register()
412 static void hal_target_based_configure(struct hal_soc *hal) in hal_target_based_configure() argument
418 hal->init_phase = true; in hal_target_based_configure()
420 switch (hal->target_type) { in hal_target_based_configure()
423 hal->use_register_windowing = true; in hal_target_based_configure()
424 hal_qca6290_attach(hal); in hal_target_based_configure()
429 hal->use_register_windowing = true; in hal_target_based_configure()
430 hal_qca6390_attach(hal); in hal_target_based_configure()
435 hal->use_register_windowing = true; in hal_target_based_configure()
436 hal_qca6490_attach(hal); in hal_target_based_configure()
441 hal->use_register_windowing = true; in hal_target_based_configure()
442 hal->static_window_map = true; in hal_target_based_configure()
443 hal_qca6750_attach(hal); in hal_target_based_configure()
450 hal->use_register_windowing = true; in hal_target_based_configure()
451 hal_kiwi_attach(hal); in hal_target_based_configure()
456 hal_qca8074_attach(hal); in hal_target_based_configure()
462 hal_qca8074v2_attach(hal); in hal_target_based_configure()
468 hal_qca8074v2_attach(hal); in hal_target_based_configure()
474 hal_qca8074v2_attach(hal); in hal_target_based_configure()
480 hal->use_register_windowing = true; in hal_target_based_configure()
485 hal->static_window_map = true; in hal_target_based_configure()
486 hal_qcn6122_attach(hal); in hal_target_based_configure()
492 hal->use_register_windowing = true; in hal_target_based_configure()
497 hal->static_window_map = true; in hal_target_based_configure()
498 hal_qcn6122_attach(hal); in hal_target_based_configure()
504 hal->use_register_windowing = true; in hal_target_based_configure()
509 hal->static_window_map = true; in hal_target_based_configure()
510 hal_qcn6432_attach(hal); in hal_target_based_configure()
516 hal->use_register_windowing = true; in hal_target_based_configure()
521 hal->static_window_map = true; in hal_target_based_configure()
522 hal_qcn9000_attach(hal); in hal_target_based_configure()
527 hal->use_register_windowing = true; in hal_target_based_configure()
528 hal->static_window_map = true; in hal_target_based_configure()
529 hal_qca5018_attach(hal); in hal_target_based_configure()
534 hal->use_register_windowing = true; in hal_target_based_configure()
535 hal->static_window_map = true; in hal_target_based_configure()
536 if (hal->version == 1) in hal_target_based_configure()
539 hal_qcn9224v2_attach(hal); in hal_target_based_configure()
544 hal->use_register_windowing = true; in hal_target_based_configure()
545 hal->static_window_map = true; in hal_target_based_configure()
546 hal_qca5332_attach(hal); in hal_target_based_configure()
551 hal->use_register_windowing = true; in hal_target_based_configure()
552 hal->static_window_map = true; in hal_target_based_configure()
553 hal_wcn6450_attach(hal); in hal_target_based_configure()
579 static inline bool hal_is_reg_write_tput_level_high(struct hal_soc *hal) in hal_is_reg_write_tput_level_high() argument
581 int bw_level = hif_get_bandwidth_level(hal->hif_handle); in hal_is_reg_write_tput_level_high()
604 struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl; in hal_dump_reg_write_srng_stats() local
606 srng = hal_get_srng(hal, HAL_SRNG_SW2TCL1); in hal_dump_reg_write_srng_stats()
610 srng = hal_get_srng(hal, HAL_SRNG_WBM2SW0_RELEASE); in hal_dump_reg_write_srng_stats()
614 srng = hal_get_srng(hal, HAL_SRNG_REO2SW1); in hal_dump_reg_write_srng_stats()
618 srng = hal_get_srng(hal, HAL_SRNG_REO2SW2); in hal_dump_reg_write_srng_stats()
622 srng = hal_get_srng(hal, HAL_SRNG_REO2SW3); in hal_dump_reg_write_srng_stats()
630 struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl; in hal_dump_reg_write_stats() local
632 hist = hal->stats.wstats.sched_delay; in hal_dump_reg_write_stats()
634 qdf_atomic_read(&hal->stats.wstats.enqueues), in hal_dump_reg_write_stats()
635 hal->stats.wstats.dequeues, in hal_dump_reg_write_stats()
636 qdf_atomic_read(&hal->stats.wstats.coalesces), in hal_dump_reg_write_stats()
637 qdf_atomic_read(&hal->stats.wstats.direct), in hal_dump_reg_write_stats()
638 qdf_atomic_read(&hal->stats.wstats.q_depth), in hal_dump_reg_write_stats()
639 hal->stats.wstats.max_q_depth, in hal_dump_reg_write_stats()
658 struct hal_soc *hal = (struct hal_soc *)hal_soc; in hal_get_reg_write_pending_work() local
660 return qdf_atomic_read(&hal->active_work_cnt); in hal_get_reg_write_pending_work()
750 hal_process_reg_write_q_elem(struct hal_soc *hal, in hal_process_reg_write_q_elem() argument
763 hal_write_address_32_mb(hal, in hal_process_reg_write_q_elem()
769 hal_write_address_32_mb(hal, in hal_process_reg_write_q_elem()
792 static inline void hal_reg_write_fill_sched_delay_hist(struct hal_soc *hal, in hal_reg_write_fill_sched_delay_hist() argument
797 hist = hal->stats.wstats.sched_delay; in hal_reg_write_fill_sched_delay_hist()
824 struct hal_soc *hal; in hal_reg_write_need_delay() local
831 hal = srng->hal_soc; in hal_reg_write_need_delay()
832 if (qdf_unlikely(!hal)) in hal_reg_write_need_delay()
843 if (!hal_validate_shadow_register(hal, real_addr, elem->addr)) in hal_reg_write_need_delay()
856 hal->stats.wstats.dequeue_delay++; in hal_reg_write_need_delay()
878 struct hal_soc *hal = arg; in hal_reg_write_work() local
886 q_elem = &hal->reg_write_queue[(hal->read_idx)]; in hal_reg_write_work()
895 q_depth = qdf_atomic_read(&hal->stats.wstats.q_depth); in hal_reg_write_work()
896 if (q_depth > hal->stats.wstats.max_q_depth) in hal_reg_write_work()
897 hal->stats.wstats.max_q_depth = q_depth; in hal_reg_write_work()
899 if (hif_prevent_link_low_power_states(hal->hif_handle)) { in hal_reg_write_work()
900 hal->stats.wstats.prevent_l1_fails++; in hal_reg_write_work()
933 hal_reg_write_fill_sched_delay_hist(hal, delta_us); in hal_reg_write_work()
935 hal->stats.wstats.dequeues++; in hal_reg_write_work()
936 qdf_atomic_dec(&hal->stats.wstats.q_depth); in hal_reg_write_work()
942 write_val = hal_process_reg_write_q_elem(hal, q_elem); in hal_reg_write_work()
944 hal->read_idx, ring_id, addr, write_val, delta_us); in hal_reg_write_work()
952 hal->read_idx = (hal->read_idx + 1) & in hal_reg_write_work()
954 q_elem = &hal->reg_write_queue[(hal->read_idx)]; in hal_reg_write_work()
958 hif_allow_link_low_power_states(hal->hif_handle); in hal_reg_write_work()
969 qdf_atomic_sub(num_processed, &hal->active_work_cnt); in hal_reg_write_work()
972 static void __hal_flush_reg_write_work(struct hal_soc *hal) in __hal_flush_reg_write_work() argument
974 qdf_flush_work(&hal->reg_write_work); in __hal_flush_reg_write_work()
975 qdf_disable_work(&hal->reg_write_work); in __hal_flush_reg_write_work()
1071 static QDF_STATUS hal_delayed_reg_write_init(struct hal_soc *hal) in hal_delayed_reg_write_init() argument
1073 hal->reg_write_wq = in hal_delayed_reg_write_init()
1075 qdf_create_work(0, &hal->reg_write_work, hal_reg_write_work, hal); in hal_delayed_reg_write_init()
1076 hal->reg_write_queue = qdf_mem_malloc(HAL_REG_WRITE_QUEUE_LEN * in hal_delayed_reg_write_init()
1077 sizeof(*hal->reg_write_queue)); in hal_delayed_reg_write_init()
1078 if (!hal->reg_write_queue) { in hal_delayed_reg_write_init()
1085 hal->read_idx = 0; in hal_delayed_reg_write_init()
1086 qdf_atomic_set(&hal->write_idx, -1); in hal_delayed_reg_write_init()
1099 static void hal_delayed_reg_write_deinit(struct hal_soc *hal) in hal_delayed_reg_write_deinit() argument
1101 __hal_flush_reg_write_work(hal); in hal_delayed_reg_write_deinit()
1103 qdf_flush_workqueue(0, hal->reg_write_wq); in hal_delayed_reg_write_deinit()
1104 qdf_destroy_workqueue(0, hal->reg_write_wq); in hal_delayed_reg_write_deinit()
1105 qdf_mem_free(hal->reg_write_queue); in hal_delayed_reg_write_deinit()
1109 static inline QDF_STATUS hal_delayed_reg_write_init(struct hal_soc *hal) in hal_delayed_reg_write_init() argument
1114 static inline void hal_delayed_reg_write_deinit(struct hal_soc *hal) in hal_delayed_reg_write_deinit() argument
1220 inline void hal_free_srng_history(struct hal_soc *hal) in hal_free_srng_history() argument
1225 qdf_mem_free(hal->srng_list[i].reg_his_ctx); in hal_free_srng_history()
1228 inline bool hal_alloc_srng_history(struct hal_soc *hal) in hal_alloc_srng_history() argument
1233 hal->srng_list[i].reg_his_ctx = in hal_alloc_srng_history()
1235 if (!hal->srng_list[i].reg_his_ctx) { in hal_alloc_srng_history()
1237 hal_free_srng_history(hal); in hal_alloc_srng_history()
1245 inline void hal_free_srng_history(struct hal_soc *hal) in hal_free_srng_history() argument
1249 inline bool hal_alloc_srng_history(struct hal_soc *hal) in hal_alloc_srng_history() argument
1257 struct hal_soc *hal; in hal_attach() local
1260 hal = qdf_mem_common_alloc(sizeof(*hal)); in hal_attach()
1262 if (!hal) { in hal_attach()
1267 hal->hif_handle = hif_handle; in hal_attach()
1268 hal->dev_base_addr = hif_get_dev_ba(hif_handle); /* UMAC */ in hal_attach()
1269 hal->dev_base_addr_ce = hif_get_dev_ba_ce(hif_handle); /* CE */ in hal_attach()
1270 hal->dev_base_addr_cmem = hif_get_dev_ba_cmem(hif_handle); /* CMEM */ in hal_attach()
1271 hal->dev_base_addr_pmm = hif_get_dev_ba_pmm(hif_handle); /* PMM */ in hal_attach()
1272 hal->qdf_dev = qdf_dev; in hal_attach()
1273 hal->shadow_rdptr_mem_vaddr = (uint32_t *)qdf_mem_alloc_consistent( in hal_attach()
1274 qdf_dev, qdf_dev->dev, sizeof(*(hal->shadow_rdptr_mem_vaddr)) * in hal_attach()
1275 HAL_SRNG_ID_MAX, &(hal->shadow_rdptr_mem_paddr)); in hal_attach()
1276 if (!hal->shadow_rdptr_mem_paddr) { in hal_attach()
1282 qdf_mem_zero(hal->shadow_rdptr_mem_vaddr, in hal_attach()
1283 sizeof(*(hal->shadow_rdptr_mem_vaddr)) * HAL_SRNG_ID_MAX); in hal_attach()
1285 hal->shadow_wrptr_mem_vaddr = in hal_attach()
1287 sizeof(*(hal->shadow_wrptr_mem_vaddr)) * HAL_MAX_LMAC_RINGS, in hal_attach()
1288 &(hal->shadow_wrptr_mem_paddr)); in hal_attach()
1289 if (!hal->shadow_wrptr_mem_vaddr) { in hal_attach()
1295 qdf_mem_zero(hal->shadow_wrptr_mem_vaddr, in hal_attach()
1296 sizeof(*(hal->shadow_wrptr_mem_vaddr)) * HAL_MAX_LMAC_RINGS); in hal_attach()
1298 if (!hal_alloc_srng_history(hal)) in hal_attach()
1302 hal->srng_list[i].initialized = 0; in hal_attach()
1303 hal->srng_list[i].ring_id = i; in hal_attach()
1306 qdf_spinlock_create(&hal->register_access_lock); in hal_attach()
1307 hal->register_window = 0; in hal_attach()
1308 hal->target_type = hal_get_target_type(hal_soc_to_hal_soc_handle(hal)); in hal_attach()
1309 hal->version = hif_get_soc_version(hif_handle); in hal_attach()
1310 hal->ops = qdf_mem_malloc(sizeof(*hal->ops)); in hal_attach()
1312 if (!hal->ops) { in hal_attach()
1317 hal_target_based_configure(hal); in hal_attach()
1319 hal_reg_write_fail_history_init(hal); in hal_attach()
1321 qdf_minidump_log(hal, sizeof(*hal), "hal_soc"); in hal_attach()
1323 qdf_ssr_driver_dump_register_region("hal_soc", hal, sizeof(*hal)); in hal_attach()
1325 qdf_atomic_init(&hal->active_work_cnt); in hal_attach()
1326 if (hal_delayed_reg_write_init(hal) != QDF_STATUS_SUCCESS) { in hal_attach()
1333 return (void *)hal; in hal_attach()
1336 qdf_minidump_remove(hal, sizeof(*hal), "hal_soc"); in hal_attach()
1337 qdf_mem_free(hal->ops); in hal_attach()
1340 sizeof(*hal->shadow_wrptr_mem_vaddr) * in hal_attach()
1342 hal->shadow_wrptr_mem_vaddr, in hal_attach()
1343 hal->shadow_wrptr_mem_paddr, 0); in hal_attach()
1346 sizeof(*(hal->shadow_rdptr_mem_vaddr)) * HAL_SRNG_ID_MAX, in hal_attach()
1347 hal->shadow_rdptr_mem_vaddr, hal->shadow_rdptr_mem_paddr, 0); in hal_attach()
1349 qdf_mem_common_free(hal); in hal_attach()
1357 struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl; in hal_get_meminfo() local
1358 mem->dev_base_addr = (void *)hal->dev_base_addr; in hal_get_meminfo()
1359 mem->shadow_rdptr_mem_vaddr = (void *)hal->shadow_rdptr_mem_vaddr; in hal_get_meminfo()
1360 mem->shadow_wrptr_mem_vaddr = (void *)hal->shadow_wrptr_mem_vaddr; in hal_get_meminfo()
1361 mem->shadow_rdptr_mem_paddr = (void *)hal->shadow_rdptr_mem_paddr; in hal_get_meminfo()
1362 mem->shadow_wrptr_mem_paddr = (void *)hal->shadow_wrptr_mem_paddr; in hal_get_meminfo()
1363 hif_read_phy_mem_base((void *)hal->hif_handle, in hal_get_meminfo()
1372 struct hal_soc *hal = (struct hal_soc *)hal_soc; in hal_detach() local
1375 hal_delayed_reg_write_deinit(hal); in hal_detach()
1376 hal_reo_shared_qaddr_detach((hal_soc_handle_t)hal); in hal_detach()
1378 qdf_minidump_remove(hal, sizeof(*hal), "hal_soc"); in hal_detach()
1379 qdf_mem_free(hal->ops); in hal_detach()
1381 hal_free_srng_history(hal); in hal_detach()
1382 qdf_mem_free_consistent(hal->qdf_dev, hal->qdf_dev->dev, in hal_detach()
1383 sizeof(*(hal->shadow_rdptr_mem_vaddr)) * HAL_SRNG_ID_MAX, in hal_detach()
1384 hal->shadow_rdptr_mem_vaddr, hal->shadow_rdptr_mem_paddr, 0); in hal_detach()
1385 qdf_mem_free_consistent(hal->qdf_dev, hal->qdf_dev->dev, in hal_detach()
1386 sizeof(*(hal->shadow_wrptr_mem_vaddr)) * HAL_MAX_LMAC_RINGS, in hal_detach()
1387 hal->shadow_wrptr_mem_vaddr, hal->shadow_wrptr_mem_paddr, 0); in hal_detach()
1388 qdf_mem_common_free(hal); in hal_detach()
1405 static inline void hal_ce_dst_setup(struct hal_soc *hal, struct hal_srng *srng, in hal_ce_dst_setup() argument
1411 HAL_SRNG_CONFIG(hal, CE_DST); in hal_ce_dst_setup()
1418 reg_val = HAL_REG_READ(hal, reg_addr); in hal_ce_dst_setup()
1422 HAL_REG_WRITE(hal, reg_addr, reg_val); in hal_ce_dst_setup()
1429 reg_val = HAL_REG_READ(hal, reg_addr); in hal_ce_dst_setup()
1432 HAL_REG_WRITE(hal, reg_addr, reg_val); in hal_ce_dst_setup()
1433 reg_val = HAL_REG_READ(hal, reg_addr); in hal_ce_dst_setup()
1443 struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl; in hal_reo_read_write_ctrl_ix() local
1453 *ix0 = HAL_REG_READ(hal, reg_offset); in hal_reo_read_write_ctrl_ix()
1460 *ix1 = HAL_REG_READ(hal, reg_offset); in hal_reo_read_write_ctrl_ix()
1467 *ix2 = HAL_REG_READ(hal, reg_offset); in hal_reo_read_write_ctrl_ix()
1474 *ix3 = HAL_REG_READ(hal, reg_offset); in hal_reo_read_write_ctrl_ix()
1481 HAL_REG_WRITE_CONFIRM_RETRY(hal, reg_offset, in hal_reo_read_write_ctrl_ix()
1489 HAL_REG_WRITE_CONFIRM_RETRY(hal, reg_offset, in hal_reo_read_write_ctrl_ix()
1497 HAL_REG_WRITE_CONFIRM_RETRY(hal, reg_offset, in hal_reo_read_write_ctrl_ix()
1505 HAL_REG_WRITE_CONFIRM_RETRY(hal, reg_offset, in hal_reo_read_write_ctrl_ix()
1526 struct hal_soc *hal = (struct hal_soc *)hal_soc; in hal_srng_dst_init_hp() local
1532 reg_offset = SRNG_DST_ADDR(srng, HP) - hal->dev_base_addr; in hal_srng_dst_init_hp()
1534 hal, reg_offset, srng->u.dst_ring.cached_hp, true); in hal_srng_dst_init_hp()
1575 static inline void hal_srng_hw_init(struct hal_soc *hal, in hal_srng_hw_init() argument
1579 hal_srng_src_hw_init(hal, srng, idle_check, idx); in hal_srng_hw_init()
1581 hal_srng_dst_hw_init(hal, srng, idle_check, idx); in hal_srng_hw_init()
1588 struct hal_soc *hal = (struct hal_soc *)hal_soc; in hal_srng_is_near_full_irq_supported() local
1590 HAL_SRNG_CONFIG(hal, ring_type); in hal_srng_is_near_full_irq_supported()
1716 struct hal_soc *hal = (struct hal_soc *)hal_soc; in hal_srng_setup_idx() local
1717 hal_soc_handle_t hal_hdl = (hal_soc_handle_t)hal; in hal_srng_setup_idx()
1720 HAL_SRNG_CONFIG(hal, ring_type); in hal_srng_setup_idx()
1738 dev_base_addr = hal->dev_base_addr; in hal_srng_setup_idx()
1801 &(hal->shadow_rdptr_mem_vaddr[ring_id]); in hal_srng_setup_idx()
1807 sizeof(*hal->shadow_rdptr_mem_vaddr)); in hal_srng_setup_idx()
1814 &(hal->shadow_wrptr_mem_vaddr[ring_id - in hal_srng_setup_idx()
1820 sizeof(*hal->shadow_wrptr_mem_vaddr)); in hal_srng_setup_idx()
1824 hal_get_window_address(hal, in hal_srng_setup_idx()
1834 hal_validate_shadow_register(hal, in hal_srng_setup_idx()
1851 &(hal->shadow_rdptr_mem_vaddr[ring_id]); in hal_srng_setup_idx()
1855 sizeof(*hal->shadow_rdptr_mem_vaddr)); in hal_srng_setup_idx()
1862 &(hal->shadow_wrptr_mem_vaddr[ring_id - in hal_srng_setup_idx()
1868 sizeof(*hal->shadow_wrptr_mem_vaddr)); in hal_srng_setup_idx()
1872 hal_get_window_address(hal, in hal_srng_setup_idx()
1882 hal_validate_shadow_register(hal, in hal_srng_setup_idx()
1896 if (!hal->ops->hal_tx_ring_halt_get(hal_hdl)) { in hal_srng_setup_idx()
1901 hal_srng_hw_init(hal, srng, idle_check, idx); in hal_srng_setup_idx()
1906 hal->ops->hal_tx_ring_halt_set(hal_hdl); in hal_srng_setup_idx()
1909 } while (!(hal->ops->hal_tx_ring_halt_poll(hal_hdl))); in hal_srng_setup_idx()
1911 hal_srng_hw_init(hal, srng, idle_check, idx); in hal_srng_setup_idx()
1914 hal->ops->hal_tx_ring_halt_reset(hal_hdl); in hal_srng_setup_idx()
1920 hal_ce_dst_setup(hal, srng, ring_num); in hal_srng_setup_idx()
1976 struct hal_soc *hal = (struct hal_soc *)hal_soc; in hal_srng_get_entrysize() local
1978 HAL_SRNG_CONFIG(hal, ring_type); in hal_srng_get_entrysize()
1985 struct hal_soc *hal = (struct hal_soc *)hal_soc; in hal_srng_max_entries() local
1987 HAL_SRNG_CONFIG(hal, ring_type); in hal_srng_max_entries()
1995 struct hal_soc *hal = (struct hal_soc *)hal_soc; in hal_srng_get_dir() local
1997 HAL_SRNG_CONFIG(hal, ring_type); in hal_srng_get_dir()