119 #define HAL_REG_WRITE_FAIL_HIST_ADD(hal_soc, offset, wr_val, rd_val) \  argument
120 	hal_reg_wr_fail_history_add(hal_soc, offset, wr_val, rd_val)
122 void hal_reg_wr_fail_history_add(struct hal_soc *hal_soc,
135 #define HAL_REG_WRITE_FAIL_HIST_ADD(hal_soc, offset, wr_val, rd_val) \  argument
150 static inline QDF_STATUS hal_reg_write_result_check(struct hal_soc *hal_soc,  in hal_reg_write_result_check()  argument
156 	value = qdf_ioread32(hal_soc->dev_base_addr + offset);  in hal_reg_write_result_check()
158 		HAL_REG_WRITE_FAIL_HIST_ADD(hal_soc, offset, exp_val, value);  in hal_reg_write_result_check()
159 		HAL_STATS_INC(hal_soc, reg_write_fail, 1);  in hal_reg_write_result_check()
168 static inline void hal_lock_reg_access(struct hal_soc *soc,  in hal_lock_reg_access()
174 static inline void hal_unlock_reg_access(struct hal_soc *soc,  in hal_unlock_reg_access()
180 static inline void hal_lock_reg_access(struct hal_soc *soc,  in hal_lock_reg_access()
186 static inline void hal_unlock_reg_access(struct hal_soc *soc,  in hal_unlock_reg_access()
201 static inline void hal_select_window_confirm(struct hal_soc *hal_soc,  in hal_select_window_confirm()  argument
206 	qdf_iowrite32(hal_soc->dev_base_addr + WINDOW_REG_ADDRESS,  in hal_select_window_confirm()
208 	hal_soc->register_window = window;  in hal_select_window_confirm()
210 	hal_reg_write_result_check(hal_soc, WINDOW_REG_ADDRESS,  in hal_select_window_confirm()
214 static inline void hal_select_window_confirm(struct hal_soc *hal_soc,  in hal_select_window_confirm()  argument
219 	if (window != hal_soc->register_window) {  in hal_select_window_confirm()
220 		qdf_iowrite32(hal_soc->dev_base_addr + WINDOW_REG_ADDRESS,  in hal_select_window_confirm()
222 		hal_soc->register_window = window;  in hal_select_window_confirm()
225 					hal_soc,  in hal_select_window_confirm()
232 static inline qdf_iomem_t hal_get_window_address(struct hal_soc *hal_soc,  in hal_get_window_address()  argument
235 	return hal_soc->ops->hal_get_window_address(hal_soc, addr);  in hal_get_window_address()
241 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;  in hal_tx_init_cmd_credit_ring()  local
243 	return hal_soc->ops->hal_tx_init_cmd_credit_ring(hal_soc_hdl,  in hal_tx_init_cmd_credit_ring()
276 static inline void hal_write32_mb(struct hal_soc *hal_soc, uint32_t offset,  in hal_write32_mb()  argument
282 	if (!hal_soc->use_register_windowing ||  in hal_write32_mb()
284 		qdf_iowrite32(hal_soc->dev_base_addr + offset, value);  in hal_write32_mb()
285 	} else if (hal_soc->static_window_map) {  in hal_write32_mb()
286 		new_addr = hal_get_window_address(hal_soc,  in hal_write32_mb()
287 				hal_soc->dev_base_addr + offset);  in hal_write32_mb()
290 		hal_lock_reg_access(hal_soc, &flags);  in hal_write32_mb()
291 		hal_select_window_confirm(hal_soc, offset);  in hal_write32_mb()
292 		qdf_iowrite32(hal_soc->dev_base_addr + WINDOW_START +  in hal_write32_mb()
294 		hal_unlock_reg_access(hal_soc, &flags);  in hal_write32_mb()
306 static inline QDF_STATUS hal_write32_mb_confirm(struct hal_soc *hal_soc,  in hal_write32_mb_confirm()  argument
310 	hal_write32_mb(hal_soc, offset, value);  in hal_write32_mb_confirm()
316 static inline void hal_write32_mb(struct hal_soc *hal_soc, uint32_t offset,  in hal_write32_mb()  argument
324 					hal_soc->hif_handle))) {  in hal_write32_mb()
331 		qdf_iowrite32(hal_soc->dev_base_addr + offset, value);  in hal_write32_mb()
335 	init_phase = hal_soc->init_phase;  in hal_write32_mb()
338 	if (!init_phase && hif_force_wake_request(hal_soc->hif_handle)) {  in hal_write32_mb()
344 	if (!hal_soc->use_register_windowing ||  in hal_write32_mb()
346 		qdf_iowrite32(hal_soc->dev_base_addr + offset, value);  in hal_write32_mb()
347 	} else if (hal_soc->static_window_map) {  in hal_write32_mb()
349 					hal_soc,  in hal_write32_mb()
350 					hal_soc->dev_base_addr + offset);  in hal_write32_mb()
353 		hal_lock_reg_access(hal_soc, &flags);  in hal_write32_mb()
354 		hal_select_window_confirm(hal_soc, offset);  in hal_write32_mb()
355 		qdf_iowrite32(hal_soc->dev_base_addr + WINDOW_START +  in hal_write32_mb()
357 		hal_unlock_reg_access(hal_soc, &flags);  in hal_write32_mb()
360 	if (!init_phase && hif_force_wake_release(hal_soc->hif_handle)) {  in hal_write32_mb()
375 static inline QDF_STATUS hal_write32_mb_confirm(struct hal_soc *hal_soc,  in hal_write32_mb_confirm()  argument
385 					hal_soc->hif_handle))) {  in hal_write32_mb_confirm()
392 		qdf_iowrite32(hal_soc->dev_base_addr + offset, value);  in hal_write32_mb_confirm()
396 	init_phase = hal_soc->init_phase;  in hal_write32_mb_confirm()
399 	if (!init_phase && hif_force_wake_request(hal_soc->hif_handle)) {  in hal_write32_mb_confirm()
405 	if (!hal_soc->use_register_windowing ||  in hal_write32_mb_confirm()
407 		qdf_iowrite32(hal_soc->dev_base_addr + offset, value);  in hal_write32_mb_confirm()
408 		status = hal_reg_write_result_check(hal_soc, offset,  in hal_write32_mb_confirm()
410 	} else if (hal_soc->static_window_map) {  in hal_write32_mb_confirm()
412 					hal_soc,  in hal_write32_mb_confirm()
413 					hal_soc->dev_base_addr + offset);  in hal_write32_mb_confirm()
416 					hal_soc,  in hal_write32_mb_confirm()
417 					new_addr - hal_soc->dev_base_addr,  in hal_write32_mb_confirm()
420 		hal_lock_reg_access(hal_soc, &flags);  in hal_write32_mb_confirm()
421 		hal_select_window_confirm(hal_soc, offset);  in hal_write32_mb_confirm()
422 		qdf_iowrite32(hal_soc->dev_base_addr + WINDOW_START +  in hal_write32_mb_confirm()
426 				hal_soc,  in hal_write32_mb_confirm()
429 		hal_unlock_reg_access(hal_soc, &flags);  in hal_write32_mb_confirm()
432 	if (!init_phase && hif_force_wake_release(hal_soc->hif_handle)) {  in hal_write32_mb_confirm()
447 static inline void hal_write32_mb_cmem(struct hal_soc *hal_soc, uint32_t offset,  in hal_write32_mb_cmem()  argument
454 					hal_soc->hif_handle))) {  in hal_write32_mb_cmem()
459 	if (!hal_soc->use_register_windowing ||  in hal_write32_mb_cmem()
461 		qdf_iowrite32(hal_soc->dev_base_addr + offset, value);  in hal_write32_mb_cmem()
462 	} else if (hal_soc->static_window_map) {  in hal_write32_mb_cmem()
464 					hal_soc,  in hal_write32_mb_cmem()
465 					hal_soc->dev_base_addr + offset);  in hal_write32_mb_cmem()
468 		hal_lock_reg_access(hal_soc, &flags);  in hal_write32_mb_cmem()
469 		hal_select_window_confirm(hal_soc, offset);  in hal_write32_mb_cmem()
470 		qdf_iowrite32(hal_soc->dev_base_addr + WINDOW_START +  in hal_write32_mb_cmem()
472 		hal_unlock_reg_access(hal_soc, &flags);  in hal_write32_mb_cmem()
485 void hal_write_address_32_mb(struct hal_soc *hal_soc,  in hal_write_address_32_mb()  argument
490 	if (!hal_soc->use_register_windowing)  in hal_write_address_32_mb()
493 	offset = addr - hal_soc->dev_base_addr;  in hal_write_address_32_mb()
496 		hal_write32_mb_confirm(hal_soc, offset, value);  in hal_write_address_32_mb()
498 		hal_write32_mb(hal_soc, offset, value);  in hal_write_address_32_mb()
503 static inline void hal_srng_write_address_32_mb(struct hal_soc *hal_soc,  in hal_srng_write_address_32_mb()  argument
512 static inline void hal_srng_write_address_32_mb(struct hal_soc *hal_soc,  in hal_srng_write_address_32_mb()  argument
517 	hal_delayed_reg_write(hal_soc, srng, addr, value);  in hal_srng_write_address_32_mb()
520 static inline void hal_srng_write_address_32_mb(struct hal_soc *hal_soc,  in hal_srng_write_address_32_mb()  argument
525 	hal_write_address_32_mb(hal_soc, addr, value, false);  in hal_srng_write_address_32_mb()
553 static inline uint32_t hal_read32_mb(struct hal_soc *hal_soc, uint32_t offset)  in hal_read32_mb()  argument
559 	if (!hal_soc->use_register_windowing ||  in hal_read32_mb()
561 		return qdf_ioread32(hal_soc->dev_base_addr + offset);  in hal_read32_mb()
562 	} else if (hal_soc->static_window_map) {  in hal_read32_mb()
563 		new_addr = hal_get_window_address(hal_soc, hal_soc->dev_base_addr + offset);  in hal_read32_mb()
567 	hal_lock_reg_access(hal_soc, &flags);  in hal_read32_mb()
568 	hal_select_window_confirm(hal_soc, offset);  in hal_read32_mb()
569 	ret = qdf_ioread32(hal_soc->dev_base_addr + WINDOW_START +  in hal_read32_mb()
571 	hal_unlock_reg_access(hal_soc, &flags);  in hal_read32_mb()
579 uint32_t hal_read32_mb(struct hal_soc *hal_soc, uint32_t offset)  in hal_read32_mb()  argument
587 					hal_soc->hif_handle))) {  in hal_read32_mb()
594 		return qdf_ioread32(hal_soc->dev_base_addr + offset);  in hal_read32_mb()
596 	init_phase = hal_soc->init_phase;  in hal_read32_mb()
597 	if (!init_phase && hif_force_wake_request(hal_soc->hif_handle)) {  in hal_read32_mb()
603 	if (!hal_soc->use_register_windowing ||  in hal_read32_mb()
605 		ret = qdf_ioread32(hal_soc->dev_base_addr + offset);  in hal_read32_mb()
606 	} else if (hal_soc->static_window_map) {  in hal_read32_mb()
608 					hal_soc,  in hal_read32_mb()
609 					hal_soc->dev_base_addr + offset);  in hal_read32_mb()
612 		hal_lock_reg_access(hal_soc, &flags);  in hal_read32_mb()
613 		hal_select_window_confirm(hal_soc, offset);  in hal_read32_mb()
614 		ret = qdf_ioread32(hal_soc->dev_base_addr + WINDOW_START +  in hal_read32_mb()
616 		hal_unlock_reg_access(hal_soc, &flags);  in hal_read32_mb()
619 	if (!init_phase && hif_force_wake_release(hal_soc->hif_handle)) {  in hal_read32_mb()
629 uint32_t hal_read32_mb_cmem(struct hal_soc *hal_soc, uint32_t offset)  in hal_read32_mb_cmem()  argument
636 					hal_soc->hif_handle))) {  in hal_read32_mb_cmem()
641 	if (!hal_soc->use_register_windowing ||  in hal_read32_mb_cmem()
643 		ret = qdf_ioread32(hal_soc->dev_base_addr + offset);  in hal_read32_mb_cmem()
644 	} else if (hal_soc->static_window_map) {  in hal_read32_mb_cmem()
646 					hal_soc,  in hal_read32_mb_cmem()
647 					hal_soc->dev_base_addr + offset);  in hal_read32_mb_cmem()
650 		hal_lock_reg_access(hal_soc, &flags);  in hal_read32_mb_cmem()
651 		hal_select_window_confirm(hal_soc, offset);  in hal_read32_mb_cmem()
652 		ret = qdf_ioread32(hal_soc->dev_base_addr + WINDOW_START +  in hal_read32_mb_cmem()
654 		hal_unlock_reg_access(hal_soc, &flags);  in hal_read32_mb_cmem()
693 static inline QDF_STATUS hal_poll_dirty_bit_reg(struct hal_soc *hal,  in hal_poll_dirty_bit_reg()
740 	struct hal_soc *hal,  in hal_write32_mb_shadow_confirm()
795 static inline void hal_write32_mb_confirm_retry(struct hal_soc *hal_soc,  in hal_write32_mb_confirm_retry()  argument
802 	ret = hal_write32_mb_shadow_confirm(hal_soc, offset, value);  in hal_write32_mb_confirm_retry()
808 static inline void hal_write32_mb_confirm_retry(struct hal_soc *hal_soc,  in hal_write32_mb_confirm_retry()  argument
818 		ret = hal_write32_mb_confirm(hal_soc, offset, value);  in hal_write32_mb_confirm_retry()
823 		read_value = hal_read32_mb(hal_soc, offset);  in hal_write32_mb_confirm_retry()
863 int hal_get_reg_write_pending_work(void *hal_soc);
874 static inline int hal_get_reg_write_pending_work(void *hal_soc)  in hal_get_reg_write_pending_work()  argument
890 void hal_srng_check_and_update_hptp(struct hal_soc *hal_soc,
895 hal_srng_check_and_update_hptp(struct hal_soc *hal_soc, struct hal_srng *srng,  in hal_srng_check_and_update_hptp()  argument
909 uint32_t hal_read_address_32_mb(struct hal_soc *soc,  in hal_read_address_32_mb()
943 void hal_detach(void *hal_soc);
992 uint32_t hal_srng_get_entrysize(void *hal_soc, int ring_type);
1001 uint32_t hal_srng_max_entries(void *hal_soc, int ring_type);
1019 enum hal_srng_dir hal_srng_get_dir(void *hal_soc, int ring_type);
1106 QDF_STATUS hal_construct_srng_shadow_regs(void *hal_soc);
1124 QDF_STATUS hal_set_one_shadow_config(void *hal_soc, int ring_type,
1134 hal_get_shadow_config(void *hal_soc,
1146 hal_get_shadow_v3_config(void *hal_soc,
1161 bool hal_srng_is_near_full_irq_supported(hal_soc_handle_t hal_soc,
1165 bool hal_srng_is_near_full_irq_supported(hal_soc_handle_t hal_soc,  in hal_srng_is_near_full_irq_supported()  argument
1191 void *hal_srng_setup(void *hal_soc, int ring_type, int ring_num,
1215 void *hal_srng_setup_idx(void *hal_soc, int ring_type, int ring_num,
1314 void hal_srng_dst_init_hp(struct hal_soc_handle *hal_soc,
1325 void hal_srng_dst_update_hp_addr(struct hal_soc_handle *hal_soc,
1334 void hal_srng_cleanup(void *hal_soc, hal_ring_handle_t hal_ring_hdl,
1375 static inline void hal_mem_dma_cache_sync(struct hal_soc *soc, uint32_t *desc,  in hal_mem_dma_cache_sync()
1381 static inline void hal_mem_dma_cache_sync(struct hal_soc *soc, uint32_t *desc,  in hal_mem_dma_cache_sync()
1407 	struct hal_soc *soc = (struct hal_soc *)hal_soc_hdl;  in hal_srng_access_start_unlocked()
1453 	struct hal_soc *soc = (struct hal_soc *)hal_soc_hdl;  in hal_le_srng_access_start_unlocked_in_cpu_order()
1568 void *hal_srng_dst_get_next(void *hal_soc,  in hal_srng_dst_get_next()  argument
1589 		struct hal_soc *soc = (struct hal_soc *)hal_soc;  in hal_srng_dst_get_next()
1612 void *hal_srng_dst_get_next_cached(void *hal_soc,  in hal_srng_dst_get_next_cached()  argument
1647 void hal_srng_dst_dec_tp(void *hal_soc, hal_ring_handle_t hal_ring_hdl)  in hal_srng_dst_dec_tp()  argument
1771 #define hal_srng_dst_num_valid_nolock(hal_soc, hal_ring_hdl, sync_hw_ptr) \  argument
1772 		hal_srng_dst_num_valid(hal_soc, hal_ring_hdl, sync_hw_ptr)
1784 uint32_t hal_srng_dst_num_valid(void *hal_soc,  in hal_srng_dst_num_valid()  argument
1816 hal_srng_dst_inv_cached_descs(void *hal_soc,  in hal_srng_dst_inv_cached_descs()  argument
1873 hal_srng_dst_num_valid_locked(hal_soc_handle_t hal_soc,  in hal_srng_dst_num_valid_locked()  argument
1881 	num_valid = hal_srng_dst_num_valid(hal_soc, hal_ring_hdl, sync_hw_ptr);  in hal_srng_dst_num_valid_locked()
1894 void hal_srng_sync_cachedhp(void *hal_soc,  in hal_srng_sync_cachedhp()  argument
1919 hal_srng_src_reap_next(void *hal_soc, hal_ring_handle_t hal_ring_hdl)  in hal_srng_src_reap_next()  argument
1953 hal_srng_src_get_next_reaped(void *hal_soc, hal_ring_handle_t hal_ring_hdl)  in hal_srng_src_get_next_reaped()  argument
1981 hal_srng_src_pending_reap_next(void *hal_soc, hal_ring_handle_t hal_ring_hdl)  in hal_srng_src_pending_reap_next()  argument
2006 hal_srng_src_done_val(void *hal_soc, hal_ring_handle_t hal_ring_hdl)  in hal_srng_src_done_val()  argument
2056 void hal_get_sw_hptp(void *hal_soc, hal_ring_handle_t hal_ring_hdl,  in hal_get_sw_hptp()  argument
2079 void *hal_srng_src_get_next_consumed(void *hal_soc,  in hal_srng_src_get_next_consumed()  argument
2103 void *hal_srng_src_get_next_consumed(void *hal_soc,  in hal_srng_src_get_next_consumed()  argument
2120 void *hal_srng_src_peek(void *hal_soc, hal_ring_handle_t hal_ring_hdl)  in hal_srng_src_peek()  argument
2144 void *hal_srng_src_get_next(void *hal_soc,  in hal_srng_src_get_next()  argument
2305 hal_srng_src_num_avail(void *hal_soc,  in hal_srng_src_num_avail()  argument
2470 hal_srng_access_end_unlocked(void *hal_soc, hal_ring_handle_t hal_ring_hdl)  in hal_srng_access_end_unlocked()  argument
2488 			hal_srng_write_address_32_mb(hal_soc,  in hal_srng_access_end_unlocked()
2493 			hal_srng_write_address_32_mb(hal_soc,  in hal_srng_access_end_unlocked()
2519 hal_srng_access_end(void *hal_soc, hal_ring_handle_t hal_ring_hdl)  in hal_srng_access_end()  argument
2528 	hal_srng_access_end_unlocked(hal_soc, hal_ring_hdl);  in hal_srng_access_end()
2573 hal_srng_access_end_reap(void *hal_soc, hal_ring_handle_t hal_ring_hdl)  in hal_srng_access_end_reap()  argument
2623 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;  in hal_get_link_desc_size()  local
2625 	if (!hal_soc || !hal_soc->ops) {  in hal_get_link_desc_size()
2630 	if (!hal_soc->ops->hal_get_link_desc_size) {  in hal_get_link_desc_size()
2635 	return hal_soc->ops->hal_get_link_desc_size();  in hal_get_link_desc_size()
2758 hal_srng_get_hp_addr(void *hal_soc,  in hal_srng_get_hp_addr()  argument
2762 	struct hal_soc *hal = (struct hal_soc *)hal_soc;  in hal_srng_get_hp_addr()
2791 hal_srng_get_tp_addr(void *hal_soc, hal_ring_handle_t hal_ring_hdl)  in hal_srng_get_tp_addr()  argument
2794 	struct hal_soc *hal = (struct hal_soc *)hal_soc;  in hal_srng_get_tp_addr()
2863 static inline void hal_srng_dst_hw_init(struct hal_soc *hal,  in hal_srng_dst_hw_init()
2878 static inline void hal_srng_src_hw_init(struct hal_soc *hal,  in hal_srng_src_hw_init()
2892 void hal_srng_hw_disable(struct hal_soc *hal_soc, struct hal_srng *srng)  in hal_srng_hw_disable()  argument
2894 	if (hal_soc->ops->hal_srng_hw_disable)  in hal_srng_hw_disable()
2895 		hal_soc->ops->hal_srng_hw_disable(hal_soc, srng);  in hal_srng_hw_disable()
2914 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;  in hal_get_hw_hptp()  local
2916 	hal_soc->ops->hal_get_hw_hptp(hal_soc, hal_ring_hdl,  in hal_get_hw_hptp()
2929 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;  in hal_reo_setup()  local
2931 	hal_soc->ops->hal_reo_setup(hal_soc, reoparams, qref_reset);  in hal_reo_setup()
2939 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;  in hal_compute_reo_remap_ix2_ix3()  local
2941 	return hal_soc->ops->hal_compute_reo_remap_ix2_ix3(ring,  in hal_compute_reo_remap_ix2_ix3()
2948 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;  in hal_compute_reo_remap_ix0()  local
2950 	if (hal_soc->ops->hal_compute_reo_remap_ix0)  in hal_compute_reo_remap_ix0()
2951 		hal_soc->ops->hal_compute_reo_remap_ix0(remap0);  in hal_compute_reo_remap_ix0()
2975 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;  in hal_setup_link_idle_list()  local
2977 	hal_soc->ops->hal_setup_link_idle_list(hal_soc, scatter_bufs_base_paddr,  in hal_setup_link_idle_list()
3191 hal_rx_sw_mon_desc_info_get(struct hal_soc *hal,  in hal_rx_sw_mon_desc_info_get()
3208 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;  in hal_reo_set_err_dst_remap()  local
3210 	if (hal_soc->ops->hal_reo_set_err_dst_remap)  in hal_reo_set_err_dst_remap()
3211 		hal_soc->ops->hal_reo_set_err_dst_remap(hal_soc);  in hal_reo_set_err_dst_remap()
3225 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;  in hal_reo_enable_pn_in_dest()  local
3227 	if (hal_soc->ops->hal_reo_enable_pn_in_dest)  in hal_reo_enable_pn_in_dest()
3228 		return hal_soc->ops->hal_reo_enable_pn_in_dest(hal_soc);  in hal_reo_enable_pn_in_dest()
3245 void hal_set_one_target_reg_config(struct hal_soc *hal,
3258 QDF_STATUS hal_set_shadow_regs(void *hal_soc);
3267 QDF_STATUS hal_construct_shadow_regs(void *hal_soc);
3271 	struct hal_soc *hal,  in hal_set_one_target_reg_config()
3277 static inline QDF_STATUS hal_set_shadow_regs(void *hal_soc)  in hal_set_shadow_regs()  argument
3282 static inline QDF_STATUS hal_construct_shadow_regs(void *hal_soc)  in hal_construct_shadow_regs()  argument
3350 void hal_update_ring_util(void *hal_soc, hal_ring_handle_t hal_ring_hdl,  in hal_update_ring_util()  argument
3356 	hal_get_sw_hptp(hal_soc, hal_ring_hdl, &tailp, &headp);  in hal_update_ring_util()
3387 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;  in hal_cmem_write()  local
3389 	if (hal_soc->ops->hal_cmem_write)  in hal_cmem_write()
3390 		hal_soc->ops->hal_cmem_write(hal_soc_hdl, offset, value);  in hal_cmem_write()
3398 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;  in hal_dmac_cmn_src_rxbuf_ring_get()  local
3400 	return hal_soc->dmac_cmn_src_rxbuf_ring;  in hal_dmac_cmn_src_rxbuf_ring_get()
3625 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;  in hal_srng_set_msi_irq_config()  local
3627 	return hal_soc->ops->hal_srng_set_msi_config(hal_ring_hdl, ring_params);  in hal_srng_set_msi_irq_config()