3542 	uint32_t reg_addr, reg_val = 0;  in hal_tx_vdev_mismatch_routing_set_generic_be()  local
3545 	reg_addr = HWIO_TCL_R0_CMN_CONFIG_ADDR(MAC_TCL_REG_REG_BASE);  in hal_tx_vdev_mismatch_routing_set_generic_be()
3547 	val = HAL_REG_READ(hal_soc, reg_addr);  in hal_tx_vdev_mismatch_routing_set_generic_be()
3556 	HAL_REG_WRITE(hal_soc, reg_addr, reg_val);  in hal_tx_vdev_mismatch_routing_set_generic_be()
3583 	uint32_t reg_addr, reg_val = 0;  in hal_tx_mcast_mlo_reinject_routing_set_generic_be()  local
3586 	reg_addr = HWIO_TCL_R0_CMN_CONFIG_ADDR(MAC_TCL_REG_REG_BASE);  in hal_tx_mcast_mlo_reinject_routing_set_generic_be()
3587 	val = HAL_REG_READ(hal_soc, reg_addr);  in hal_tx_mcast_mlo_reinject_routing_set_generic_be()
3595 	HAL_REG_WRITE(hal_soc, reg_addr, reg_val);  in hal_tx_mcast_mlo_reinject_routing_set_generic_be()
3812 	uint32_t reg_addr, reg_val = 0;  in hal_cookie_conversion_reg_cfg_generic_be()  local
3816 	reg_addr = HWIO_REO_R0_SW_COOKIE_CFG0_ADDR(REO_REG_REG_BASE);  in hal_cookie_conversion_reg_cfg_generic_be()
3818 	HAL_REG_WRITE(soc, reg_addr, reg_val);  in hal_cookie_conversion_reg_cfg_generic_be()
3820 	reg_addr = HWIO_REO_R0_SW_COOKIE_CFG1_ADDR(REO_REG_REG_BASE);  in hal_cookie_conversion_reg_cfg_generic_be()
3840 	HAL_REG_WRITE(soc, reg_addr, reg_val);  in hal_cookie_conversion_reg_cfg_generic_be()
3843 	reg_addr = HWIO_WBM_R0_SW_COOKIE_CFG0_ADDR(WBM_REG_REG_BASE);  in hal_cookie_conversion_reg_cfg_generic_be()
3845 	HAL_REG_WRITE(soc, reg_addr, reg_val);  in hal_cookie_conversion_reg_cfg_generic_be()
3847 	reg_addr = HWIO_WBM_R0_SW_COOKIE_CFG1_ADDR(WBM_REG_REG_BASE);  in hal_cookie_conversion_reg_cfg_generic_be()
3861 	HAL_REG_WRITE(soc, reg_addr, reg_val);  in hal_cookie_conversion_reg_cfg_generic_be()
3866 	reg_addr = HWIO_WBM_R0_SW_COOKIE_CONVERT_CFG_ADDR(WBM_REG_REG_BASE);  in hal_cookie_conversion_reg_cfg_generic_be()
3895 	HAL_REG_WRITE(soc, reg_addr, reg_val);  in hal_cookie_conversion_reg_cfg_generic_be()
3898 	reg_addr = HWIO_WBM_R0_WBM_CFG_2_ADDR(WBM_REG_REG_BASE);  in hal_cookie_conversion_reg_cfg_generic_be()
3916 	HAL_REG_WRITE(soc, reg_addr, reg_val);  in hal_cookie_conversion_reg_cfg_generic_be()
3924 	reg_addr = HWIO_WBM_R0_MISC_CONTROL_ADDR(WBM_REG_REG_BASE);  in hal_cookie_conversion_reg_cfg_generic_be()
3925 	reg_val = HAL_REG_READ(soc, reg_addr);  in hal_cookie_conversion_reg_cfg_generic_be()
3929 	HAL_REG_WRITE(soc, reg_addr, reg_val);  in hal_cookie_conversion_reg_cfg_generic_be()
3993 	uint32_t reg_addr, reg_val = 0;  in hal_tx_populate_bank_register_be()  local
3995 	reg_addr = HWIO_TCL_R0_SW_CONFIG_BANK_n_ADDR(MAC_TCL_REG_REG_BASE,  in hal_tx_populate_bank_register_be()
4022 	HAL_REG_WRITE(hal_soc, reg_addr, reg_val);  in hal_tx_populate_bank_register_be()
4031 	uint32_t reg_addr, reg_val = 0;  in hal_tx_populate_bank_register_be()  local
4033 	reg_addr = HWIO_TCL_R0_SW_CONFIG_BANK_n_ADDR(MAC_TCL_REG_REG_BASE,  in hal_tx_populate_bank_register_be()
4060 	HAL_REG_WRITE(hal_soc, reg_addr, reg_val);  in hal_tx_populate_bank_register_be()
4085 	uint32_t reg_addr, reg_val = 0;  in hal_tx_vdev_mcast_ctrl_set_be()  local
4091 	reg_addr =  in hal_tx_vdev_mcast_ctrl_set_be()
4095 	val = HAL_REG_READ(hal_soc, reg_addr);  in hal_tx_vdev_mcast_ctrl_set_be()
4105 	HAL_REG_WRITE(hal_soc, reg_addr, reg_val);  in hal_tx_vdev_mcast_ctrl_set_be()