Lines Matching refs:n
95 …_MXI_TRACKING_TRANSACTION_TIME_n_ADDR(base,n) ((base) + 0X1A… argument
96 …_MXI_TRACKING_TRANSACTION_TIME_n_PHYS(base,n) ((base) + 0X1A… argument
97 …_MXI_R0_MXI_TRACKING_TRANSACTION_TIME_n_OFFS(n) (0X1A4 … argument
103 #define HWIO_UMAC_MXI_R0_MXI_TRACKING_TRANSACTION_TIME_n_INI(base,n) \ argument
104 …in_dword_masked(HWIO_UMAC_MXI_R0_MXI_TRACKING_TRANSACTION_TIME_n_ADDR(base,n), HWIO_UMAC_MXI_R0_MX…
105 #define HWIO_UMAC_MXI_R0_MXI_TRACKING_TRANSACTION_TIME_n_INMI(base,n,mask) \ argument
106 in_dword_masked(HWIO_UMAC_MXI_R0_MXI_TRACKING_TRANSACTION_TIME_n_ADDR(base,n), mask)
130 …XI_R1_MXI_TESTBUS_CAPTURE_n_ADDR(base,n) ((base) +… argument
131 …XI_R1_MXI_TESTBUS_CAPTURE_n_PHYS(base,n) ((base) +… argument
132 …_UMAC_MXI_R1_MXI_TESTBUS_CAPTURE_n_OFFS(n) (0… argument
138 #define HWIO_UMAC_MXI_R1_MXI_TESTBUS_CAPTURE_n_INI(base,n) \ argument
139 …in_dword_masked(HWIO_UMAC_MXI_R1_MXI_TESTBUS_CAPTURE_n_ADDR(base,n), HWIO_UMAC_MXI_R1_MXI_TESTBUS_…
140 #define HWIO_UMAC_MXI_R1_MXI_TESTBUS_CAPTURE_n_INMI(base,n,mask) \ argument
141 in_dword_masked(HWIO_UMAC_MXI_R1_MXI_TESTBUS_CAPTURE_n_ADDR(base,n), mask)
469 …R1_TESTBUS_CAPTURE_n_ADDR(base,n) ((b… argument
470 …R1_TESTBUS_CAPTURE_n_PHYS(base,n) ((b… argument
471 …IO_WBM_R1_TESTBUS_CAPTURE_n_OFFS(n) … argument
477 #define HWIO_WBM_R1_TESTBUS_CAPTURE_n_INI(base,n) \ argument
478 … in_dword_masked(HWIO_WBM_R1_TESTBUS_CAPTURE_n_ADDR(base,n), HWIO_WBM_R1_TESTBUS_CAPTURE_n_RMSK)
479 #define HWIO_WBM_R1_TESTBUS_CAPTURE_n_INMI(base,n,mask) \ argument
480 in_dword_masked(HWIO_WBM_R1_TESTBUS_CAPTURE_n_ADDR(base,n), mask)
1205 …TESTBUS_CAPTURE_n_ADDR(base,n) … argument
1206 …TESTBUS_CAPTURE_n_PHYS(base,n) … argument
1207 …REO_R1_TESTBUS_CAPTURE_n_OFFS(n) … argument
1213 #define HWIO_REO_R1_TESTBUS_CAPTURE_n_INI(base,n) \ argument
1214 … in_dword_masked(HWIO_REO_R1_TESTBUS_CAPTURE_n_ADDR(base,n), HWIO_REO_R1_TESTBUS_CAPTURE_n_RMSK)
1215 #define HWIO_REO_R1_TESTBUS_CAPTURE_n_INMI(base,n,mask) \ argument
1216 in_dword_masked(HWIO_REO_R1_TESTBUS_CAPTURE_n_ADDR(base,n), mask)
1687 …R1_TESTBUS_CAPTURE_n_ADDR(base,n) ((… argument
1688 …R1_TESTBUS_CAPTURE_n_PHYS(base,n) ((… argument
1689 …IO_TQM_R1_TESTBUS_CAPTURE_n_OFFS(n) … argument
1695 #define HWIO_TQM_R1_TESTBUS_CAPTURE_n_INI(base,n) \ argument
1696 … in_dword_masked(HWIO_TQM_R1_TESTBUS_CAPTURE_n_ADDR(base,n), HWIO_TQM_R1_TESTBUS_CAPTURE_n_RMSK)
1697 #define HWIO_TQM_R1_TESTBUS_CAPTURE_n_INMI(base,n,mask) \ argument
1698 in_dword_masked(HWIO_TQM_R1_TESTBUS_CAPTURE_n_ADDR(base,n), mask)
1919 …R1_RETENTION_SPARE_REGISTER_n_ADDR(base,n) ((base) + 0X… argument
1920 …R1_RETENTION_SPARE_REGISTER_n_PHYS(base,n) ((base) + 0X… argument
1921 …_UMCMN_R1_RETENTION_SPARE_REGISTER_n_OFFS(n) (0X20… argument
1927 #define HWIO_UMCMN_R1_RETENTION_SPARE_REGISTER_n_INI(base,n) \ argument
1928 …in_dword_masked(HWIO_UMCMN_R1_RETENTION_SPARE_REGISTER_n_ADDR(base,n), HWIO_UMCMN_R1_RETENTION_SPA…
1929 #define HWIO_UMCMN_R1_RETENTION_SPARE_REGISTER_n_INMI(base,n,mask) \ argument
1930 in_dword_masked(HWIO_UMCMN_R1_RETENTION_SPARE_REGISTER_n_ADDR(base,n), mask)
1931 #define HWIO_UMCMN_R1_RETENTION_SPARE_REGISTER_n_OUTI(base,n,val) \ argument
1932 out_dword(HWIO_UMCMN_R1_RETENTION_SPARE_REGISTER_n_ADDR(base,n),val)
1933 #define HWIO_UMCMN_R1_RETENTION_SPARE_REGISTER_n_OUTMI(base,n,mask,val) \ argument
1934 …MCMN_R1_RETENTION_SPARE_REGISTER_n_ADDR(base,n),mask,val,HWIO_UMCMN_R1_RETENTION_SPARE_REGISTER_n_…
1944 …TCL_R0_SW_CONFIG_BANK_n_ADDR(base,n) ((b… argument
1958 …TCL_R0_DSCP_TID_MAP_n_ADDR(base,n) ((b… argument
2233 …L_R1_TESTBUS_CAPTURE_n_ADDR(base,n) ((bas… argument
2234 …L_R1_TESTBUS_CAPTURE_n_PHYS(base,n) ((bas… argument
2235 …HWIO_TCL_R1_TESTBUS_CAPTURE_n_OFFS(n) … argument
2241 #define HWIO_TCL_R1_TESTBUS_CAPTURE_n_INI(base,n) \ argument
2242 … in_dword_masked(HWIO_TCL_R1_TESTBUS_CAPTURE_n_ADDR(base,n), HWIO_TCL_R1_TESTBUS_CAPTURE_n_RMSK)
2243 #define HWIO_TCL_R1_TESTBUS_CAPTURE_n_INMI(base,n,mask) \ argument
2244 in_dword_masked(HWIO_TCL_R1_TESTBUS_CAPTURE_n_ADDR(base,n), mask)