Lines Matching defs:x

46 #define HWIO_REO_R0_GENERAL_ENABLE_ADDR(x)                           (x+0x00000000)  argument
47 #define HWIO_REO_R0_GENERAL_ENABLE_PHYS(x) (x+0x00000000) argument
50 #define HWIO_REO_R0_GENERAL_ENABLE_IN(x) \ argument
52 #define HWIO_REO_R0_GENERAL_ENABLE_INM(x, mask) \ argument
54 #define HWIO_REO_R0_GENERAL_ENABLE_OUT(x, val) \ argument
56 #define HWIO_REO_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
134 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x) (x+0x00000004) argument
135 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_PHYS(x) (x+0x00000004) argument
138 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_IN(x) \ argument
140 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_INM(x, mask) \ argument
142 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUT(x, val) \ argument
144 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUTM(x, mask, val) \ argument
177 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x) (x+0x00000008) argument
178 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_PHYS(x) (x+0x00000008) argument
181 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_IN(x) \ argument
183 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_INM(x, mask) \ argument
185 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUT(x, val) \ argument
187 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUTM(x, mask, val) \ argument
220 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x) (x+0x0000000c) argument
221 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_PHYS(x) (x+0x0000000c) argument
224 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_IN(x) \ argument
226 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_INM(x, mask) \ argument
228 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUT(x, val) \ argument
230 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUTM(x, mask, val) \ argument
263 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x) (x+0x00000010) argument
264 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_PHYS(x) (x+0x00000010) argument
267 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_IN(x) \ argument
269 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_INM(x, mask) \ argument
271 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUT(x, val) \ argument
273 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUTM(x, mask, val) \ argument
306 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x) (x+0x00000014) argument
307 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_PHYS(x) (x+0x00000014) argument
310 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_IN(x) \ argument
312 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_INM(x, mask) \ argument
314 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUT(x, val) \ argument
316 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUTM(x, mask, val) \ argument
349 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x) (x+0x00000018) argument
350 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_PHYS(x) (x+0x00000018) argument
353 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_IN(x) \ argument
355 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_INM(x, mask) \ argument
357 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUT(x, val) \ argument
359 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUTM(x, mask, val) \ argument
392 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x) (x+0x0000001c) argument
393 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_PHYS(x) (x+0x0000001c) argument
396 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_IN(x) \ argument
398 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_INM(x, mask) \ argument
400 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUT(x, val) \ argument
402 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUTM(x, mask, val) \ argument
435 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x) (x+0x00000020) argument
436 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_PHYS(x) (x+0x00000020) argument
439 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_IN(x) \ argument
441 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_INM(x, mask) \ argument
443 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUT(x, val) \ argument
445 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUTM(x, mask, val) \ argument
478 #define HWIO_REO_R0_TIMESTAMP_ADDR(x) (x+0x00000024) argument
479 #define HWIO_REO_R0_TIMESTAMP_PHYS(x) (x+0x00000024) argument
482 #define HWIO_REO_R0_TIMESTAMP_IN(x) \ argument
484 #define HWIO_REO_R0_TIMESTAMP_INM(x, mask) \ argument
486 #define HWIO_REO_R0_TIMESTAMP_OUT(x, val) \ argument
488 #define HWIO_REO_R0_TIMESTAMP_OUTM(x, mask, val) \ argument
500 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x) (x+0x00000028) argument
501 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_PHYS(x) (x+0x00000028) argument
504 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_IN(x) \ argument
506 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_INM(x, mask) \ argument
508 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUT(x, val) \ argument
510 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUTM(x, mask, val) \ argument
543 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x) (x+0x0000002c) argument
544 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_PHYS(x) (x+0x0000002c) argument
547 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_IN(x) \ argument
549 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_INM(x, mask) \ argument
551 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUT(x, val) \ argument
553 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUTM(x, mask, val) \ argument
586 #define HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x) (x+0x00000030) argument
587 #define HWIO_REO_R0_IDLE_REQ_CTRL_PHYS(x) (x+0x00000030) argument
590 #define HWIO_REO_R0_IDLE_REQ_CTRL_IN(x) \ argument
592 #define HWIO_REO_R0_IDLE_REQ_CTRL_INM(x, mask) \ argument
594 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUT(x, val) \ argument
596 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUTM(x, mask, val) \ argument
611 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x) (x+0x00000034) argument
612 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_PHYS(x) (x+0x00000034) argument
615 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_IN(x) \ argument
617 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_INM(x, mask) \ argument
619 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUT(x, val) \ argument
621 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUTM(x, mask, val) \ argument
633 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x) (x+0x00000038) argument
634 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_PHYS(x) (x+0x00000038) argument
637 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_IN(x) \ argument
639 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_INM(x, mask) \ argument
641 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUT(x, val) \ argument
643 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUTM(x, mask, val) \ argument
658 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x) (x+0x0000003c) argument
659 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_PHYS(x) (x+0x0000003c) argument
662 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_IN(x) \ argument
664 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_INM(x, mask) \ argument
666 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUT(x, val) \ argument
668 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUTM(x, mask, val) \ argument
680 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x) (x+0x00000040) argument
681 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_PHYS(x) (x+0x00000040) argument
684 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_IN(x) \ argument
686 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_INM(x, mask) \ argument
688 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUT(x, val) \ argument
690 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUTM(x, mask, val) \ argument
705 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x) (x+0x00000044) argument
706 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_PHYS(x) (x+0x00000044) argument
709 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_IN(x) \ argument
711 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_INM(x, mask) \ argument
713 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUT(x, val) \ argument
715 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUTM(x, mask, val) \ argument
757 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000050) argument
758 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000050) argument
761 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_IN(x) \ argument
763 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_INM(x, mask) \ argument
765 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUT(x, val) \ argument
767 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
779 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000054) argument
780 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000054) argument
783 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_IN(x) \ argument
785 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_INM(x, mask) \ argument
787 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUT(x, val) \ argument
789 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
801 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000064) argument
802 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000064) argument
805 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
807 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
809 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
811 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
829 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000068) argument
830 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000068) argument
833 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
835 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
837 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
839 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
851 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x0000006c) argument
852 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x0000006c) argument
855 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_IN(x) \ argument
857 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
859 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
861 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
879 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000070) argument
880 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000070) argument
883 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
885 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
887 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
889 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
901 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000074) argument
902 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000074) argument
905 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
907 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
909 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
911 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
923 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000078) argument
924 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000078) argument
927 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
929 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
931 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
933 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
948 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000007c) argument
949 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000007c) argument
952 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_IN(x) \ argument
954 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
956 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
958 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
970 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000080) argument
971 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000080) argument
974 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_IN(x) \ argument
976 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
978 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
980 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
995 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x) (x+0x00000084) argument
996 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_PHYS(x) (x+0x00000084) argument
999 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_IN(x) \ argument
1001 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_INM(x, mask) \ argument
1003 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUT(x, val) \ argument
1005 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
1017 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000088) argument
1018 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000088) argument
1021 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_IN(x) \ argument
1023 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
1025 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
1027 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1039 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_ADDR(x) (x+0x0000008c) argument
1040 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_PHYS(x) (x+0x0000008c) argument
1043 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_IN(x) \ argument
1045 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_INM(x, mask) \ argument
1047 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_OUT(x, val) \ argument
1049 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1061 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_ADDR(x) (x+0x00000090) argument
1062 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_PHYS(x) (x+0x00000090) argument
1065 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_IN(x) \ argument
1067 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_INM(x, mask) \ argument
1069 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_OUT(x, val) \ argument
1071 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1086 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_ADDR(x) (x+0x00000094) argument
1087 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_PHYS(x) (x+0x00000094) argument
1090 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_IN(x) \ argument
1092 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_INM(x, mask) \ argument
1094 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_OUT(x, val) \ argument
1096 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_OUTM(x, mask, val) \ argument
1108 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_ADDR(x) (x+0x00000098) argument
1109 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_PHYS(x) (x+0x00000098) argument
1112 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_IN(x) \ argument
1114 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_INM(x, mask) \ argument
1116 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_OUT(x, val) \ argument
1118 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_OUTM(x, mask, val) \ argument
1133 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_ADDR(x) (x+0x0000009c) argument
1134 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_PHYS(x) (x+0x0000009c) argument
1137 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_IN(x) \ argument
1139 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_INM(x, mask) \ argument
1141 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_OUT(x, val) \ argument
1143 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_OUTM(x, mask, val) \ argument
1185 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_ADDR(x) (x+0x000000a8) argument
1186 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_PHYS(x) (x+0x000000a8) argument
1189 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_IN(x) \ argument
1191 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_INM(x, mask) \ argument
1193 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_OUT(x, val) \ argument
1195 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
1207 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_ADDR(x) (x+0x000000ac) argument
1208 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_PHYS(x) (x+0x000000ac) argument
1211 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_IN(x) \ argument
1213 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_INM(x, mask) \ argument
1215 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_OUT(x, val) \ argument
1217 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
1229 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x000000bc) argument
1230 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x000000bc) argument
1233 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
1235 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
1237 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
1239 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
1257 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x000000c0) argument
1258 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x000000c0) argument
1261 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
1263 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
1265 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
1267 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
1279 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x000000c4) argument
1280 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x000000c4) argument
1283 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_IN(x) \ argument
1285 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
1287 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
1289 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
1307 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x000000c8) argument
1308 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x000000c8) argument
1311 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
1313 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
1315 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
1317 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
1329 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x000000cc) argument
1330 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x000000cc) argument
1333 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
1335 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
1337 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
1339 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
1351 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x000000d0) argument
1352 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x000000d0) argument
1355 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
1357 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
1359 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
1361 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
1376 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000000d4) argument
1377 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000000d4) argument
1380 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_IN(x) \ argument
1382 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
1384 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
1386 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
1398 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000000d8) argument
1399 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000000d8) argument
1402 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_IN(x) \ argument
1404 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
1406 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
1408 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
1423 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_ADDR(x) (x+0x000000dc) argument
1424 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_PHYS(x) (x+0x000000dc) argument
1427 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_IN(x) \ argument
1429 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_INM(x, mask) \ argument
1431 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_OUT(x, val) \ argument
1433 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
1445 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000000e0) argument
1446 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000000e0) argument
1449 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_IN(x) \ argument
1451 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
1453 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
1455 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1467 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_ADDR(x) (x+0x000000e4) argument
1468 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_PHYS(x) (x+0x000000e4) argument
1471 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_IN(x) \ argument
1473 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_INM(x, mask) \ argument
1475 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_OUT(x, val) \ argument
1477 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1489 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_ADDR(x) (x+0x000000e8) argument
1490 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_PHYS(x) (x+0x000000e8) argument
1493 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_IN(x) \ argument
1495 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_INM(x, mask) \ argument
1497 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_OUT(x, val) \ argument
1499 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1514 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_ADDR(x) (x+0x000000ec) argument
1515 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_PHYS(x) (x+0x000000ec) argument
1518 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_IN(x) \ argument
1520 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_INM(x, mask) \ argument
1522 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_OUT(x, val) \ argument
1524 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_OUTM(x, mask, val) \ argument
1536 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_ADDR(x) (x+0x000000f0) argument
1537 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_PHYS(x) (x+0x000000f0) argument
1540 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_IN(x) \ argument
1542 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_INM(x, mask) \ argument
1544 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_OUT(x, val) \ argument
1546 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_OUTM(x, mask, val) \ argument
1561 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_ADDR(x) (x+0x000000f4) argument
1562 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_PHYS(x) (x+0x000000f4) argument
1565 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_IN(x) \ argument
1567 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_INM(x, mask) \ argument
1569 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_OUT(x, val) \ argument
1571 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_OUTM(x, mask, val) \ argument
1613 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000100) argument
1614 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000100) argument
1617 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_IN(x) \ argument
1619 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_INM(x, mask) \ argument
1621 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_OUT(x, val) \ argument
1623 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
1635 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000104) argument
1636 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000104) argument
1639 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_IN(x) \ argument
1641 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_INM(x, mask) \ argument
1643 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_OUT(x, val) \ argument
1645 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
1657 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000114) argument
1658 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000114) argument
1661 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
1663 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
1665 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
1667 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
1685 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000118) argument
1686 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000118) argument
1689 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
1691 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
1693 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
1695 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
1707 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x0000011c) argument
1708 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x0000011c) argument
1711 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_IN(x) \ argument
1713 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
1715 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
1717 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
1735 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000120) argument
1736 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000120) argument
1739 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
1741 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
1743 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
1745 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
1757 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000124) argument
1758 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000124) argument
1761 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
1763 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
1765 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
1767 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
1779 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000128) argument
1780 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000128) argument
1783 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
1785 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
1787 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
1789 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
1804 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000012c) argument
1805 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000012c) argument
1808 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_IN(x) \ argument
1810 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
1812 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
1814 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
1826 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000130) argument
1827 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000130) argument
1830 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_IN(x) \ argument
1832 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
1834 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
1836 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
1851 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_ADDR(x) (x+0x00000134) argument
1852 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_PHYS(x) (x+0x00000134) argument
1855 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_IN(x) \ argument
1857 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_INM(x, mask) \ argument
1859 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_OUT(x, val) \ argument
1861 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
1873 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000138) argument
1874 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000138) argument
1877 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_IN(x) \ argument
1879 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
1881 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
1883 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1895 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x) (x+0x0000013c) argument
1896 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_PHYS(x) (x+0x0000013c) argument
1899 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_IN(x) \ argument
1901 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_INM(x, mask) \ argument
1903 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUT(x, val) \ argument
1905 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1917 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x) (x+0x00000140) argument
1918 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_PHYS(x) (x+0x00000140) argument
1921 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_IN(x) \ argument
1923 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_INM(x, mask) \ argument
1925 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUT(x, val) \ argument
1927 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1942 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x) (x+0x00000144) argument
1943 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_PHYS(x) (x+0x00000144) argument
1946 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_IN(x) \ argument
1948 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_INM(x, mask) \ argument
1950 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUT(x, val) \ argument
1952 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUTM(x, mask, val) \ argument
1964 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x) (x+0x00000148) argument
1965 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_PHYS(x) (x+0x00000148) argument
1968 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_IN(x) \ argument
1970 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_INM(x, mask) \ argument
1972 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUT(x, val) \ argument
1974 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUTM(x, mask, val) \ argument
1989 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x) (x+0x0000014c) argument
1990 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_PHYS(x) (x+0x0000014c) argument
1993 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_IN(x) \ argument
1995 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_INM(x, mask) \ argument
1997 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUT(x, val) \ argument
1999 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUTM(x, mask, val) \ argument
2041 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000158) argument
2042 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000158) argument
2045 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_IN(x) \ argument
2047 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_INM(x, mask) \ argument
2049 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUT(x, val) \ argument
2051 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
2063 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x) (x+0x0000015c) argument
2064 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_PHYS(x) (x+0x0000015c) argument
2067 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_IN(x) \ argument
2069 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_INM(x, mask) \ argument
2071 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUT(x, val) \ argument
2073 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
2085 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x0000016c) argument
2086 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x0000016c) argument
2089 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
2091 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
2093 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
2095 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
2113 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000170) argument
2114 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000170) argument
2117 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
2119 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
2121 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
2123 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
2135 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x00000174) argument
2136 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x00000174) argument
2139 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_IN(x) \ argument
2141 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
2143 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
2145 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
2163 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000178) argument
2164 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000178) argument
2167 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
2169 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
2171 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
2173 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
2185 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x0000017c) argument
2186 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x0000017c) argument
2189 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
2191 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
2193 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
2195 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
2207 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000180) argument
2208 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000180) argument
2211 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
2213 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
2215 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
2217 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
2232 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000190) argument
2233 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000190) argument
2236 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_IN(x) \ argument
2238 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
2240 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
2242 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
2254 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x) (x+0x00000194) argument
2255 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_PHYS(x) (x+0x00000194) argument
2258 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_IN(x) \ argument
2260 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_INM(x, mask) \ argument
2262 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUT(x, val) \ argument
2264 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUTM(x, mask, val) \ argument
2276 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x) (x+0x00000198) argument
2277 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_PHYS(x) (x+0x00000198) argument
2280 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_IN(x) \ argument
2282 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_INM(x, mask) \ argument
2284 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUT(x, val) \ argument
2286 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUTM(x, mask, val) \ argument
2301 #define HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x) (x+0x0000019c) argument
2302 #define HWIO_REO_R0_REO_CMD_RING_ID_PHYS(x) (x+0x0000019c) argument
2305 #define HWIO_REO_R0_REO_CMD_RING_ID_IN(x) \ argument
2307 #define HWIO_REO_R0_REO_CMD_RING_ID_INM(x, mask) \ argument
2309 #define HWIO_REO_R0_REO_CMD_RING_ID_OUT(x, val) \ argument
2311 #define HWIO_REO_R0_REO_CMD_RING_ID_OUTM(x, mask, val) \ argument
2323 #define HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x) (x+0x000001a0) argument
2324 #define HWIO_REO_R0_REO_CMD_RING_STATUS_PHYS(x) (x+0x000001a0) argument
2327 #define HWIO_REO_R0_REO_CMD_RING_STATUS_IN(x) \ argument
2329 #define HWIO_REO_R0_REO_CMD_RING_STATUS_INM(x, mask) \ argument
2331 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUT(x, val) \ argument
2333 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUTM(x, mask, val) \ argument
2348 #define HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x) (x+0x000001a4) argument
2349 #define HWIO_REO_R0_REO_CMD_RING_MISC_PHYS(x) (x+0x000001a4) argument
2352 #define HWIO_REO_R0_REO_CMD_RING_MISC_IN(x) \ argument
2354 #define HWIO_REO_R0_REO_CMD_RING_MISC_INM(x, mask) \ argument
2356 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUT(x, val) \ argument
2358 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUTM(x, mask, val) \ argument
2400 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x) (x+0x000001b0) argument
2401 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_PHYS(x) (x+0x000001b0) argument
2404 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_IN(x) \ argument
2406 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_INM(x, mask) \ argument
2408 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUT(x, val) \ argument
2410 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
2422 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x) (x+0x000001b4) argument
2423 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_PHYS(x) (x+0x000001b4) argument
2426 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_IN(x) \ argument
2428 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_INM(x, mask) \ argument
2430 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUT(x, val) \ argument
2432 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
2444 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x000001c4) argument
2445 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x000001c4) argument
2448 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
2450 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
2452 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
2454 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
2472 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x000001c8) argument
2473 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x000001c8) argument
2476 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
2478 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
2480 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
2482 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
2494 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x000001cc) argument
2495 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x000001cc) argument
2498 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_IN(x) \ argument
2500 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
2502 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
2504 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
2522 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x000001d0) argument
2523 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x000001d0) argument
2526 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
2528 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
2530 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
2532 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
2544 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x000001d4) argument
2545 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x000001d4) argument
2548 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
2550 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
2552 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
2554 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
2566 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x000001d8) argument
2567 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x000001d8) argument
2570 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
2572 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
2574 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
2576 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
2591 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000001dc) argument
2592 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000001dc) argument
2595 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_IN(x) \ argument
2597 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
2599 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
2601 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
2613 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000001e0) argument
2614 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000001e0) argument
2617 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_IN(x) \ argument
2619 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
2621 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
2623 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
2638 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x) (x+0x000001e4) argument
2639 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_PHYS(x) (x+0x000001e4) argument
2642 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_IN(x) \ argument
2644 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_INM(x, mask) \ argument
2646 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUT(x, val) \ argument
2648 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
2660 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000001e8) argument
2661 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000001e8) argument
2664 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_IN(x) \ argument
2666 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
2668 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
2670 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
2682 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x) (x+0x000001ec) argument
2683 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_PHYS(x) (x+0x000001ec) argument
2686 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_IN(x) \ argument
2688 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_INM(x, mask) \ argument
2690 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUT(x, val) \ argument
2692 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUTM(x, mask, val) \ argument
2704 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x) (x+0x000001f0) argument
2705 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_PHYS(x) (x+0x000001f0) argument
2708 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_IN(x) \ argument
2710 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_INM(x, mask) \ argument
2712 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUT(x, val) \ argument
2714 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUTM(x, mask, val) \ argument
2729 #define HWIO_REO_R0_SW2REO_RING_ID_ADDR(x) (x+0x000001f4) argument
2730 #define HWIO_REO_R0_SW2REO_RING_ID_PHYS(x) (x+0x000001f4) argument
2733 #define HWIO_REO_R0_SW2REO_RING_ID_IN(x) \ argument
2735 #define HWIO_REO_R0_SW2REO_RING_ID_INM(x, mask) \ argument
2737 #define HWIO_REO_R0_SW2REO_RING_ID_OUT(x, val) \ argument
2739 #define HWIO_REO_R0_SW2REO_RING_ID_OUTM(x, mask, val) \ argument
2751 #define HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x) (x+0x000001f8) argument
2752 #define HWIO_REO_R0_SW2REO_RING_STATUS_PHYS(x) (x+0x000001f8) argument
2755 #define HWIO_REO_R0_SW2REO_RING_STATUS_IN(x) \ argument
2757 #define HWIO_REO_R0_SW2REO_RING_STATUS_INM(x, mask) \ argument
2759 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUT(x, val) \ argument
2761 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUTM(x, mask, val) \ argument
2776 #define HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x) (x+0x000001fc) argument
2777 #define HWIO_REO_R0_SW2REO_RING_MISC_PHYS(x) (x+0x000001fc) argument
2780 #define HWIO_REO_R0_SW2REO_RING_MISC_IN(x) \ argument
2782 #define HWIO_REO_R0_SW2REO_RING_MISC_INM(x, mask) \ argument
2784 #define HWIO_REO_R0_SW2REO_RING_MISC_OUT(x, val) \ argument
2786 #define HWIO_REO_R0_SW2REO_RING_MISC_OUTM(x, mask, val) \ argument
2828 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000208) argument
2829 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000208) argument
2832 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_IN(x) \ argument
2834 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_INM(x, mask) \ argument
2836 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUT(x, val) \ argument
2838 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
2850 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x) (x+0x0000020c) argument
2851 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_PHYS(x) (x+0x0000020c) argument
2854 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_IN(x) \ argument
2856 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_INM(x, mask) \ argument
2858 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUT(x, val) \ argument
2860 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
2872 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x0000021c) argument
2873 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x0000021c) argument
2876 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ argument
2878 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
2880 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ argument
2882 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
2900 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000220) argument
2901 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000220) argument
2904 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ argument
2906 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
2908 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ argument
2910 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
2922 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x00000224) argument
2923 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x00000224) argument
2926 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_IN(x) \ argument
2928 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
2930 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUT(x, val) \ argument
2932 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
2950 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000228) argument
2951 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000228) argument
2954 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ argument
2956 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
2958 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ argument
2960 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
2972 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x0000022c) argument
2973 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x0000022c) argument
2976 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ argument
2978 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
2980 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ argument
2982 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
2994 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000230) argument
2995 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000230) argument
2998 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ argument
3000 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
3002 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ argument
3004 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
3019 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000234) argument
3020 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000234) argument
3023 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_IN(x) \ argument
3025 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
3027 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
3029 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3041 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000238) argument
3042 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000238) argument
3045 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_IN(x) \ argument
3047 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
3049 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
3051 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
3066 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x) (x+0x0000023c) argument
3067 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_PHYS(x) (x+0x0000023c) argument
3070 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_IN(x) \ argument
3072 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_INM(x, mask) \ argument
3074 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUT(x, val) \ argument
3076 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
3088 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000240) argument
3089 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000240) argument
3092 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_IN(x) \ argument
3094 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
3096 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
3098 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3110 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x) (x+0x00000244) argument
3111 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_PHYS(x) (x+0x00000244) argument
3114 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_IN(x) \ argument
3116 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_INM(x, mask) \ argument
3118 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUT(x, val) \ argument
3120 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3132 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x) (x+0x00000248) argument
3133 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_PHYS(x) (x+0x00000248) argument
3136 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_IN(x) \ argument
3138 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_INM(x, mask) \ argument
3140 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUT(x, val) \ argument
3142 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3157 #define HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x) (x+0x0000024c) argument
3158 #define HWIO_REO_R0_REO2SW1_RING_ID_PHYS(x) (x+0x0000024c) argument
3161 #define HWIO_REO_R0_REO2SW1_RING_ID_IN(x) \ argument
3163 #define HWIO_REO_R0_REO2SW1_RING_ID_INM(x, mask) \ argument
3165 #define HWIO_REO_R0_REO2SW1_RING_ID_OUT(x, val) \ argument
3167 #define HWIO_REO_R0_REO2SW1_RING_ID_OUTM(x, mask, val) \ argument
3182 #define HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x) (x+0x00000250) argument
3183 #define HWIO_REO_R0_REO2SW1_RING_STATUS_PHYS(x) (x+0x00000250) argument
3186 #define HWIO_REO_R0_REO2SW1_RING_STATUS_IN(x) \ argument
3188 #define HWIO_REO_R0_REO2SW1_RING_STATUS_INM(x, mask) \ argument
3190 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUT(x, val) \ argument
3192 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUTM(x, mask, val) \ argument
3207 #define HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x) (x+0x00000254) argument
3208 #define HWIO_REO_R0_REO2SW1_RING_MISC_PHYS(x) (x+0x00000254) argument
3211 #define HWIO_REO_R0_REO2SW1_RING_MISC_IN(x) \ argument
3213 #define HWIO_REO_R0_REO2SW1_RING_MISC_INM(x, mask) \ argument
3215 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUT(x, val) \ argument
3217 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUTM(x, mask, val) \ argument
3262 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000258) argument
3263 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000258) argument
3266 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_IN(x) \ argument
3268 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_INM(x, mask) \ argument
3270 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUT(x, val) \ argument
3272 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
3284 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x) (x+0x0000025c) argument
3285 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_PHYS(x) (x+0x0000025c) argument
3288 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_IN(x) \ argument
3290 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_INM(x, mask) \ argument
3292 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUT(x, val) \ argument
3294 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
3306 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000268) argument
3307 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000268) argument
3310 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_IN(x) \ argument
3312 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
3314 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
3316 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
3334 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x0000026c) argument
3335 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x0000026c) argument
3338 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_IN(x) \ argument
3340 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
3342 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
3344 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
3362 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000270) argument
3363 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000270) argument
3366 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
3368 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
3370 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
3372 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
3384 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000028c) argument
3385 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000028c) argument
3388 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_IN(x) \ argument
3390 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
3392 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
3394 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3406 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000290) argument
3407 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000290) argument
3410 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_IN(x) \ argument
3412 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
3414 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
3416 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
3431 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x) (x+0x00000294) argument
3432 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_PHYS(x) (x+0x00000294) argument
3435 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_IN(x) \ argument
3437 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_INM(x, mask) \ argument
3439 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUT(x, val) \ argument
3441 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
3453 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000298) argument
3454 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000298) argument
3457 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_IN(x) \ argument
3459 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
3461 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
3463 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3475 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x) (x+0x0000029c) argument
3476 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_PHYS(x) (x+0x0000029c) argument
3479 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_IN(x) \ argument
3481 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_INM(x, mask) \ argument
3483 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUT(x, val) \ argument
3485 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3497 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x) (x+0x000002a0) argument
3498 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_PHYS(x) (x+0x000002a0) argument
3501 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_IN(x) \ argument
3503 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_INM(x, mask) \ argument
3505 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUT(x, val) \ argument
3507 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3522 #define HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x) (x+0x000002a4) argument
3523 #define HWIO_REO_R0_REO2SW2_RING_ID_PHYS(x) (x+0x000002a4) argument
3526 #define HWIO_REO_R0_REO2SW2_RING_ID_IN(x) \ argument
3528 #define HWIO_REO_R0_REO2SW2_RING_ID_INM(x, mask) \ argument
3530 #define HWIO_REO_R0_REO2SW2_RING_ID_OUT(x, val) \ argument
3532 #define HWIO_REO_R0_REO2SW2_RING_ID_OUTM(x, mask, val) \ argument
3547 #define HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x) (x+0x000002a8) argument
3548 #define HWIO_REO_R0_REO2SW2_RING_STATUS_PHYS(x) (x+0x000002a8) argument
3551 #define HWIO_REO_R0_REO2SW2_RING_STATUS_IN(x) \ argument
3553 #define HWIO_REO_R0_REO2SW2_RING_STATUS_INM(x, mask) \ argument
3555 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUT(x, val) \ argument
3557 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUTM(x, mask, val) \ argument
3572 #define HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x) (x+0x000002ac) argument
3573 #define HWIO_REO_R0_REO2SW2_RING_MISC_PHYS(x) (x+0x000002ac) argument
3576 #define HWIO_REO_R0_REO2SW2_RING_MISC_IN(x) \ argument
3578 #define HWIO_REO_R0_REO2SW2_RING_MISC_INM(x, mask) \ argument
3580 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUT(x, val) \ argument
3582 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUTM(x, mask, val) \ argument
3627 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x) (x+0x000002b0) argument
3628 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_PHYS(x) (x+0x000002b0) argument
3631 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_IN(x) \ argument
3633 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_INM(x, mask) \ argument
3635 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUT(x, val) \ argument
3637 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
3649 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x) (x+0x000002b4) argument
3650 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_PHYS(x) (x+0x000002b4) argument
3653 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_IN(x) \ argument
3655 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_INM(x, mask) \ argument
3657 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUT(x, val) \ argument
3659 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
3671 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x000002c0) argument
3672 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x000002c0) argument
3675 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_IN(x) \ argument
3677 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
3679 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
3681 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
3699 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x000002c4) argument
3700 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x000002c4) argument
3703 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_IN(x) \ argument
3705 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
3707 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
3709 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
3727 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x000002c8) argument
3728 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x000002c8) argument
3731 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
3733 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
3735 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
3737 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
3749 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000002e4) argument
3750 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000002e4) argument
3753 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_IN(x) \ argument
3755 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
3757 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
3759 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3771 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000002e8) argument
3772 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000002e8) argument
3775 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_IN(x) \ argument
3777 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
3779 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
3781 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
3796 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x) (x+0x000002ec) argument
3797 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_PHYS(x) (x+0x000002ec) argument
3800 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_IN(x) \ argument
3802 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_INM(x, mask) \ argument
3804 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUT(x, val) \ argument
3806 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
3818 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000002f0) argument
3819 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000002f0) argument
3822 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_IN(x) \ argument
3824 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
3826 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
3828 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3840 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x) (x+0x000002f4) argument
3841 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_PHYS(x) (x+0x000002f4) argument
3844 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_IN(x) \ argument
3846 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_INM(x, mask) \ argument
3848 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUT(x, val) \ argument
3850 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3862 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x) (x+0x000002f8) argument
3863 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_PHYS(x) (x+0x000002f8) argument
3866 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_IN(x) \ argument
3868 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_INM(x, mask) \ argument
3870 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUT(x, val) \ argument
3872 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3887 #define HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x) (x+0x000002fc) argument
3888 #define HWIO_REO_R0_REO2SW3_RING_ID_PHYS(x) (x+0x000002fc) argument
3891 #define HWIO_REO_R0_REO2SW3_RING_ID_IN(x) \ argument
3893 #define HWIO_REO_R0_REO2SW3_RING_ID_INM(x, mask) \ argument
3895 #define HWIO_REO_R0_REO2SW3_RING_ID_OUT(x, val) \ argument
3897 #define HWIO_REO_R0_REO2SW3_RING_ID_OUTM(x, mask, val) \ argument
3912 #define HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x) (x+0x00000300) argument
3913 #define HWIO_REO_R0_REO2SW3_RING_STATUS_PHYS(x) (x+0x00000300) argument
3916 #define HWIO_REO_R0_REO2SW3_RING_STATUS_IN(x) \ argument
3918 #define HWIO_REO_R0_REO2SW3_RING_STATUS_INM(x, mask) \ argument
3920 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUT(x, val) \ argument
3922 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUTM(x, mask, val) \ argument
3937 #define HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x) (x+0x00000304) argument
3938 #define HWIO_REO_R0_REO2SW3_RING_MISC_PHYS(x) (x+0x00000304) argument
3941 #define HWIO_REO_R0_REO2SW3_RING_MISC_IN(x) \ argument
3943 #define HWIO_REO_R0_REO2SW3_RING_MISC_INM(x, mask) \ argument
3945 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUT(x, val) \ argument
3947 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUTM(x, mask, val) \ argument
3992 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000308) argument
3993 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000308) argument
3996 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_IN(x) \ argument
3998 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_INM(x, mask) \ argument
4000 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUT(x, val) \ argument
4002 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4014 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x) (x+0x0000030c) argument
4015 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_PHYS(x) (x+0x0000030c) argument
4018 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_IN(x) \ argument
4020 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_INM(x, mask) \ argument
4022 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUT(x, val) \ argument
4024 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4036 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000318) argument
4037 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000318) argument
4040 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_IN(x) \ argument
4042 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
4044 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
4046 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4064 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x0000031c) argument
4065 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x0000031c) argument
4068 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_IN(x) \ argument
4070 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
4072 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
4074 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4092 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000320) argument
4093 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000320) argument
4096 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
4098 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
4100 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
4102 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
4114 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000033c) argument
4115 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000033c) argument
4118 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_IN(x) \ argument
4120 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
4122 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
4124 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
4136 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000340) argument
4137 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000340) argument
4140 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_IN(x) \ argument
4142 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
4144 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
4146 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4161 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x) (x+0x00000344) argument
4162 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_PHYS(x) (x+0x00000344) argument
4165 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_IN(x) \ argument
4167 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_INM(x, mask) \ argument
4169 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUT(x, val) \ argument
4171 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4183 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000348) argument
4184 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000348) argument
4187 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_IN(x) \ argument
4189 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
4191 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
4193 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
4205 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x) (x+0x0000034c) argument
4206 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_PHYS(x) (x+0x0000034c) argument
4209 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_IN(x) \ argument
4211 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_INM(x, mask) \ argument
4213 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUT(x, val) \ argument
4215 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUTM(x, mask, val) \ argument
4227 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x) (x+0x00000350) argument
4228 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_PHYS(x) (x+0x00000350) argument
4231 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_IN(x) \ argument
4233 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_INM(x, mask) \ argument
4235 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUT(x, val) \ argument
4237 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUTM(x, mask, val) \ argument
4252 #define HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x) (x+0x00000354) argument
4253 #define HWIO_REO_R0_REO2SW4_RING_ID_PHYS(x) (x+0x00000354) argument
4256 #define HWIO_REO_R0_REO2SW4_RING_ID_IN(x) \ argument
4258 #define HWIO_REO_R0_REO2SW4_RING_ID_INM(x, mask) \ argument
4260 #define HWIO_REO_R0_REO2SW4_RING_ID_OUT(x, val) \ argument
4262 #define HWIO_REO_R0_REO2SW4_RING_ID_OUTM(x, mask, val) \ argument
4277 #define HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x) (x+0x00000358) argument
4278 #define HWIO_REO_R0_REO2SW4_RING_STATUS_PHYS(x) (x+0x00000358) argument
4281 #define HWIO_REO_R0_REO2SW4_RING_STATUS_IN(x) \ argument
4283 #define HWIO_REO_R0_REO2SW4_RING_STATUS_INM(x, mask) \ argument
4285 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUT(x, val) \ argument
4287 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUTM(x, mask, val) \ argument
4302 #define HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x) (x+0x0000035c) argument
4303 #define HWIO_REO_R0_REO2SW4_RING_MISC_PHYS(x) (x+0x0000035c) argument
4306 #define HWIO_REO_R0_REO2SW4_RING_MISC_IN(x) \ argument
4308 #define HWIO_REO_R0_REO2SW4_RING_MISC_INM(x, mask) \ argument
4310 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUT(x, val) \ argument
4312 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUTM(x, mask, val) \ argument
4357 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000360) argument
4358 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000360) argument
4361 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_IN(x) \ argument
4363 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_INM(x, mask) \ argument
4365 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUT(x, val) \ argument
4367 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4379 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000364) argument
4380 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000364) argument
4383 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_IN(x) \ argument
4385 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_INM(x, mask) \ argument
4387 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUT(x, val) \ argument
4389 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4401 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000370) argument
4402 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000370) argument
4405 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_IN(x) \ argument
4407 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
4409 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
4411 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4429 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000374) argument
4430 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000374) argument
4433 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_IN(x) \ argument
4435 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
4437 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
4439 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4457 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000378) argument
4458 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000378) argument
4461 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
4463 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
4465 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
4467 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
4479 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000394) argument
4480 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000394) argument
4483 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_IN(x) \ argument
4485 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
4487 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
4489 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
4501 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000398) argument
4502 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000398) argument
4505 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_IN(x) \ argument
4507 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
4509 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
4511 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4526 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x) (x+0x0000039c) argument
4527 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_PHYS(x) (x+0x0000039c) argument
4530 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_IN(x) \ argument
4532 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_INM(x, mask) \ argument
4534 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUT(x, val) \ argument
4536 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4548 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000003a0) argument
4549 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000003a0) argument
4552 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_IN(x) \ argument
4554 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
4556 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
4558 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
4570 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_ADDR(x) (x+0x000003a4) argument
4571 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_PHYS(x) (x+0x000003a4) argument
4574 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_IN(x) \ argument
4576 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_INM(x, mask) \ argument
4578 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_OUT(x, val) \ argument
4580 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_OUTM(x, mask, val) \ argument
4592 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_ADDR(x) (x+0x000003a8) argument
4593 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_PHYS(x) (x+0x000003a8) argument
4596 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_IN(x) \ argument
4598 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_INM(x, mask) \ argument
4600 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_OUT(x, val) \ argument
4602 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_OUTM(x, mask, val) \ argument
4617 #define HWIO_REO_R0_REO2SW5_RING_ID_ADDR(x) (x+0x000003ac) argument
4618 #define HWIO_REO_R0_REO2SW5_RING_ID_PHYS(x) (x+0x000003ac) argument
4621 #define HWIO_REO_R0_REO2SW5_RING_ID_IN(x) \ argument
4623 #define HWIO_REO_R0_REO2SW5_RING_ID_INM(x, mask) \ argument
4625 #define HWIO_REO_R0_REO2SW5_RING_ID_OUT(x, val) \ argument
4627 #define HWIO_REO_R0_REO2SW5_RING_ID_OUTM(x, mask, val) \ argument
4642 #define HWIO_REO_R0_REO2SW5_RING_STATUS_ADDR(x) (x+0x000003b0) argument
4643 #define HWIO_REO_R0_REO2SW5_RING_STATUS_PHYS(x) (x+0x000003b0) argument
4646 #define HWIO_REO_R0_REO2SW5_RING_STATUS_IN(x) \ argument
4648 #define HWIO_REO_R0_REO2SW5_RING_STATUS_INM(x, mask) \ argument
4650 #define HWIO_REO_R0_REO2SW5_RING_STATUS_OUT(x, val) \ argument
4652 #define HWIO_REO_R0_REO2SW5_RING_STATUS_OUTM(x, mask, val) \ argument
4667 #define HWIO_REO_R0_REO2SW5_RING_MISC_ADDR(x) (x+0x000003b4) argument
4668 #define HWIO_REO_R0_REO2SW5_RING_MISC_PHYS(x) (x+0x000003b4) argument
4671 #define HWIO_REO_R0_REO2SW5_RING_MISC_IN(x) \ argument
4673 #define HWIO_REO_R0_REO2SW5_RING_MISC_INM(x, mask) \ argument
4675 #define HWIO_REO_R0_REO2SW5_RING_MISC_OUT(x, val) \ argument
4677 #define HWIO_REO_R0_REO2SW5_RING_MISC_OUTM(x, mask, val) \ argument
4722 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_ADDR(x) (x+0x000003b8) argument
4723 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_PHYS(x) (x+0x000003b8) argument
4726 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_IN(x) \ argument
4728 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_INM(x, mask) \ argument
4730 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_OUT(x, val) \ argument
4732 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4744 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_ADDR(x) (x+0x000003bc) argument
4745 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_PHYS(x) (x+0x000003bc) argument
4748 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_IN(x) \ argument
4750 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_INM(x, mask) \ argument
4752 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_OUT(x, val) \ argument
4754 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4766 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x000003c8) argument
4767 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x000003c8) argument
4770 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_IN(x) \ argument
4772 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
4774 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
4776 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4794 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x000003cc) argument
4795 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x000003cc) argument
4798 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_IN(x) \ argument
4800 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
4802 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
4804 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4822 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x000003d0) argument
4823 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x000003d0) argument
4826 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
4828 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
4830 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
4832 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
4844 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000003ec) argument
4845 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000003ec) argument
4848 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_IN(x) \ argument
4850 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
4852 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
4854 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
4866 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000003f0) argument
4867 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000003f0) argument
4870 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_IN(x) \ argument
4872 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
4874 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
4876 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4891 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_ADDR(x) (x+0x000003f4) argument
4892 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_PHYS(x) (x+0x000003f4) argument
4895 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_IN(x) \ argument
4897 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_INM(x, mask) \ argument
4899 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_OUT(x, val) \ argument
4901 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4913 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000003f8) argument
4914 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000003f8) argument
4917 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_IN(x) \ argument
4919 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
4921 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
4923 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
4935 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_ADDR(x) (x+0x000003fc) argument
4936 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_PHYS(x) (x+0x000003fc) argument
4939 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_IN(x) \ argument
4941 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_INM(x, mask) \ argument
4943 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_OUT(x, val) \ argument
4945 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_OUTM(x, mask, val) \ argument
4957 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_ADDR(x) (x+0x00000400) argument
4958 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_PHYS(x) (x+0x00000400) argument
4961 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_IN(x) \ argument
4963 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_INM(x, mask) \ argument
4965 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_OUT(x, val) \ argument
4967 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_OUTM(x, mask, val) \ argument
4982 #define HWIO_REO_R0_REO2SW6_RING_ID_ADDR(x) (x+0x00000404) argument
4983 #define HWIO_REO_R0_REO2SW6_RING_ID_PHYS(x) (x+0x00000404) argument
4986 #define HWIO_REO_R0_REO2SW6_RING_ID_IN(x) \ argument
4988 #define HWIO_REO_R0_REO2SW6_RING_ID_INM(x, mask) \ argument
4990 #define HWIO_REO_R0_REO2SW6_RING_ID_OUT(x, val) \ argument
4992 #define HWIO_REO_R0_REO2SW6_RING_ID_OUTM(x, mask, val) \ argument
5007 #define HWIO_REO_R0_REO2SW6_RING_STATUS_ADDR(x) (x+0x00000408) argument
5008 #define HWIO_REO_R0_REO2SW6_RING_STATUS_PHYS(x) (x+0x00000408) argument
5011 #define HWIO_REO_R0_REO2SW6_RING_STATUS_IN(x) \ argument
5013 #define HWIO_REO_R0_REO2SW6_RING_STATUS_INM(x, mask) \ argument
5015 #define HWIO_REO_R0_REO2SW6_RING_STATUS_OUT(x, val) \ argument
5017 #define HWIO_REO_R0_REO2SW6_RING_STATUS_OUTM(x, mask, val) \ argument
5032 #define HWIO_REO_R0_REO2SW6_RING_MISC_ADDR(x) (x+0x0000040c) argument
5033 #define HWIO_REO_R0_REO2SW6_RING_MISC_PHYS(x) (x+0x0000040c) argument
5036 #define HWIO_REO_R0_REO2SW6_RING_MISC_IN(x) \ argument
5038 #define HWIO_REO_R0_REO2SW6_RING_MISC_INM(x, mask) \ argument
5040 #define HWIO_REO_R0_REO2SW6_RING_MISC_OUT(x, val) \ argument
5042 #define HWIO_REO_R0_REO2SW6_RING_MISC_OUTM(x, mask, val) \ argument
5087 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000410) argument
5088 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000410) argument
5091 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_IN(x) \ argument
5093 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_INM(x, mask) \ argument
5095 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_OUT(x, val) \ argument
5097 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
5109 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000414) argument
5110 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000414) argument
5113 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_IN(x) \ argument
5115 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_INM(x, mask) \ argument
5117 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_OUT(x, val) \ argument
5119 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
5131 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000420) argument
5132 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000420) argument
5135 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_IN(x) \ argument
5137 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
5139 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
5141 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
5159 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000424) argument
5160 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000424) argument
5163 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_IN(x) \ argument
5165 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
5167 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
5169 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
5187 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000428) argument
5188 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000428) argument
5191 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
5193 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
5195 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
5197 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
5209 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000444) argument
5210 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000444) argument
5213 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_IN(x) \ argument
5215 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
5217 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
5219 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
5231 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000448) argument
5232 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000448) argument
5235 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_IN(x) \ argument
5237 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
5239 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
5241 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
5256 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_ADDR(x) (x+0x0000044c) argument
5257 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_PHYS(x) (x+0x0000044c) argument
5260 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_IN(x) \ argument
5262 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_INM(x, mask) \ argument
5264 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_OUT(x, val) \ argument
5266 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
5278 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000450) argument
5279 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000450) argument
5282 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_IN(x) \ argument
5284 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
5286 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
5288 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
5300 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x) (x+0x00000454) argument
5301 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_PHYS(x) (x+0x00000454) argument
5304 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_IN(x) \ argument
5306 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_INM(x, mask) \ argument
5308 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUT(x, val) \ argument
5310 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUTM(x, mask, val) \ argument
5322 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x) (x+0x00000458) argument
5323 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_PHYS(x) (x+0x00000458) argument
5326 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_IN(x) \ argument
5328 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_INM(x, mask) \ argument
5330 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUT(x, val) \ argument
5332 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUTM(x, mask, val) \ argument
5347 #define HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x) (x+0x0000045c) argument
5348 #define HWIO_REO_R0_REO2TCL_RING_ID_PHYS(x) (x+0x0000045c) argument
5351 #define HWIO_REO_R0_REO2TCL_RING_ID_IN(x) \ argument
5353 #define HWIO_REO_R0_REO2TCL_RING_ID_INM(x, mask) \ argument
5355 #define HWIO_REO_R0_REO2TCL_RING_ID_OUT(x, val) \ argument
5357 #define HWIO_REO_R0_REO2TCL_RING_ID_OUTM(x, mask, val) \ argument
5372 #define HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x) (x+0x00000460) argument
5373 #define HWIO_REO_R0_REO2TCL_RING_STATUS_PHYS(x) (x+0x00000460) argument
5376 #define HWIO_REO_R0_REO2TCL_RING_STATUS_IN(x) \ argument
5378 #define HWIO_REO_R0_REO2TCL_RING_STATUS_INM(x, mask) \ argument
5380 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUT(x, val) \ argument
5382 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUTM(x, mask, val) \ argument
5397 #define HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x) (x+0x00000464) argument
5398 #define HWIO_REO_R0_REO2TCL_RING_MISC_PHYS(x) (x+0x00000464) argument
5401 #define HWIO_REO_R0_REO2TCL_RING_MISC_IN(x) \ argument
5403 #define HWIO_REO_R0_REO2TCL_RING_MISC_INM(x, mask) \ argument
5405 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUT(x, val) \ argument
5407 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUTM(x, mask, val) \ argument
5452 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000468) argument
5453 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000468) argument
5456 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_IN(x) \ argument
5458 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_INM(x, mask) \ argument
5460 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUT(x, val) \ argument
5462 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
5474 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x) (x+0x0000046c) argument
5475 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_PHYS(x) (x+0x0000046c) argument
5478 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_IN(x) \ argument
5480 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_INM(x, mask) \ argument
5482 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUT(x, val) \ argument
5484 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
5496 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000478) argument
5497 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000478) argument
5500 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_IN(x) \ argument
5502 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
5504 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
5506 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
5524 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x0000047c) argument
5525 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x0000047c) argument
5528 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_IN(x) \ argument
5530 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
5532 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
5534 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
5552 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000480) argument
5553 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000480) argument
5556 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
5558 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
5560 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
5562 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
5574 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x) (x+0x0000049c) argument
5575 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_PHYS(x) (x+0x0000049c) argument
5578 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_IN(x) \ argument
5580 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
5582 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
5584 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
5596 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000004a0) argument
5597 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000004a0) argument
5600 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_IN(x) \ argument
5602 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
5604 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
5606 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
5621 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x) (x+0x000004a4) argument
5622 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_PHYS(x) (x+0x000004a4) argument
5625 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_IN(x) \ argument
5627 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_INM(x, mask) \ argument
5629 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUT(x, val) \ argument
5631 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
5643 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000004a8) argument
5644 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000004a8) argument
5647 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_IN(x) \ argument
5649 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
5651 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
5653 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
5665 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x) (x+0x000004ac) argument
5666 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_PHYS(x) (x+0x000004ac) argument
5669 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_IN(x) \ argument
5671 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_INM(x, mask) \ argument
5673 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUT(x, val) \ argument
5675 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUTM(x, mask, val) \ argument
5687 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x) (x+0x000004b0) argument
5688 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_PHYS(x) (x+0x000004b0) argument
5691 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_IN(x) \ argument
5693 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_INM(x, mask) \ argument
5695 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUT(x, val) \ argument
5697 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUTM(x, mask, val) \ argument
5712 #define HWIO_REO_R0_REO2FW_RING_ID_ADDR(x) (x+0x000004b4) argument
5713 #define HWIO_REO_R0_REO2FW_RING_ID_PHYS(x) (x+0x000004b4) argument
5716 #define HWIO_REO_R0_REO2FW_RING_ID_IN(x) \ argument
5718 #define HWIO_REO_R0_REO2FW_RING_ID_INM(x, mask) \ argument
5720 #define HWIO_REO_R0_REO2FW_RING_ID_OUT(x, val) \ argument
5722 #define HWIO_REO_R0_REO2FW_RING_ID_OUTM(x, mask, val) \ argument
5737 #define HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x) (x+0x000004b8) argument
5738 #define HWIO_REO_R0_REO2FW_RING_STATUS_PHYS(x) (x+0x000004b8) argument
5741 #define HWIO_REO_R0_REO2FW_RING_STATUS_IN(x) \ argument
5743 #define HWIO_REO_R0_REO2FW_RING_STATUS_INM(x, mask) \ argument
5745 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUT(x, val) \ argument
5747 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUTM(x, mask, val) \ argument
5762 #define HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x) (x+0x000004bc) argument
5763 #define HWIO_REO_R0_REO2FW_RING_MISC_PHYS(x) (x+0x000004bc) argument
5766 #define HWIO_REO_R0_REO2FW_RING_MISC_IN(x) \ argument
5768 #define HWIO_REO_R0_REO2FW_RING_MISC_INM(x, mask) \ argument
5770 #define HWIO_REO_R0_REO2FW_RING_MISC_OUT(x, val) \ argument
5772 #define HWIO_REO_R0_REO2FW_RING_MISC_OUTM(x, mask, val) \ argument
5817 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x) (x+0x000004c0) argument
5818 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_PHYS(x) (x+0x000004c0) argument
5821 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_IN(x) \ argument
5823 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_INM(x, mask) \ argument
5825 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUT(x, val) \ argument
5827 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
5839 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x) (x+0x000004c4) argument
5840 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_PHYS(x) (x+0x000004c4) argument
5843 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_IN(x) \ argument
5845 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_INM(x, mask) \ argument
5847 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUT(x, val) \ argument
5849 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
5861 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x000004d0) argument
5862 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x000004d0) argument
5865 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_IN(x) \ argument
5867 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
5869 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
5871 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
5889 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x000004d4) argument
5890 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x000004d4) argument
5893 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_IN(x) \ argument
5895 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
5897 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
5899 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
5917 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x000004d8) argument
5918 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x000004d8) argument
5921 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
5923 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
5925 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
5927 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
5939 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000004f4) argument
5940 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000004f4) argument
5943 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_IN(x) \ argument
5945 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
5947 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
5949 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
5961 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000004f8) argument
5962 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000004f8) argument
5965 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_IN(x) \ argument
5967 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
5969 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
5971 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
5986 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x) (x+0x000004fc) argument
5987 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_PHYS(x) (x+0x000004fc) argument
5990 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_IN(x) \ argument
5992 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_INM(x, mask) \ argument
5994 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUT(x, val) \ argument
5996 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
6008 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000500) argument
6009 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000500) argument
6012 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_IN(x) \ argument
6014 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
6016 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
6018 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
6030 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x) (x+0x00000504) argument
6031 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_PHYS(x) (x+0x00000504) argument
6034 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_IN(x) \ argument
6036 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_INM(x, mask) \ argument
6038 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUT(x, val) \ argument
6040 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUTM(x, mask, val) \ argument
6052 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x) (x+0x00000508) argument
6053 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_PHYS(x) (x+0x00000508) argument
6056 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_IN(x) \ argument
6058 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_INM(x, mask) \ argument
6060 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUT(x, val) \ argument
6062 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUTM(x, mask, val) \ argument
6077 #define HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x) (x+0x0000050c) argument
6078 #define HWIO_REO_R0_REO_RELEASE_RING_ID_PHYS(x) (x+0x0000050c) argument
6081 #define HWIO_REO_R0_REO_RELEASE_RING_ID_IN(x) \ argument
6083 #define HWIO_REO_R0_REO_RELEASE_RING_ID_INM(x, mask) \ argument
6085 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUT(x, val) \ argument
6087 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUTM(x, mask, val) \ argument
6102 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x) (x+0x00000510) argument
6103 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_PHYS(x) (x+0x00000510) argument
6106 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_IN(x) \ argument
6108 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_INM(x, mask) \ argument
6110 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUT(x, val) \ argument
6112 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUTM(x, mask, val) \ argument
6127 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x) (x+0x00000514) argument
6128 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_PHYS(x) (x+0x00000514) argument
6131 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_IN(x) \ argument
6133 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_INM(x, mask) \ argument
6135 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUT(x, val) \ argument
6137 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUTM(x, mask, val) \ argument
6182 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000518) argument
6183 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000518) argument
6186 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_IN(x) \ argument
6188 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_INM(x, mask) \ argument
6190 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUT(x, val) \ argument
6192 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
6204 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x) (x+0x0000051c) argument
6205 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_PHYS(x) (x+0x0000051c) argument
6208 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_IN(x) \ argument
6210 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_INM(x, mask) \ argument
6212 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUT(x, val) \ argument
6214 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
6226 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000528) argument
6227 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000528) argument
6230 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_IN(x) \ argument
6232 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
6234 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
6236 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
6254 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x0000052c) argument
6255 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x0000052c) argument
6258 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_IN(x) \ argument
6260 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
6262 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
6264 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
6282 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000530) argument
6283 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000530) argument
6286 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
6288 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
6290 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
6292 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
6304 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000558) argument
6305 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000558) argument
6308 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_IN(x) \ argument
6310 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
6312 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
6314 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
6326 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x) (x+0x0000055c) argument
6327 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_PHYS(x) (x+0x0000055c) argument
6330 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_IN(x) \ argument
6332 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_INM(x, mask) \ argument
6334 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUT(x, val) \ argument
6336 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUTM(x, mask, val) \ argument
6348 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x) (x+0x00000560) argument
6349 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_PHYS(x) (x+0x00000560) argument
6352 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_IN(x) \ argument
6354 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_INM(x, mask) \ argument
6356 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUT(x, val) \ argument
6358 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUTM(x, mask, val) \ argument
6373 #define HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x) (x+0x00000564) argument
6374 #define HWIO_REO_R0_REO_STATUS_RING_ID_PHYS(x) (x+0x00000564) argument
6377 #define HWIO_REO_R0_REO_STATUS_RING_ID_IN(x) \ argument
6379 #define HWIO_REO_R0_REO_STATUS_RING_ID_INM(x, mask) \ argument
6381 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUT(x, val) \ argument
6383 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUTM(x, mask, val) \ argument
6398 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x) (x+0x00000568) argument
6399 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_PHYS(x) (x+0x00000568) argument
6402 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_IN(x) \ argument
6404 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_INM(x, mask) \ argument
6406 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUT(x, val) \ argument
6408 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUTM(x, mask, val) \ argument
6423 #define HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x) (x+0x0000056c) argument
6424 #define HWIO_REO_R0_REO_STATUS_RING_MISC_PHYS(x) (x+0x0000056c) argument
6427 #define HWIO_REO_R0_REO_STATUS_RING_MISC_IN(x) \ argument
6429 #define HWIO_REO_R0_REO_STATUS_RING_MISC_INM(x, mask) \ argument
6431 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUT(x, val) \ argument
6433 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUTM(x, mask, val) \ argument
6478 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000570) argument
6479 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000570) argument
6482 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_IN(x) \ argument
6484 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_INM(x, mask) \ argument
6486 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUT(x, val) \ argument
6488 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
6500 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000574) argument
6501 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000574) argument
6504 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_IN(x) \ argument
6506 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_INM(x, mask) \ argument
6508 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUT(x, val) \ argument
6510 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
6522 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000580) argument
6523 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000580) argument
6526 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_IN(x) \ argument
6528 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
6530 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUT(x, val) \ argument
6532 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
6550 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000584) argument
6551 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000584) argument
6554 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_IN(x) \ argument
6556 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
6558 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUT(x, val) \ argument
6560 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
6578 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000588) argument
6579 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000588) argument
6582 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_IN(x) \ argument
6584 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
6586 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ argument
6588 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
6600 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000005a4) argument
6601 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000005a4) argument
6604 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_IN(x) \ argument
6606 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
6608 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUT(x, val) \ argument
6610 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
6622 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000005a8) argument
6623 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000005a8) argument
6626 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_IN(x) \ argument
6628 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
6630 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUT(x, val) \ argument
6632 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
6647 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x) (x+0x000005ac) argument
6648 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_PHYS(x) (x+0x000005ac) argument
6651 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_IN(x) \ argument
6653 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_INM(x, mask) \ argument
6655 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUT(x, val) \ argument
6657 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
6669 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000005b0) argument
6670 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000005b0) argument
6673 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_IN(x) \ argument
6675 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
6677 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUT(x, val) \ argument
6679 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
6691 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x) (x+0x000005b4) argument
6692 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_PHYS(x) (x+0x000005b4) argument
6695 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_IN(x) \ argument
6697 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_INM(x, mask) \ argument
6699 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUT(x, val) \ argument
6701 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUTM(x, mask, val) \ argument
6716 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x) (x+0x000005b8) argument
6717 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_PHYS(x) (x+0x000005b8) argument
6720 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_IN(x) \ argument
6722 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_INM(x, mask) \ argument
6724 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUT(x, val) \ argument
6726 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUTM(x, mask, val) \ argument
6738 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x) (x+0x000005bc) argument
6739 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_PHYS(x) (x+0x000005bc) argument
6742 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_IN(x) \ argument
6744 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_INM(x, mask) \ argument
6746 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUT(x, val) \ argument
6748 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUTM(x, mask, val) \ argument
6760 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x) (x+0x000005c0) argument
6761 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_PHYS(x) (x+0x000005c0) argument
6764 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_IN(x) \ argument
6766 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_INM(x, mask) \ argument
6768 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUT(x, val) \ argument
6770 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUTM(x, mask, val) \ argument
6782 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x) (x+0x000005c4) argument
6783 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_PHYS(x) (x+0x000005c4) argument
6786 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_IN(x) \ argument
6788 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_INM(x, mask) \ argument
6790 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUT(x, val) \ argument
6792 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUTM(x, mask, val) \ argument
6804 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x) (x+0x000005c8) argument
6805 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_PHYS(x) (x+0x000005c8) argument
6808 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_IN(x) \ argument
6810 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_INM(x, mask) \ argument
6812 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUT(x, val) \ argument
6814 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUTM(x, mask, val) \ argument
6826 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x) (x+0x000005cc) argument
6827 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_PHYS(x) (x+0x000005cc) argument
6830 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_IN(x) \ argument
6832 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_INM(x, mask) \ argument
6834 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUT(x, val) \ argument
6836 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUTM(x, mask, val) \ argument
6848 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x) (x+0x000005d0) argument
6849 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_PHYS(x) (x+0x000005d0) argument
6852 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_IN(x) \ argument
6854 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_INM(x, mask) \ argument
6856 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUT(x, val) \ argument
6858 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUTM(x, mask, val) \ argument
6870 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x) (x+0x000005d4) argument
6871 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_PHYS(x) (x+0x000005d4) argument
6874 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_IN(x) \ argument
6876 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_INM(x, mask) \ argument
6878 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUT(x, val) \ argument
6880 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUTM(x, mask, val) \ argument
6892 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x) (x+0x000005d8) argument
6893 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_PHYS(x) (x+0x000005d8) argument
6896 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_IN(x) \ argument
6898 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_INM(x, mask) \ argument
6900 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUT(x, val) \ argument
6902 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUTM(x, mask, val) \ argument
6914 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x) (x+0x000005dc) argument
6915 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_PHYS(x) (x+0x000005dc) argument
6918 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_IN(x) \ argument
6920 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_INM(x, mask) \ argument
6922 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUT(x, val) \ argument
6924 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUTM(x, mask, val) \ argument
6936 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x) (x+0x000005e0) argument
6937 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_PHYS(x) (x+0x000005e0) argument
6940 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_IN(x) \ argument
6942 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_INM(x, mask) \ argument
6944 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUT(x, val) \ argument
6946 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUTM(x, mask, val) \ argument
6958 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x) (x+0x000005e4) argument
6959 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_PHYS(x) (x+0x000005e4) argument
6962 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_IN(x) \ argument
6964 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_INM(x, mask) \ argument
6966 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUT(x, val) \ argument
6968 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUTM(x, mask, val) \ argument
6980 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x) (x+0x000005e8) argument
6981 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_PHYS(x) (x+0x000005e8) argument
6984 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_IN(x) \ argument
6986 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_INM(x, mask) \ argument
6988 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUT(x, val) \ argument
6990 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUTM(x, mask, val) \ argument
7002 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x) (x+0x000005ec) argument
7003 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_PHYS(x) (x+0x000005ec) argument
7006 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_IN(x) \ argument
7008 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_INM(x, mask) \ argument
7010 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUT(x, val) \ argument
7012 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUTM(x, mask, val) \ argument
7024 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x) (x+0x000005f0) argument
7025 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_PHYS(x) (x+0x000005f0) argument
7028 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_IN(x) \ argument
7030 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_INM(x, mask) \ argument
7032 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUT(x, val) \ argument
7034 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUTM(x, mask, val) \ argument
7046 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x) (x+0x000005f4) argument
7047 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_PHYS(x) (x+0x000005f4) argument
7050 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_IN(x) \ argument
7052 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_INM(x, mask) \ argument
7054 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUT(x, val) \ argument
7056 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUTM(x, mask, val) \ argument
7068 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x) (x+0x000005f8) argument
7069 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_PHYS(x) (x+0x000005f8) argument
7072 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_IN(x) \ argument
7074 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_INM(x, mask) \ argument
7076 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUT(x, val) \ argument
7078 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUTM(x, mask, val) \ argument
7090 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x) (x+0x000005fc) argument
7091 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_PHYS(x) (x+0x000005fc) argument
7094 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_IN(x) \ argument
7096 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_INM(x, mask) \ argument
7098 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUT(x, val) \ argument
7100 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUTM(x, mask, val) \ argument
7112 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x) (x+0x00000600) argument
7113 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_PHYS(x) (x+0x00000600) argument
7116 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_IN(x) \ argument
7118 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_INM(x, mask) \ argument
7120 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUT(x, val) \ argument
7122 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUTM(x, mask, val) \ argument
7134 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x) (x+0x00000604) argument
7135 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_PHYS(x) (x+0x00000604) argument
7138 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_IN(x) \ argument
7140 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_INM(x, mask) \ argument
7142 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUT(x, val) \ argument
7144 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUTM(x, mask, val) \ argument
7156 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x) (x+0x00000608) argument
7157 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_PHYS(x) (x+0x00000608) argument
7160 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_IN(x) \ argument
7162 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_INM(x, mask) \ argument
7164 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUT(x, val) \ argument
7166 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUTM(x, mask, val) \ argument
7178 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x) (x+0x0000060c) argument
7179 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_PHYS(x) (x+0x0000060c) argument
7182 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_IN(x) \ argument
7184 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_INM(x, mask) \ argument
7186 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUT(x, val) \ argument
7188 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUTM(x, mask, val) \ argument
7200 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x) (x+0x00000610) argument
7201 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_PHYS(x) (x+0x00000610) argument
7204 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_IN(x) \ argument
7206 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_INM(x, mask) \ argument
7208 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUT(x, val) \ argument
7210 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUTM(x, mask, val) \ argument
7222 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x) (x+0x00000614) argument
7223 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_PHYS(x) (x+0x00000614) argument
7226 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_IN(x) \ argument
7228 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_INM(x, mask) \ argument
7230 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUT(x, val) \ argument
7232 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUTM(x, mask, val) \ argument
7244 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x) (x+0x00000618) argument
7245 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_PHYS(x) (x+0x00000618) argument
7248 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_IN(x) \ argument
7250 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_INM(x, mask) \ argument
7252 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUT(x, val) \ argument
7254 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUTM(x, mask, val) \ argument
7266 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x) (x+0x0000061c) argument
7267 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_PHYS(x) (x+0x0000061c) argument
7270 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_IN(x) \ argument
7272 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_INM(x, mask) \ argument
7274 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUT(x, val) \ argument
7276 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUTM(x, mask, val) \ argument
7288 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x) (x+0x00000620) argument
7289 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_PHYS(x) (x+0x00000620) argument
7292 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_IN(x) \ argument
7294 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_INM(x, mask) \ argument
7296 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUT(x, val) \ argument
7298 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUTM(x, mask, val) \ argument
7310 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x) (x+0x00000624) argument
7311 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_PHYS(x) (x+0x00000624) argument
7314 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_IN(x) \ argument
7316 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_INM(x, mask) \ argument
7318 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUT(x, val) \ argument
7320 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUTM(x, mask, val) \ argument
7332 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x) (x+0x00000628) argument
7333 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_PHYS(x) (x+0x00000628) argument
7336 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_IN(x) \ argument
7338 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_INM(x, mask) \ argument
7340 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUT(x, val) \ argument
7342 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUTM(x, mask, val) \ argument
7354 #define HWIO_REO_R0_AGING_CONTROL_ADDR(x) (x+0x0000062c) argument
7355 #define HWIO_REO_R0_AGING_CONTROL_PHYS(x) (x+0x0000062c) argument
7358 #define HWIO_REO_R0_AGING_CONTROL_IN(x) \ argument
7360 #define HWIO_REO_R0_AGING_CONTROL_INM(x, mask) \ argument
7362 #define HWIO_REO_R0_AGING_CONTROL_OUT(x, val) \ argument
7364 #define HWIO_REO_R0_AGING_CONTROL_OUTM(x, mask, val) \ argument
7376 #define HWIO_REO_R0_MISC_CTL_ADDR(x) (x+0x00000630) argument
7377 #define HWIO_REO_R0_MISC_CTL_PHYS(x) (x+0x00000630) argument
7380 #define HWIO_REO_R0_MISC_CTL_IN(x) \ argument
7382 #define HWIO_REO_R0_MISC_CTL_INM(x, mask) \ argument
7384 #define HWIO_REO_R0_MISC_CTL_OUT(x, val) \ argument
7386 #define HWIO_REO_R0_MISC_CTL_OUTM(x, mask, val) \ argument
7404 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x) (x+0x00000634) argument
7405 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_PHYS(x) (x+0x00000634) argument
7408 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_IN(x) \ argument
7410 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_INM(x, mask) \ argument
7412 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUT(x, val) \ argument
7414 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUTM(x, mask, val) \ argument
7426 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x) (x+0x00000638) argument
7427 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_PHYS(x) (x+0x00000638) argument
7430 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_IN(x) \ argument
7432 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_INM(x, mask) \ argument
7434 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUT(x, val) \ argument
7436 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUTM(x, mask, val) \ argument
7448 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x) (x+0x0000063c) argument
7449 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_PHYS(x) (x+0x0000063c) argument
7452 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_IN(x) \ argument
7454 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_INM(x, mask) \ argument
7456 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUT(x, val) \ argument
7458 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUTM(x, mask, val) \ argument
7470 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x) (x+0x00000640) argument
7471 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_PHYS(x) (x+0x00000640) argument
7474 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_IN(x) \ argument
7476 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_INM(x, mask) \ argument
7478 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUT(x, val) \ argument
7480 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUTM(x, mask, val) \ argument
7492 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x) (x+0x00000644) argument
7493 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_PHYS(x) (x+0x00000644) argument
7496 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_IN(x) \ argument
7498 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_INM(x, mask) \ argument
7500 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUT(x, val) \ argument
7502 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUTM(x, mask, val) \ argument
7514 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x) (x+0x00000648) argument
7515 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_PHYS(x) (x+0x00000648) argument
7518 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_IN(x) \ argument
7520 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_INM(x, mask) \ argument
7522 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUT(x, val) \ argument
7524 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUTM(x, mask, val) \ argument
7536 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x) (x+0x0000064c) argument
7537 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_PHYS(x) (x+0x0000064c) argument
7540 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_IN(x) \ argument
7542 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_INM(x, mask) \ argument
7544 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUT(x, val) \ argument
7546 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUTM(x, mask, val) \ argument
7558 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x) (x+0x00000650) argument
7559 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_PHYS(x) (x+0x00000650) argument
7562 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_IN(x) \ argument
7564 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_INM(x, mask) \ argument
7566 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUT(x, val) \ argument
7568 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUTM(x, mask, val) \ argument
7580 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x) (x+0x00000654) argument
7581 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_PHYS(x) (x+0x00000654) argument
7584 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_IN(x) \ argument
7586 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_INM(x, mask) \ argument
7588 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUT(x, val) \ argument
7590 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUTM(x, mask, val) \ argument
7602 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x) (x+0x00000658) argument
7603 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_PHYS(x) (x+0x00000658) argument
7606 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_IN(x) \ argument
7608 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_INM(x, mask) \ argument
7610 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUT(x, val) \ argument
7612 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUTM(x, mask, val) \ argument
7624 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x) (x+0x0000065c) argument
7625 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_PHYS(x) (x+0x0000065c) argument
7628 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_IN(x) \ argument
7630 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_INM(x, mask) \ argument
7632 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUT(x, val) \ argument
7634 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUTM(x, mask, val) \ argument
7646 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x) (x+0x00000660) argument
7647 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_PHYS(x) (x+0x00000660) argument
7650 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_IN(x) \ argument
7652 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_INM(x, mask) \ argument
7654 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUT(x, val) \ argument
7656 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUTM(x, mask, val) \ argument
7668 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x) (x+0x00000664) argument
7669 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_PHYS(x) (x+0x00000664) argument
7672 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_IN(x) \ argument
7674 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_INM(x, mask) \ argument
7676 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUT(x, val) \ argument
7678 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUTM(x, mask, val) \ argument
7690 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x) (x+0x00000668) argument
7691 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_PHYS(x) (x+0x00000668) argument
7694 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_IN(x) \ argument
7696 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_INM(x, mask) \ argument
7698 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUT(x, val) \ argument
7700 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUTM(x, mask, val) \ argument
7712 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x) (x+0x0000066c) argument
7713 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_PHYS(x) (x+0x0000066c) argument
7716 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_IN(x) \ argument
7718 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_INM(x, mask) \ argument
7720 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUT(x, val) \ argument
7722 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUTM(x, mask, val) \ argument
7734 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x) (x+0x00000670) argument
7735 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_PHYS(x) (x+0x00000670) argument
7738 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_IN(x) \ argument
7740 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_INM(x, mask) \ argument
7742 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUT(x, val) \ argument
7744 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUTM(x, mask, val) \ argument
7756 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x) (x+0x00000674) argument
7757 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_PHYS(x) (x+0x00000674) argument
7760 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_IN(x) \ argument
7762 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_INM(x, mask) \ argument
7764 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUT(x, val) \ argument
7766 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUTM(x, mask, val) \ argument
7778 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x) (x+0x00000678) argument
7779 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_PHYS(x) (x+0x00000678) argument
7782 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_IN(x) \ argument
7784 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_INM(x, mask) \ argument
7786 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUT(x, val) \ argument
7788 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUTM(x, mask, val) \ argument
7800 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x) (x+0x0000067c) argument
7801 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_PHYS(x) (x+0x0000067c) argument
7804 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_IN(x) \ argument
7806 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_INM(x, mask) \ argument
7808 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUT(x, val) \ argument
7810 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUTM(x, mask, val) \ argument
7822 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x) (x+0x00000680) argument
7823 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_PHYS(x) (x+0x00000680) argument
7826 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_IN(x) \ argument
7828 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_INM(x, mask) \ argument
7830 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUT(x, val) \ argument
7832 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUTM(x, mask, val) \ argument
7844 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x) (x+0x00000684) argument
7845 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_PHYS(x) (x+0x00000684) argument
7848 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_IN(x) \ argument
7850 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_INM(x, mask) \ argument
7852 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUT(x, val) \ argument
7854 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUTM(x, mask, val) \ argument
7866 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x) (x+0x00000688) argument
7867 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_PHYS(x) (x+0x00000688) argument
7870 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_IN(x) \ argument
7872 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_INM(x, mask) \ argument
7874 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUT(x, val) \ argument
7876 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUTM(x, mask, val) \ argument
7891 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x) (x+0x0000068c) argument
7892 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x) (x+0x0000068c) argument
7895 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_IN(x) \ argument
7897 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask) \ argument
7899 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
7901 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
7916 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x) (x+0x00000690) argument
7917 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x) (x+0x00000690) argument
7920 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_IN(x) \ argument
7922 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask) \ argument
7924 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
7926 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
7941 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x) (x+0x00000694) argument
7942 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x) (x+0x00000694) argument
7945 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_IN(x) \ argument
7947 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask) \ argument
7949 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
7951 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
7966 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x) (x+0x00000698) argument
7967 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x) (x+0x00000698) argument
7970 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_IN(x) \ argument
7972 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask) \ argument
7974 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
7976 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
7991 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x) (x+0x0000069c) argument
7992 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x) (x+0x0000069c) argument
7995 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_IN(x) \ argument
7997 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask) \ argument
7999 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
8001 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
8016 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x) (x+0x000006a0) argument
8017 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x) (x+0x000006a0) argument
8020 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_IN(x) \ argument
8022 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask) \ argument
8024 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
8026 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
8041 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x) (x+0x000006a4) argument
8042 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x) (x+0x000006a4) argument
8045 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_IN(x) \ argument
8047 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask) \ argument
8049 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
8051 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
8066 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x) (x+0x000006a8) argument
8067 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_PHYS(x) (x+0x000006a8) argument
8070 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_IN(x) \ argument
8072 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask) \ argument
8074 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_OUT(x, val) \ argument
8076 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \ argument
8091 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x) (x+0x000006ac) argument
8092 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_PHYS(x) (x+0x000006ac) argument
8095 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_IN(x) \ argument
8097 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_INM(x, mask) \ argument
8099 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUT(x, val) \ argument
8101 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUTM(x, mask, val) \ argument
8113 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x) (x+0x000006b0) argument
8114 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_PHYS(x) (x+0x000006b0) argument
8117 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_IN(x) \ argument
8119 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_INM(x, mask) \ argument
8121 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUT(x, val) \ argument
8123 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUTM(x, mask, val) \ argument
8135 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x) (x+0x000006b4) argument
8136 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_PHYS(x) (x+0x000006b4) argument
8139 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_IN(x) \ argument
8141 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_INM(x, mask) \ argument
8143 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUT(x, val) \ argument
8145 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUTM(x, mask, val) \ argument
8163 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x) (x+0x000006b8) argument
8164 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_PHYS(x) (x+0x000006b8) argument
8167 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_IN(x) \ argument
8169 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_INM(x, mask) \ argument
8171 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUT(x, val) \ argument
8173 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
8185 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x) (x+0x000006bc) argument
8186 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_PHYS(x) (x+0x000006bc) argument
8189 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_IN(x) \ argument
8191 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_INM(x, mask) \ argument
8193 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUT(x, val) \ argument
8195 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUTM(x, mask, val) \ argument
8243 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x) (x+0x000006c0) argument
8244 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_PHYS(x) (x+0x000006c0) argument
8247 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_IN(x) \ argument
8249 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_INM(x, mask) \ argument
8251 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUT(x, val) \ argument
8253 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUTM(x, mask, val) \ argument
8274 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x) (x+0x000006c4) argument
8275 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_PHYS(x) (x+0x000006c4) argument
8278 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_IN(x) \ argument
8280 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_INM(x, mask) \ argument
8282 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUT(x, val) \ argument
8284 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUTM(x, mask, val) \ argument
8302 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x) (x+0x000006c8) argument
8303 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_PHYS(x) (x+0x000006c8) argument
8306 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_IN(x) \ argument
8308 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_INM(x, mask) \ argument
8310 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUT(x, val) \ argument
8312 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUTM(x, mask, val) \ argument
8333 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x) (x+0x000006cc) argument
8334 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_PHYS(x) (x+0x000006cc) argument
8337 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_IN(x) \ argument
8339 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_INM(x, mask) \ argument
8341 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUT(x, val) \ argument
8343 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUTM(x, mask, val) \ argument
8364 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x) (x+0x000006d0) argument
8365 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_PHYS(x) (x+0x000006d0) argument
8368 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_IN(x) \ argument
8370 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_INM(x, mask) \ argument
8372 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUT(x, val) \ argument
8374 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUTM(x, mask, val) \ argument
8413 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x) (x+0x000006d4) argument
8414 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_PHYS(x) (x+0x000006d4) argument
8417 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_IN(x) \ argument
8419 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_INM(x, mask) \ argument
8421 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUT(x, val) \ argument
8423 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUTM(x, mask, val) \ argument
8438 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x) (x+0x000006d8) argument
8439 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_PHYS(x) (x+0x000006d8) argument
8442 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_IN(x) \ argument
8444 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_INM(x, mask) \ argument
8446 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUT(x, val) \ argument
8448 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUTM(x, mask, val) \ argument
8460 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x) (x+0x000006dc) argument
8461 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_PHYS(x) (x+0x000006dc) argument
8464 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_IN(x) \ argument
8466 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_INM(x, mask) \ argument
8468 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUT(x, val) \ argument
8470 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUTM(x, mask, val) \ argument
8485 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x) (x+0x000006e0) argument
8486 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_PHYS(x) (x+0x000006e0) argument
8489 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_IN(x) \ argument
8491 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_INM(x, mask) \ argument
8493 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_OUT(x, val) \ argument
8495 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_OUTM(x, mask, val) \ argument
8513 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x) (x+0x000006e4) argument
8514 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_PHYS(x) (x+0x000006e4) argument
8517 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_IN(x) \ argument
8519 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_INM(x, mask) \ argument
8521 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_OUT(x, val) \ argument
8523 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_OUTM(x, mask, val) \ argument
8541 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x) (x+0x000006e8) argument
8542 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_PHYS(x) (x+0x000006e8) argument
8545 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_IN(x) \ argument
8547 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_INM(x, mask) \ argument
8549 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUT(x, val) \ argument
8551 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \ argument
8563 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x) (x+0x000006ec) argument
8564 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_PHYS(x) (x+0x000006ec) argument
8567 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_IN(x) \ argument
8569 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_INM(x, mask) \ argument
8571 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUT(x, val) \ argument
8573 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \ argument
8585 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x) (x+0x000006f0) argument
8586 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_PHYS(x) (x+0x000006f0) argument
8589 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_IN(x) \ argument
8591 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_INM(x, mask) \ argument
8593 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUT(x, val) \ argument
8595 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \ argument
8607 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x) (x+0x000006f4) argument
8608 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_PHYS(x) (x+0x000006f4) argument
8611 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_IN(x) \ argument
8613 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_INM(x, mask) \ argument
8615 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUT(x, val) \ argument
8617 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \ argument
8629 #define HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x) (x+0x000006f8) argument
8630 #define HWIO_REO_R0_CACHE_CTL_CONFIG_PHYS(x) (x+0x000006f8) argument
8633 #define HWIO_REO_R0_CACHE_CTL_CONFIG_IN(x) \ argument
8635 #define HWIO_REO_R0_CACHE_CTL_CONFIG_INM(x, mask) \ argument
8637 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUT(x, val) \ argument
8639 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUTM(x, mask, val) \ argument
8678 #define HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x) (x+0x000006fc) argument
8679 #define HWIO_REO_R0_CACHE_CTL_CONTROL_PHYS(x) (x+0x000006fc) argument
8682 #define HWIO_REO_R0_CACHE_CTL_CONTROL_IN(x) \ argument
8684 #define HWIO_REO_R0_CACHE_CTL_CONTROL_INM(x, mask) \ argument
8686 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUT(x, val) \ argument
8688 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUTM(x, mask, val) \ argument
8700 #define HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x) (x+0x00000700) argument
8701 #define HWIO_REO_R0_CLK_GATE_CTRL_PHYS(x) (x+0x00000700) argument
8704 #define HWIO_REO_R0_CLK_GATE_CTRL_IN(x) \ argument
8706 #define HWIO_REO_R0_CLK_GATE_CTRL_INM(x, mask) \ argument
8708 #define HWIO_REO_R0_CLK_GATE_CTRL_OUT(x, val) \ argument
8710 #define HWIO_REO_R0_CLK_GATE_CTRL_OUTM(x, mask, val) \ argument
8749 #define HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x) (x+0x00000704) argument
8750 #define HWIO_REO_R0_EVENTMASK_IX_0_PHYS(x) (x+0x00000704) argument
8753 #define HWIO_REO_R0_EVENTMASK_IX_0_IN(x) \ argument
8755 #define HWIO_REO_R0_EVENTMASK_IX_0_INM(x, mask) \ argument
8757 #define HWIO_REO_R0_EVENTMASK_IX_0_OUT(x, val) \ argument
8759 #define HWIO_REO_R0_EVENTMASK_IX_0_OUTM(x, mask, val) \ argument
8771 #define HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x) (x+0x00000708) argument
8772 #define HWIO_REO_R0_EVENTMASK_IX_1_PHYS(x) (x+0x00000708) argument
8775 #define HWIO_REO_R0_EVENTMASK_IX_1_IN(x) \ argument
8777 #define HWIO_REO_R0_EVENTMASK_IX_1_INM(x, mask) \ argument
8779 #define HWIO_REO_R0_EVENTMASK_IX_1_OUT(x, val) \ argument
8781 #define HWIO_REO_R0_EVENTMASK_IX_1_OUTM(x, mask, val) \ argument
8793 #define HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x) (x+0x0000070c) argument
8794 #define HWIO_REO_R0_EVENTMASK_IX_2_PHYS(x) (x+0x0000070c) argument
8797 #define HWIO_REO_R0_EVENTMASK_IX_2_IN(x) \ argument
8799 #define HWIO_REO_R0_EVENTMASK_IX_2_INM(x, mask) \ argument
8801 #define HWIO_REO_R0_EVENTMASK_IX_2_OUT(x, val) \ argument
8803 #define HWIO_REO_R0_EVENTMASK_IX_2_OUTM(x, mask, val) \ argument
8815 #define HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x) (x+0x00000710) argument
8816 #define HWIO_REO_R0_EVENTMASK_IX_3_PHYS(x) (x+0x00000710) argument
8819 #define HWIO_REO_R0_EVENTMASK_IX_3_IN(x) \ argument
8821 #define HWIO_REO_R0_EVENTMASK_IX_3_INM(x, mask) \ argument
8823 #define HWIO_REO_R0_EVENTMASK_IX_3_OUT(x, val) \ argument
8825 #define HWIO_REO_R0_EVENTMASK_IX_3_OUTM(x, mask, val) \ argument
8837 #define HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x) (x+0x00002000) argument
8838 #define HWIO_REO_R1_MISC_DEBUG_CTRL_PHYS(x) (x+0x00002000) argument
8841 #define HWIO_REO_R1_MISC_DEBUG_CTRL_IN(x) \ argument
8843 #define HWIO_REO_R1_MISC_DEBUG_CTRL_INM(x, mask) \ argument
8845 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUT(x, val) \ argument
8847 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUTM(x, mask, val) \ argument
8871 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x) (x+0x00002004) argument
8872 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_PHYS(x) (x+0x00002004) argument
8875 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_IN(x) \ argument
8877 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_INM(x, mask) \ argument
8879 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUT(x, val) \ argument
8881 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUTM(x, mask, val) \ argument
8896 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x) (x+0x00002008) argument
8897 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_PHYS(x) (x+0x00002008) argument
8900 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_IN(x) \ argument
8902 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_INM(x, mask) \ argument
8904 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUT(x, val) \ argument
8906 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUTM(x, mask, val) \ argument
8927 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x) (x+0x0000200c) argument
8928 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_PHYS(x) (x+0x0000200c) argument
8931 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_IN(x) \ argument
8933 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_INM(x, mask) \ argument
8935 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUT(x, val) \ argument
8937 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUTM(x, mask, val) \ argument
8949 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x) (x+0x00002010) argument
8950 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_PHYS(x) (x+0x00002010) argument
8953 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_IN(x) \ argument
8955 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_INM(x, mask) \ argument
8957 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUT(x, val) \ argument
8959 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUTM(x, mask, val) \ argument
8971 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x) (x+0x00002014) argument
8972 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_PHYS(x) (x+0x00002014) argument
8975 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_IN(x) \ argument
8977 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_INM(x, mask) \ argument
8979 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUT(x, val) \ argument
8981 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUTM(x, mask, val) \ argument
8993 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x) (x+0x00002018) argument
8994 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_PHYS(x) (x+0x00002018) argument
8997 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_IN(x) \ argument
8999 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_INM(x, mask) \ argument
9001 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUT(x, val) \ argument
9003 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUTM(x, mask, val) \ argument
9015 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x) (x+0x0000201c) argument
9016 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_PHYS(x) (x+0x0000201c) argument
9019 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_IN(x) \ argument
9021 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_INM(x, mask) \ argument
9023 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUT(x, val) \ argument
9025 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUTM(x, mask, val) \ argument
9037 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x) (x+0x00002020) argument
9038 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_PHYS(x) (x+0x00002020) argument
9041 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_IN(x) \ argument
9043 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_INM(x, mask) \ argument
9045 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUT(x, val) \ argument
9047 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUTM(x, mask, val) \ argument
9068 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x) (x+0x00002024) argument
9069 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_PHYS(x) (x+0x00002024) argument
9072 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_IN(x) \ argument
9074 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_INM(x, mask) \ argument
9076 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUT(x, val) \ argument
9078 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
9090 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x) (x+0x00002028) argument
9091 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_PHYS(x) (x+0x00002028) argument
9094 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_IN(x) \ argument
9096 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_INM(x, mask) \ argument
9098 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_OUT(x, val) \ argument
9100 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_OUTM(x, mask, val) \ argument
9112 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x) (x+0x0000202c) argument
9113 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_PHYS(x) (x+0x0000202c) argument
9116 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_IN(x) \ argument
9118 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_INM(x, mask) \ argument
9120 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_OUT(x, val) \ argument
9122 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_OUTM(x, mask, val) \ argument
9134 #define HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x) (x+0x00002030) argument
9135 #define HWIO_REO_R1_END_OF_TEST_CHECK_PHYS(x) (x+0x00002030) argument
9138 #define HWIO_REO_R1_END_OF_TEST_CHECK_IN(x) \ argument
9140 #define HWIO_REO_R1_END_OF_TEST_CHECK_INM(x, mask) \ argument
9142 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUT(x, val) \ argument
9144 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
9156 #define HWIO_REO_R1_SM_ALL_IDLE_ADDR(x) (x+0x00002034) argument
9157 #define HWIO_REO_R1_SM_ALL_IDLE_PHYS(x) (x+0x00002034) argument
9160 #define HWIO_REO_R1_SM_ALL_IDLE_IN(x) \ argument
9162 #define HWIO_REO_R1_SM_ALL_IDLE_INM(x, mask) \ argument
9164 #define HWIO_REO_R1_SM_ALL_IDLE_OUT(x, val) \ argument
9166 #define HWIO_REO_R1_SM_ALL_IDLE_OUTM(x, mask, val) \ argument
9184 #define HWIO_REO_R1_TESTBUS_CTRL_ADDR(x) (x+0x00002038) argument
9185 #define HWIO_REO_R1_TESTBUS_CTRL_PHYS(x) (x+0x00002038) argument
9188 #define HWIO_REO_R1_TESTBUS_CTRL_IN(x) \ argument
9190 #define HWIO_REO_R1_TESTBUS_CTRL_INM(x, mask) \ argument
9192 #define HWIO_REO_R1_TESTBUS_CTRL_OUT(x, val) \ argument
9194 #define HWIO_REO_R1_TESTBUS_CTRL_OUTM(x, mask, val) \ argument
9206 #define HWIO_REO_R1_TESTBUS_LOWER_ADDR(x) (x+0x0000203c) argument
9207 #define HWIO_REO_R1_TESTBUS_LOWER_PHYS(x) (x+0x0000203c) argument
9210 #define HWIO_REO_R1_TESTBUS_LOWER_IN(x) \ argument
9212 #define HWIO_REO_R1_TESTBUS_LOWER_INM(x, mask) \ argument
9214 #define HWIO_REO_R1_TESTBUS_LOWER_OUT(x, val) \ argument
9216 #define HWIO_REO_R1_TESTBUS_LOWER_OUTM(x, mask, val) \ argument
9228 #define HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x) (x+0x00002040) argument
9229 #define HWIO_REO_R1_TESTBUS_HIGHER_PHYS(x) (x+0x00002040) argument
9232 #define HWIO_REO_R1_TESTBUS_HIGHER_IN(x) \ argument
9234 #define HWIO_REO_R1_TESTBUS_HIGHER_INM(x, mask) \ argument
9236 #define HWIO_REO_R1_TESTBUS_HIGHER_OUT(x, val) \ argument
9238 #define HWIO_REO_R1_TESTBUS_HIGHER_OUTM(x, mask, val) \ argument
9250 #define HWIO_REO_R1_SM_STATES_IX_0_ADDR(x) (x+0x00002044) argument
9251 #define HWIO_REO_R1_SM_STATES_IX_0_PHYS(x) (x+0x00002044) argument
9254 #define HWIO_REO_R1_SM_STATES_IX_0_IN(x) \ argument
9256 #define HWIO_REO_R1_SM_STATES_IX_0_INM(x, mask) \ argument
9258 #define HWIO_REO_R1_SM_STATES_IX_0_OUT(x, val) \ argument
9260 #define HWIO_REO_R1_SM_STATES_IX_0_OUTM(x, mask, val) \ argument
9272 #define HWIO_REO_R1_SM_STATES_IX_1_ADDR(x) (x+0x00002048) argument
9273 #define HWIO_REO_R1_SM_STATES_IX_1_PHYS(x) (x+0x00002048) argument
9276 #define HWIO_REO_R1_SM_STATES_IX_1_IN(x) \ argument
9278 #define HWIO_REO_R1_SM_STATES_IX_1_INM(x, mask) \ argument
9280 #define HWIO_REO_R1_SM_STATES_IX_1_OUT(x, val) \ argument
9282 #define HWIO_REO_R1_SM_STATES_IX_1_OUTM(x, mask, val) \ argument
9294 #define HWIO_REO_R1_SM_STATES_IX_2_ADDR(x) (x+0x0000204c) argument
9295 #define HWIO_REO_R1_SM_STATES_IX_2_PHYS(x) (x+0x0000204c) argument
9298 #define HWIO_REO_R1_SM_STATES_IX_2_IN(x) \ argument
9300 #define HWIO_REO_R1_SM_STATES_IX_2_INM(x, mask) \ argument
9302 #define HWIO_REO_R1_SM_STATES_IX_2_OUT(x, val) \ argument
9304 #define HWIO_REO_R1_SM_STATES_IX_2_OUTM(x, mask, val) \ argument
9316 #define HWIO_REO_R1_SM_STATES_IX_3_ADDR(x) (x+0x00002050) argument
9317 #define HWIO_REO_R1_SM_STATES_IX_3_PHYS(x) (x+0x00002050) argument
9320 #define HWIO_REO_R1_SM_STATES_IX_3_IN(x) \ argument
9322 #define HWIO_REO_R1_SM_STATES_IX_3_INM(x, mask) \ argument
9324 #define HWIO_REO_R1_SM_STATES_IX_3_OUT(x, val) \ argument
9326 #define HWIO_REO_R1_SM_STATES_IX_3_OUTM(x, mask, val) \ argument
9338 #define HWIO_REO_R1_SM_STATES_IX_4_ADDR(x) (x+0x00002054) argument
9339 #define HWIO_REO_R1_SM_STATES_IX_4_PHYS(x) (x+0x00002054) argument
9342 #define HWIO_REO_R1_SM_STATES_IX_4_IN(x) \ argument
9344 #define HWIO_REO_R1_SM_STATES_IX_4_INM(x, mask) \ argument
9346 #define HWIO_REO_R1_SM_STATES_IX_4_OUT(x, val) \ argument
9348 #define HWIO_REO_R1_SM_STATES_IX_4_OUTM(x, mask, val) \ argument
9360 #define HWIO_REO_R1_SM_STATES_IX_5_ADDR(x) (x+0x00002058) argument
9361 #define HWIO_REO_R1_SM_STATES_IX_5_PHYS(x) (x+0x00002058) argument
9364 #define HWIO_REO_R1_SM_STATES_IX_5_IN(x) \ argument
9366 #define HWIO_REO_R1_SM_STATES_IX_5_INM(x, mask) \ argument
9368 #define HWIO_REO_R1_SM_STATES_IX_5_OUT(x, val) \ argument
9370 #define HWIO_REO_R1_SM_STATES_IX_5_OUTM(x, mask, val) \ argument
9382 #define HWIO_REO_R1_SM_STATES_IX_6_ADDR(x) (x+0x0000205c) argument
9383 #define HWIO_REO_R1_SM_STATES_IX_6_PHYS(x) (x+0x0000205c) argument
9386 #define HWIO_REO_R1_SM_STATES_IX_6_IN(x) \ argument
9388 #define HWIO_REO_R1_SM_STATES_IX_6_INM(x, mask) \ argument
9390 #define HWIO_REO_R1_SM_STATES_IX_6_OUT(x, val) \ argument
9392 #define HWIO_REO_R1_SM_STATES_IX_6_OUTM(x, mask, val) \ argument
9404 #define HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x) (x+0x00002060) argument
9405 #define HWIO_REO_R1_IDLE_STATES_IX_0_PHYS(x) (x+0x00002060) argument
9408 #define HWIO_REO_R1_IDLE_STATES_IX_0_IN(x) \ argument
9410 #define HWIO_REO_R1_IDLE_STATES_IX_0_INM(x, mask) \ argument
9412 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUT(x, val) \ argument
9414 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUTM(x, mask, val) \ argument
9426 #define HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x) (x+0x00002064) argument
9427 #define HWIO_REO_R1_INVALID_APB_ACCESS_PHYS(x) (x+0x00002064) argument
9430 #define HWIO_REO_R1_INVALID_APB_ACCESS_IN(x) \ argument
9432 #define HWIO_REO_R1_INVALID_APB_ACCESS_INM(x, mask) \ argument
9434 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUT(x, val) \ argument
9436 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUTM(x, mask, val) \ argument
9451 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x) (x+0x00003000) argument
9452 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_PHYS(x) (x+0x00003000) argument
9455 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_IN(x) \ argument
9457 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_INM(x, mask) \ argument
9459 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUT(x, val) \ argument
9461 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUTM(x, mask, val) \ argument
9473 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x) (x+0x00003004) argument
9474 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_PHYS(x) (x+0x00003004) argument
9477 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_IN(x) \ argument
9479 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_INM(x, mask) \ argument
9481 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUT(x, val) \ argument
9483 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUTM(x, mask, val) \ argument
9495 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_ADDR(x) (x+0x00003008) argument
9496 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_PHYS(x) (x+0x00003008) argument
9499 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_IN(x) \ argument
9501 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_INM(x, mask) \ argument
9503 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_OUT(x, val) \ argument
9505 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_OUTM(x, mask, val) \ argument
9517 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_ADDR(x) (x+0x0000300c) argument
9518 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_PHYS(x) (x+0x0000300c) argument
9521 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_IN(x) \ argument
9523 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_INM(x, mask) \ argument
9525 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_OUT(x, val) \ argument
9527 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_OUTM(x, mask, val) \ argument
9539 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_ADDR(x) (x+0x00003010) argument
9540 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_PHYS(x) (x+0x00003010) argument
9543 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_IN(x) \ argument
9545 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_INM(x, mask) \ argument
9547 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_OUT(x, val) \ argument
9549 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_OUTM(x, mask, val) \ argument
9561 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_ADDR(x) (x+0x00003014) argument
9562 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_PHYS(x) (x+0x00003014) argument
9565 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_IN(x) \ argument
9567 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_INM(x, mask) \ argument
9569 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_OUT(x, val) \ argument
9571 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_OUTM(x, mask, val) \ argument
9583 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x) (x+0x00003018) argument
9584 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_PHYS(x) (x+0x00003018) argument
9587 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_IN(x) \ argument
9589 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_INM(x, mask) \ argument
9591 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUT(x, val) \ argument
9593 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUTM(x, mask, val) \ argument
9605 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x) (x+0x0000301c) argument
9606 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_PHYS(x) (x+0x0000301c) argument
9609 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_IN(x) \ argument
9611 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_INM(x, mask) \ argument
9613 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUT(x, val) \ argument
9615 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUTM(x, mask, val) \ argument
9627 #define HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x) (x+0x00003020) argument
9628 #define HWIO_REO_R2_REO_CMD_RING_HP_PHYS(x) (x+0x00003020) argument
9631 #define HWIO_REO_R2_REO_CMD_RING_HP_IN(x) \ argument
9633 #define HWIO_REO_R2_REO_CMD_RING_HP_INM(x, mask) \ argument
9635 #define HWIO_REO_R2_REO_CMD_RING_HP_OUT(x, val) \ argument
9637 #define HWIO_REO_R2_REO_CMD_RING_HP_OUTM(x, mask, val) \ argument
9649 #define HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x) (x+0x00003024) argument
9650 #define HWIO_REO_R2_REO_CMD_RING_TP_PHYS(x) (x+0x00003024) argument
9653 #define HWIO_REO_R2_REO_CMD_RING_TP_IN(x) \ argument
9655 #define HWIO_REO_R2_REO_CMD_RING_TP_INM(x, mask) \ argument
9657 #define HWIO_REO_R2_REO_CMD_RING_TP_OUT(x, val) \ argument
9659 #define HWIO_REO_R2_REO_CMD_RING_TP_OUTM(x, mask, val) \ argument
9671 #define HWIO_REO_R2_SW2REO_RING_HP_ADDR(x) (x+0x00003028) argument
9672 #define HWIO_REO_R2_SW2REO_RING_HP_PHYS(x) (x+0x00003028) argument
9675 #define HWIO_REO_R2_SW2REO_RING_HP_IN(x) \ argument
9677 #define HWIO_REO_R2_SW2REO_RING_HP_INM(x, mask) \ argument
9679 #define HWIO_REO_R2_SW2REO_RING_HP_OUT(x, val) \ argument
9681 #define HWIO_REO_R2_SW2REO_RING_HP_OUTM(x, mask, val) \ argument
9693 #define HWIO_REO_R2_SW2REO_RING_TP_ADDR(x) (x+0x0000302c) argument
9694 #define HWIO_REO_R2_SW2REO_RING_TP_PHYS(x) (x+0x0000302c) argument
9697 #define HWIO_REO_R2_SW2REO_RING_TP_IN(x) \ argument
9699 #define HWIO_REO_R2_SW2REO_RING_TP_INM(x, mask) \ argument
9701 #define HWIO_REO_R2_SW2REO_RING_TP_OUT(x, val) \ argument
9703 #define HWIO_REO_R2_SW2REO_RING_TP_OUTM(x, mask, val) \ argument
9715 #define HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x) (x+0x00003030) argument
9716 #define HWIO_REO_R2_REO2SW1_RING_HP_PHYS(x) (x+0x00003030) argument
9719 #define HWIO_REO_R2_REO2SW1_RING_HP_IN(x) \ argument
9721 #define HWIO_REO_R2_REO2SW1_RING_HP_INM(x, mask) \ argument
9723 #define HWIO_REO_R2_REO2SW1_RING_HP_OUT(x, val) \ argument
9725 #define HWIO_REO_R2_REO2SW1_RING_HP_OUTM(x, mask, val) \ argument
9737 #define HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x) (x+0x00003034) argument
9738 #define HWIO_REO_R2_REO2SW1_RING_TP_PHYS(x) (x+0x00003034) argument
9741 #define HWIO_REO_R2_REO2SW1_RING_TP_IN(x) \ argument
9743 #define HWIO_REO_R2_REO2SW1_RING_TP_INM(x, mask) \ argument
9745 #define HWIO_REO_R2_REO2SW1_RING_TP_OUT(x, val) \ argument
9747 #define HWIO_REO_R2_REO2SW1_RING_TP_OUTM(x, mask, val) \ argument
9759 #define HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x) (x+0x00003038) argument
9760 #define HWIO_REO_R2_REO2SW2_RING_HP_PHYS(x) (x+0x00003038) argument
9763 #define HWIO_REO_R2_REO2SW2_RING_HP_IN(x) \ argument
9765 #define HWIO_REO_R2_REO2SW2_RING_HP_INM(x, mask) \ argument
9767 #define HWIO_REO_R2_REO2SW2_RING_HP_OUT(x, val) \ argument
9769 #define HWIO_REO_R2_REO2SW2_RING_HP_OUTM(x, mask, val) \ argument
9781 #define HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x) (x+0x0000303c) argument
9782 #define HWIO_REO_R2_REO2SW2_RING_TP_PHYS(x) (x+0x0000303c) argument
9785 #define HWIO_REO_R2_REO2SW2_RING_TP_IN(x) \ argument
9787 #define HWIO_REO_R2_REO2SW2_RING_TP_INM(x, mask) \ argument
9789 #define HWIO_REO_R2_REO2SW2_RING_TP_OUT(x, val) \ argument
9791 #define HWIO_REO_R2_REO2SW2_RING_TP_OUTM(x, mask, val) \ argument
9803 #define HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x) (x+0x00003040) argument
9804 #define HWIO_REO_R2_REO2SW3_RING_HP_PHYS(x) (x+0x00003040) argument
9807 #define HWIO_REO_R2_REO2SW3_RING_HP_IN(x) \ argument
9809 #define HWIO_REO_R2_REO2SW3_RING_HP_INM(x, mask) \ argument
9811 #define HWIO_REO_R2_REO2SW3_RING_HP_OUT(x, val) \ argument
9813 #define HWIO_REO_R2_REO2SW3_RING_HP_OUTM(x, mask, val) \ argument
9825 #define HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x) (x+0x00003044) argument
9826 #define HWIO_REO_R2_REO2SW3_RING_TP_PHYS(x) (x+0x00003044) argument
9829 #define HWIO_REO_R2_REO2SW3_RING_TP_IN(x) \ argument
9831 #define HWIO_REO_R2_REO2SW3_RING_TP_INM(x, mask) \ argument
9833 #define HWIO_REO_R2_REO2SW3_RING_TP_OUT(x, val) \ argument
9835 #define HWIO_REO_R2_REO2SW3_RING_TP_OUTM(x, mask, val) \ argument
9847 #define HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x) (x+0x00003048) argument
9848 #define HWIO_REO_R2_REO2SW4_RING_HP_PHYS(x) (x+0x00003048) argument
9851 #define HWIO_REO_R2_REO2SW4_RING_HP_IN(x) \ argument
9853 #define HWIO_REO_R2_REO2SW4_RING_HP_INM(x, mask) \ argument
9855 #define HWIO_REO_R2_REO2SW4_RING_HP_OUT(x, val) \ argument
9857 #define HWIO_REO_R2_REO2SW4_RING_HP_OUTM(x, mask, val) \ argument
9869 #define HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x) (x+0x0000304c) argument
9870 #define HWIO_REO_R2_REO2SW4_RING_TP_PHYS(x) (x+0x0000304c) argument
9873 #define HWIO_REO_R2_REO2SW4_RING_TP_IN(x) \ argument
9875 #define HWIO_REO_R2_REO2SW4_RING_TP_INM(x, mask) \ argument
9877 #define HWIO_REO_R2_REO2SW4_RING_TP_OUT(x, val) \ argument
9879 #define HWIO_REO_R2_REO2SW4_RING_TP_OUTM(x, mask, val) \ argument
9891 #define HWIO_REO_R2_REO2SW5_RING_HP_ADDR(x) (x+0x00003050) argument
9892 #define HWIO_REO_R2_REO2SW5_RING_HP_PHYS(x) (x+0x00003050) argument
9895 #define HWIO_REO_R2_REO2SW5_RING_HP_IN(x) \ argument
9897 #define HWIO_REO_R2_REO2SW5_RING_HP_INM(x, mask) \ argument
9899 #define HWIO_REO_R2_REO2SW5_RING_HP_OUT(x, val) \ argument
9901 #define HWIO_REO_R2_REO2SW5_RING_HP_OUTM(x, mask, val) \ argument
9913 #define HWIO_REO_R2_REO2SW5_RING_TP_ADDR(x) (x+0x00003054) argument
9914 #define HWIO_REO_R2_REO2SW5_RING_TP_PHYS(x) (x+0x00003054) argument
9917 #define HWIO_REO_R2_REO2SW5_RING_TP_IN(x) \ argument
9919 #define HWIO_REO_R2_REO2SW5_RING_TP_INM(x, mask) \ argument
9921 #define HWIO_REO_R2_REO2SW5_RING_TP_OUT(x, val) \ argument
9923 #define HWIO_REO_R2_REO2SW5_RING_TP_OUTM(x, mask, val) \ argument
9935 #define HWIO_REO_R2_REO2SW6_RING_HP_ADDR(x) (x+0x00003058) argument
9936 #define HWIO_REO_R2_REO2SW6_RING_HP_PHYS(x) (x+0x00003058) argument
9939 #define HWIO_REO_R2_REO2SW6_RING_HP_IN(x) \ argument
9941 #define HWIO_REO_R2_REO2SW6_RING_HP_INM(x, mask) \ argument
9943 #define HWIO_REO_R2_REO2SW6_RING_HP_OUT(x, val) \ argument
9945 #define HWIO_REO_R2_REO2SW6_RING_HP_OUTM(x, mask, val) \ argument
9957 #define HWIO_REO_R2_REO2SW6_RING_TP_ADDR(x) (x+0x0000305c) argument
9958 #define HWIO_REO_R2_REO2SW6_RING_TP_PHYS(x) (x+0x0000305c) argument
9961 #define HWIO_REO_R2_REO2SW6_RING_TP_IN(x) \ argument
9963 #define HWIO_REO_R2_REO2SW6_RING_TP_INM(x, mask) \ argument
9965 #define HWIO_REO_R2_REO2SW6_RING_TP_OUT(x, val) \ argument
9967 #define HWIO_REO_R2_REO2SW6_RING_TP_OUTM(x, mask, val) \ argument
9979 #define HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x) (x+0x00003060) argument
9980 #define HWIO_REO_R2_REO2TCL_RING_HP_PHYS(x) (x+0x00003060) argument
9983 #define HWIO_REO_R2_REO2TCL_RING_HP_IN(x) \ argument
9985 #define HWIO_REO_R2_REO2TCL_RING_HP_INM(x, mask) \ argument
9987 #define HWIO_REO_R2_REO2TCL_RING_HP_OUT(x, val) \ argument
9989 #define HWIO_REO_R2_REO2TCL_RING_HP_OUTM(x, mask, val) \ argument
10001 #define HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x) (x+0x00003064) argument
10002 #define HWIO_REO_R2_REO2TCL_RING_TP_PHYS(x) (x+0x00003064) argument
10005 #define HWIO_REO_R2_REO2TCL_RING_TP_IN(x) \ argument
10007 #define HWIO_REO_R2_REO2TCL_RING_TP_INM(x, mask) \ argument
10009 #define HWIO_REO_R2_REO2TCL_RING_TP_OUT(x, val) \ argument
10011 #define HWIO_REO_R2_REO2TCL_RING_TP_OUTM(x, mask, val) \ argument
10023 #define HWIO_REO_R2_REO2FW_RING_HP_ADDR(x) (x+0x00003068) argument
10024 #define HWIO_REO_R2_REO2FW_RING_HP_PHYS(x) (x+0x00003068) argument
10027 #define HWIO_REO_R2_REO2FW_RING_HP_IN(x) \ argument
10029 #define HWIO_REO_R2_REO2FW_RING_HP_INM(x, mask) \ argument
10031 #define HWIO_REO_R2_REO2FW_RING_HP_OUT(x, val) \ argument
10033 #define HWIO_REO_R2_REO2FW_RING_HP_OUTM(x, mask, val) \ argument
10045 #define HWIO_REO_R2_REO2FW_RING_TP_ADDR(x) (x+0x0000306c) argument
10046 #define HWIO_REO_R2_REO2FW_RING_TP_PHYS(x) (x+0x0000306c) argument
10049 #define HWIO_REO_R2_REO2FW_RING_TP_IN(x) \ argument
10051 #define HWIO_REO_R2_REO2FW_RING_TP_INM(x, mask) \ argument
10053 #define HWIO_REO_R2_REO2FW_RING_TP_OUT(x, val) \ argument
10055 #define HWIO_REO_R2_REO2FW_RING_TP_OUTM(x, mask, val) \ argument
10067 #define HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x) (x+0x00003070) argument
10068 #define HWIO_REO_R2_REO_RELEASE_RING_HP_PHYS(x) (x+0x00003070) argument
10071 #define HWIO_REO_R2_REO_RELEASE_RING_HP_IN(x) \ argument
10073 #define HWIO_REO_R2_REO_RELEASE_RING_HP_INM(x, mask) \ argument
10075 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUT(x, val) \ argument
10077 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUTM(x, mask, val) \ argument
10089 #define HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x) (x+0x00003074) argument
10090 #define HWIO_REO_R2_REO_RELEASE_RING_TP_PHYS(x) (x+0x00003074) argument
10093 #define HWIO_REO_R2_REO_RELEASE_RING_TP_IN(x) \ argument
10095 #define HWIO_REO_R2_REO_RELEASE_RING_TP_INM(x, mask) \ argument
10097 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUT(x, val) \ argument
10099 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUTM(x, mask, val) \ argument
10111 #define HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x) (x+0x00003078) argument
10112 #define HWIO_REO_R2_REO_STATUS_RING_HP_PHYS(x) (x+0x00003078) argument
10115 #define HWIO_REO_R2_REO_STATUS_RING_HP_IN(x) \ argument
10117 #define HWIO_REO_R2_REO_STATUS_RING_HP_INM(x, mask) \ argument
10119 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUT(x, val) \ argument
10121 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUTM(x, mask, val) \ argument
10133 #define HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x) (x+0x0000307c) argument
10134 #define HWIO_REO_R2_REO_STATUS_RING_TP_PHYS(x) (x+0x0000307c) argument
10137 #define HWIO_REO_R2_REO_STATUS_RING_TP_IN(x) \ argument
10139 #define HWIO_REO_R2_REO_STATUS_RING_TP_INM(x, mask) \ argument
10141 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUT(x, val) \ argument
10143 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUTM(x, mask, val) \ argument