Lines Matching refs:NUM_SCHED_ENTRIES
558 #define NUM_SCHED_ENTRIES 2 macro
573 #define PROD_SCHED_BW_ENTRIES (NUM_SCHED_ENTRIES * NUM_DYN_BW)
599 A_UINT32 psdu_len[NUM_DYN_BW * NUM_SCHED_ENTRIES];
600 A_UINT16 flags[NUM_SCHED_ENTRIES][NUM_DYN_BW];
601 A_RATE rix[NUM_SCHED_ENTRIES][NUM_DYN_BW];
602 A_UINT8 tpc[NUM_SCHED_ENTRIES][NUM_DYN_BW];
603 A_UINT32 antmask[NUM_SCHED_ENTRIES];
604 A_UINT8 num_mpdus[NUM_DYN_BW * NUM_SCHED_ENTRIES];
610 A_UINT8 tries[NUM_SCHED_ENTRIES];
611 A_UINT8 bw_mask[NUM_SCHED_ENTRIES];
612 A_UINT8 max_bw[NUM_SCHED_ENTRIES];
627 A_UINT32 psdu_len[NUM_DYN_BW * NUM_SCHED_ENTRIES];
628 A_UINT16 flags[NUM_DYN_BW * NUM_SCHED_ENTRIES];
629 A_RATE rix[NUM_DYN_BW * NUM_SCHED_ENTRIES];
630 A_UINT8 tpc[NUM_DYN_BW * NUM_SCHED_ENTRIES];
631 A_UINT8 num_mpdus[NUM_DYN_BW * NUM_SCHED_ENTRIES];
632 A_UINT32 antmask[NUM_SCHED_ENTRIES];
635 A_UINT8 tries[NUM_SCHED_ENTRIES];
648 A_UINT16 flags[NUM_DYN_BW * NUM_SCHED_ENTRIES];
649 A_RATE rix[NUM_DYN_BW * NUM_SCHED_ENTRIES];
651 A_UINT8 tpc[NUM_DYN_BW * NUM_SCHED_ENTRIES];
654 A_UINT32 antmask[NUM_SCHED_ENTRIES];
656 A_UINT8 tries[NUM_SCHED_ENTRIES];