nx-gzip/include/nxu.h

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3  * Hardware interface of the NX-GZIP compression accelerator
41 #define nx_get_time()  (-1)
42 #define nx_get_freq()  (-1)
50  * https://github.com/libnxz/power-gzip/blob/develop/doc/power_nx_gzip_um.pdf
71  * vas:      virtual accelerator switch; the user mode interface
109 		 * Software can poll for the v bit
141 		 * When crb.c==1 (ccb defined) it is cm
145 		/* Signal interrupt of crb.c==1 and cm==1 */
291 		uint32_t gzip_fc;     /* bits[24-31] */
335 #define size_mask(x)          ((1U<<(x))-1)
428 #define getnn(ST, REG)      ((be32toh(ST.REG) >> (31-REG##_offset)) \
430 #define getpnn(ST, REG)     ((be32toh((ST)->REG) >> (31-REG##_offset)) \
433 #define getp32(ST, REG)     (be32toh((ST)->REG))
435 #define getp64(ST, REG)     (be64toh((ST)->REG))
438 				<< (31-REG##_offset)))
442 				<< (31-REG##_offset)))
448 #define clearp_dde(ST)      do { (ST)->dde_count = (ST)->ddebc = 0; \
449 				 (ST)->ddead = 0; \
453 				 & REG##_mask) << (31-REG##_offset))))
454 #define putpnn(ST, REG, X)  ((ST)->REG = htobe32(ungetp32(ST, REG) \
455 				| (((X) & REG##_mask) << (31-REG##_offset))))
458 #define putp32(ST, REG, X)  ((ST)->REG = htobe32(X))
460 #define putp64(ST, REG, X)  ((ST)->REG = htobe64(X))
463  * Completion extension ce(0) ce(1) ce(2).  Bits ce(3-7)
476 /* termination, output buffers may be modified, SPBC/TPBC invalid Fig.6-7 */
490 /* some CC=3 are partially completed, Table 6-8 */
494 /* Compression: when TPBC>SPBC then CC=64 Table 6-8; target didn't
498 /* Decompress SFBT combinations Tables 5-3, 6-4, 6-6 */
568 /* initial values for non-resume operations */
611 		uint32_t eft_fc;      /* bits[29-31] */