Lines Matching +full:0 +full:x21
37 cmp x2, #0
39 0: ldrb w3, [x1], #1
42 b.ne 0b
56 // bits 7: 0 32-bit lane index
67 0: str w3, [x0], #4
70 b.ne 0b
108 stp x0, x1, [sp, #-0x20]!
109 str x2, [sp, #0x10]
111 mov x5, #0
112 0: ldrb w3, [x0, x5]
118 b.ne 0b
120 1: ldr x2, [sp, #0x10]
121 ldp x0, x1, [sp], #0x20
160 #if 0
193 mov x0, #0
195 svc #0
217 mov x2, #0
220 svc #0
234 mov x23, #0 // signal count
283 svc #0
290 mov x22, #0 // generation number, increments per iteration
292 rdsvl 0, 8
297 0: mov x0, x20
298 sub x1, x21, #1
301 subs x21, x21, #1
302 b.ne 0b
306 svc #0
308 mrs x0, S3_3_C4_C2_2 // SVCR should have ZA=1,SM=0
315 0: sub x0, x24, x21
317 subs x21, x21, #1
318 bne 0b
324 mov x0, #0
327 svc #0
332 // ldr w0, =0xdeadc0de
334 // svc #0
351 mov x0, x21
367 svc #0
369 // ldr w0, =0xdeadc0de
371 // svc #0
375 svc #0
378 // svc #0
390 svc #0
402 svc #0