Lines Matching +full:64 +full:mhz

44 		MSRs are read as 64-bits, u32 truncates the displayed value to 32-bits.
82 …'%u' least significant bit within the 64 bit value read from 'offset'. Together with 'msb', used t…
85 …'%u' most significant bit within the 64 bit value read from 'offset'. Together with 'lsb', used to…
152 \fBTSC_MHz\fP average MHz that the TSC ran during the entire interval.
194 \fBUncMHz\fP per-package uncore MHz, instantaneous sample.
196 \fBUMHz1.0\fP per-package uncore MHz for domain=1 and fabric_cluster=0, instantaneous sample.  Syst…
278 TSC: 3096 MHz (24000000 Hz * 258 / 2 / 1000000)
283 8 * 100.0 = 800.0 MHz max efficiency frequency
284 31 * 100.0 = 3100.0 MHz base frequency
287 39 * 100.0 = 3900.0 MHz max turbo 4 active cores
288 40 * 100.0 = 4000.0 MHz max turbo 3 active cores
289 41 * 100.0 = 4100.0 MHz max turbo 2 active cores
290 42 * 100.0 = 4200.0 MHz max turbo 1 active cores
297 Uncore Frequency pkg0 die0: 800 - 3900 MHz (800 - 3900 MHz)
401 we set the lsb and msb to cover all 64 bits of the read 64 bit value,
410 we set the lsb and msb to cover all 64 bits of the read 64 bit value,